FSF150R1 [FAIRCHILD]

Power Field-Effect Transistor, 25A I(D), 100V, 0.07ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-254AA,;
FSF150R1
型号: FSF150R1
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Power Field-Effect Transistor, 25A I(D), 100V, 0.07ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-254AA,

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FSF150D, FSF150R  
25A, 100V, 0.070 Ohm, Rad Hard,  
SEGR Resistant, N-Channel Power MOSFETs  
June 1998  
Features  
Description  
• 25A, 100V, r  
• Total Dose  
= 0.070Ω  
The Discrete Products Operation of Intersil Corporation has  
developed a series of Radiation Hardened MOSFETs specif-  
ically designed for commercial and military space applica-  
DS(ON)  
- Meets Pre-RAD Specifications to 100K RAD (Si)  
tions. Enhanced Power MOSFET immunity to Single Event  
Effects (SEE), Single Event Gate Rupture (SEGR) in particu-  
lar, is combined with 100K RADS of total dose hardness to  
provide devices which are ideally suited to harsh space envi-  
ronments. The dose rate and neutron tolerance necessary  
for military applications have not been sacrificed.  
• Single Event  
- Safe Operating Area Curve for Single Event Effects  
2
- SEE Immunity for LET of 36MeV/mg/cm with  
V
up to 80% of Rated Breakdown and  
of 10V Off-Bias  
DS  
V
GS  
The Intersil portfolio of SEGR resistant radiation hardened  
MOSFETs includes N-Channel and P-Channel devices in a  
variety of voltage, current and on-resistance ratings.  
Numerous packaging options are also available.  
• Dose Rate  
- Typically Survives 3E9 RAD (Si)/s at 80% BV  
DSS  
- Typically Survives 2E12 if Current Limited to I  
DM  
This MOSFET is an enhancement-mode silicon-gate power  
field-effect transistor of the vertical DMOS (VDMOS) struc-  
ture. It is specially designed and processed to be radiation  
tolerant.The MOSFET is well suited for applications exposed  
to radiation environments such as switching regulation,  
switching converters, motor drives, relay drivers and drivers  
for high-power bipolar switching transistors requiring high  
speed and low gate drive power. This type can be operated  
directly from integrated circuits.  
• Photo Current  
- 7.0nA Per-RAD(Si)/s Typically  
• Neutron  
- Maintain Pre-RAD Specifications  
for 3E13 Neutrons/cm  
2
2
- Usable to 3E14 Neutrons/cm  
Reliability screening is available as either commercial, TXV  
equivalent of MIL-S-19500, or Space equivalent of  
MIL-S-19500. Contact Intersil for any desired deviations from  
the data sheet.  
Ordering Information  
RAD LEVEL  
SCREENING LEVEL PART NUMBER/BRAND  
10K  
Commercial  
TXV  
FSF150D1  
FSF150D3  
FSF150R1  
FSF150R3  
FSF150R4  
10K  
Symbol  
D
100K  
Commercial  
TXV  
100K  
100K  
Space  
G
Formerly available as type TA17656.  
S
Package  
TO-254AA  
G
S
D
CAUTION: Beryllia Warning per MIL-S-19500  
refer to package specifications.  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified  
C
FSF150D, FSF150R  
UNITS  
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V  
100  
100  
V
V
DS  
Drain to Gate Voltage (R  
= 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
DGR  
GS  
Continuous Drain Current  
o
T
T
= 25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
25 (Note 1)  
A
A
A
V
C
C
D
D
o
= 100 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
Gate to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V  
20  
75  
20  
DM  
GS  
Maximum Power Dissipation  
o
T
T
= 25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P  
125  
50  
1.00  
W
W
W/ C  
C
C
T
T
o
= 100 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P  
o
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . I  
75  
A
A
A
AS  
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
25 (Note 1)  
75  
-55 to 150  
300  
S
SM  
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T  
C
o
J
STG  
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T  
(Distance >0.063in (1.6mm) from Case, 10s Max)  
C
L
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. Current is limited by the package capability.  
o
Electrical Specifications T = 25 C, Unless Otherwise Specified  
C
PARAMETER  
Drain to Source Breakdown Voltage  
Gate Threshold Voltage  
SYMBOL  
BV  
TEST CONDITIONS  
= 1mA, V = 0V  
MIN  
TYP  
MAX  
-
UNITS  
V
I
100  
-
-
-
-
-
-
-
DSS  
D
GS  
o
V
V
I
= V  
= 1mA  
,
T
T
T
T
T
T
T
= -55 C  
-
1.5  
0.5  
-
5.0  
4.0  
-
V
GS(TH)  
GS  
DS  
C
C
C
C
C
C
C
o
D
= 25 C  
V
o
= 125 C  
V
o
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
I
I
V
V
= 80V,  
DS  
= 25 C  
25  
µA  
µA  
nA  
nA  
V
DSS  
= 0V  
o
GS  
= 125 C  
-
250  
100  
200  
1.84  
0.070  
0.105  
140  
310  
170  
70  
o
V
=
20V  
= 25 C  
-
GSS  
GS  
o
= 125 C  
Drain to Source On-State Voltage  
Drain to Source On Resistance  
V
V
= 12V, I = 25A  
D
DS(ON)  
GS  
o
r
I
V
= 20A,  
T
T
= 25 C  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.045  
DS(ON)12  
D
C
C
= 12V  
o
GS  
= 125 C  
-
Turn-On Delay Time  
Rise Time  
t
V
R
R
= 50V, I = 25A,  
-
ns  
ns  
ns  
ns  
nC  
nC  
nC  
nC  
nC  
V
d(ON)  
DD  
D
= 2.0, V = 12V,  
L
GS  
t
-
r
= 2.35Ω  
GS  
Turn-Off Delay Time  
Fall Time  
t
-
d(OFF)  
t
-
-
f
Total Gate Charge  
Q
V
= 0V to 20V  
= 0V to 12V  
= 0V to 2V  
V
= 50V,  
240  
160  
8.1  
31  
g(TOT)  
GS  
DD  
= 25A  
I
D
Gate Charge at 12V  
Threshold Gate Charge  
Gate Charge Source  
Gate Charge Drain  
Q
V
130  
-
g(12)  
g(TH)  
GS  
Q
V
GS  
Q
23  
67  
7
gs  
gd  
Q
88  
Plateau Voltage  
V
I
= 25A, V  
= 15V  
-
(PLATEAU)  
D
DS  
= 25V, V = 0V,  
GS  
Input Capacitance  
C
V
3250  
1060  
370  
-
-
pF  
pF  
pF  
ISS  
DS  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Thermal Resistance Junction to Case  
Thermal Resistance Junction to Ambient  
C
C
-
OSS  
-
RSS  
o
R
R
1.00  
48  
C/W  
JC  
θ
o
-
C/W  
JA  
θ
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Source to Drain Diode Specifications  
PARAMETER  
Forward Voltage  
Reverse Recovery Time  
SYMBOL  
TEST CONDITIONS  
MIN  
0.6  
-
TYP  
MAX  
1.8  
UNITS  
V
V
I
I
= 25A  
-
-
SD  
SD  
SD  
t
= 25A, dI /dt = 100A/µs  
400  
ns  
rr  
SD  
o
Electrical Specifications up to 100K RAD T = 25 C, Unless Otherwise Specified  
C
PARAMETER  
Drain to Source Breakdown Volts  
Gate to Source Threshold Volts  
Gate to Body Leakage  
SYMBOL  
BV  
TEST CONDITIONS  
= 0, I = 1mA  
MIN  
MAX  
-
UNITS  
(Note 3)  
V
100  
V
V
DSS  
GS(TH)  
GS  
D
(Note 3)  
V
V
= V , I = 1mA  
DS  
1.5  
4.0  
GS  
D
(Notes 2, 3)  
(Note 3)  
I
V
=
20V, V  
= 0V  
-
-
-
-
100  
25  
nA  
µA  
V
GSS  
GS  
DS  
Zero Gate Leakage  
I
V
= 0, V  
= 80V  
DSS  
GS  
DS  
= 12V, I = 25A  
Drain to Source On-State Volts  
Drain to Source On Resistance  
(Notes 1, 3)  
(Notes 1, 3)  
V
V
1.84  
0.070  
DS(ON)  
GS  
D
r
V
= 12V, I = 20A  
DS(ON)12  
GS  
D
NOTES:  
2. Pulse test, 300µs Max.  
3. Absolute value.  
4. Insitu Gamma bias must be sampled for both V  
= 12V, V  
= 0V and V  
= 0V, V  
= 80% BV  
.
DSS  
GS  
DS  
GS  
DS  
Single Event Effects (SEB, SEGR) (Note 4)  
ENVIRONMENT (NOTE 5)  
(NOTE 6)  
APPLIED  
BIAS  
MAXIMUM  
ION  
SPECIES  
TYPICAL LET  
(MeV/mg/cm)  
TYPICAL  
RANGE (µ)  
V
V
BIAS  
GS  
(V)  
DS  
(V)  
TEST  
SYMBOL  
Single Event Effects Safe Operating  
Area  
SEESOA  
Ni  
Br  
Br  
Br  
26  
37  
37  
37  
43  
36  
36  
36  
-20  
-10  
-15  
-20  
100  
100  
80  
50  
NOTES:  
5. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.  
2
o
6. Fluence = 1E5 ions/cm (typical), T = 25 C.  
7. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Typical Performance Curves Unless Otherwise Specified  
2
LET = 26MeV/mg/cm , RANGE = 43µ  
2
LET = 37MeV/mg/cm , RANGE = 36µ  
1E-3  
1E-4  
120  
100  
80  
60  
40  
20  
0
2
FLUENCE = 1E5 IONS/cm (TYPICAL)  
ILM = 10A  
30A  
1E-5  
1E-6  
1E-7  
100A  
300A  
o
TEMP = 25 C  
10  
30  
100  
300  
1000  
0
-5  
-10  
-15  
(V)  
-20  
-25  
V
GS  
DRAIN SUPPLY (V)  
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA  
40  
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT  
GAMMA DOT CURRENT TO I  
AS  
100  
o
= 25 C  
T
C
100µs  
30  
20  
1ms  
10  
1
10ms  
100ms  
10  
0
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(ON)  
0.1  
-50  
0
T
50  
100  
o
150  
1
10  
, DRAIN TO SOURCE VOLTAGE (V)  
100  
, CASE TEMPERATURE ( C)  
C
V
DS  
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs  
TEMPERATURE  
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Typical Performance Curves Unless Otherwise Specified (Continued)  
2.5  
2.0  
PULSE DURATION = 250ms, V  
GS  
= 12V, I = 20A  
D
Q
Q
12V  
G
1.5  
1.0  
0.5  
0.0  
Q
GD  
GS  
V
G
CHARGE  
-80  
-40  
0
40  
80  
120  
o
160  
T , JUNCTION TEMPERATURE ( C)  
J
FIGURE 5. BASIC GATE CHARGE WAVEFORM  
10  
FIGURE 6. NORMALIZED r  
vs JUNCTIONTEMPERATURE  
DS(ON)  
1
0.5  
0.2  
0.1  
0.05  
0.1  
P
DM  
0.02  
0.01  
t
t
SINGLE PULSE  
1
2
0.01  
NOTES:  
DUTY FACTOR: D = t /t  
1
2
+ T  
PEAK T = P  
x Z  
J
DM  
JC  
θ
C
0.001  
-5  
10  
-4  
-3  
10  
-2  
10  
-1  
10  
0
1
10  
10  
10  
t, RECTANGULAR PULSE DURATION (s)  
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE  
300  
100  
o
STARTING T = 25 C  
J
o
STARTING T = 150 C  
J
10  
IF R = 0  
t
= (L) (I ) / (1.3 RATED BV  
AS DSS  
- V  
DD  
)
AV  
IF R 0  
AV  
t
= (L/R) ln [(I *R) / (1.3 RATED BV  
AS  
- V ) + 1]  
DD  
DSS  
1
0.1  
1
10  
0.01  
t
,TIME IN AVALANCHE (ms)  
AV  
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Test Circuits and Waveforms  
ELECTRONIC SWITCH OPENS  
WHEN I IS REACHED  
AS  
V
DS  
L
BV  
DSS  
+
CURRENT  
TRANSFORMER  
I
AS  
t
P
-
V
DS  
I
AS  
V
VARY t TO OBTAIN  
DD  
P
+
50Ω  
REQUIRED PEAK I  
AS  
V
DD  
V
20V  
GS  
-
50V-150V  
DUT  
50Ω  
t
P
0V  
t
AV  
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT  
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS  
t
ON  
t
OFF  
t
d(OFF)  
V
DD  
t
d(ON)  
t
t
f
r
R
L
V
DS  
90%  
90%  
V
DS  
V
= 12V  
GS  
10%  
10%  
DUT  
0V  
90%  
50%  
R
GS  
50%  
V
GS  
10%  
PULSE WIDTH  
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT  
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Screening Information  
Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).  
o
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) T = 25 C, Unless Otherwise Specified  
C
PARAMETER  
Gate to Source Leakage Current  
Zero Gate Voltage Drain Current  
Drain to Source On Resistance  
Gate Threshold Voltage  
SYMBOL  
TEST CONDITIONS  
MAX  
UNITS  
nA  
I
V
=
20V  
20 (Note 7)  
25 (Note 7)  
20% (Note 8)  
20% (Note 8)  
GSS  
DSS  
GS  
I
V
= 80% Rated Value  
o
µA  
DS  
r
T
= 25 C at Rated I  
D
DS(ON)  
C
V
I
= 1.0mA  
D
V
GS(TH)  
NOTES:  
8. Or 100% of Initial Reading (whichever is greater).  
9. Of Initial Reading.  
Screening Information  
TEST  
JANTXV EQUIVALENT  
= 30V, t = 250µs  
JANS EQUIVALENT  
= 30V, t = 250µs  
Gate Stress  
V
V
GS  
Optional  
MIL-S-19500 Group A,  
GS  
Required  
MIL-S-19500 Group A,  
Pind  
Pre Burn-In Tests (Note 9)  
o
o
Subgroup 2 (All Static Tests at 25 C)  
Subgroup 2 (All Static Tests at 25 C)  
Steady State Gate  
Bias (Gate Stress)  
MIL-STD-750, Method 1042, Condition B  
MIL-STD-750, Method 1042, Condition B  
V
= 80% of Rated Value,  
V
= 80% of Rated Value,  
GS  
GS  
o
o
T
= 150 C, Time = 48 hours  
T
= 150 C, Time = 48 hours  
A
A
Interim Electrical Tests (Note 9)  
All Delta Parameters Listed in the Delta Tests All Delta Parameters Listed in the Delta Tests  
and Limits Table  
and Limits Table  
Steady State Reverse  
Bias (Drain Stress)  
MIL-STD-750, Method 1042, Condition A  
MIL-STD-750, Method 1042, Condition A  
V
= 80% of Rated Value,  
V
= 80% of Rated Value,  
DS  
= 150 C, Time = 160 hours  
DS  
T = 150 C, Time = 240 hours  
A
o
o
T
A
PDA  
10%  
5%  
Final Electrical Tests (Note 9)  
MIL-S-19500, Group A, Subgroup 2  
MIL-S-19500, Group A,  
Subgroups 2 and 3  
NOTE:  
10. Test limits are identical pre and post burn-in.  
Additional Screening Tests  
PARAMETER  
Safe Operating Area  
SYMBOL  
SOA  
TEST CONDITIONS  
= 80V, t = 10ms  
MAX  
4.50  
75  
UNITS  
A
V
DS  
Unclamped Inductive Switching  
Thermal Response  
I
V
= 15V, L = 0.1mH  
A
AS  
GS(PEAK)  
V  
V  
t
t
= 100ms; V = 25V; I = 4A  
136  
187  
mV  
mV  
SD  
SD  
H
H
H
H
Thermal Impedance  
= 500ms; V = 25V; I = 4A  
H H  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
Rad Hard Data Packages - Intersil Power Transistors  
TXV Equivalent  
E. Preconditioning Attributes Data Sheet  
Hi-Rel Lot Traveler  
1. Rad Hard TXV Equivalent - Standard Data Package  
A. Certificate of Compliance  
HTRB - Hi Temp Gate Stress Post Reverse  
Bias Data and Delta Data  
HTRB - Hi Temp Drain Stress Post Reverse  
Bias Delta Data  
B. Assembly Flow Chart  
C. Preconditioning - Attributes Data Sheet  
F. Group A  
G. Group B  
H. Group C  
I. Group D  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
D. Group A  
E. Group B  
F. Group C  
G. Group D  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
2. Rad Hard Max. “S” Equivalent - Optional Data Package  
A. Certificate of Compliance  
2. Rad Hard TXV Equivalent - Optional Data Package  
A. Certificate of Compliance  
B. Serialization Records  
B. Assembly Flow Chart  
C. Assembly Flow Chart  
C. Preconditioning - Attributes Data Sheet  
- Precondition Lot Traveler  
- Pre and Post Burn-In Read and Record  
Data  
D. SEM Photos and Report  
E. Preconditioning - Attributes Data Sheet  
- Hi-Rel Lot Traveler  
D. Group A  
- Attributes Data Sheet  
- Group A Lot Traveler  
- HTRB - Hi Temp Gate Stress Post  
Reverse Bias Data and Delta Data  
- HTRB - Hi Temp Drain Stress Post  
Reverse Bias Delta Data  
E. Group B  
- Attributes Data Sheet  
- Group B Lot Traveler  
- X-Ray and X-Ray Report  
- Pre and Post Read and Record Data for  
Intermittent Operating Life (Subgroup B3)  
- Bond Strength Data (Subgroup B3)  
- Pre and Post High Temperature Operating  
Life Read and Record Data (Subgroup B6)  
F. Group A  
G. Group B  
H. Group C  
I. Group D  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups A2, A3, A4, A5 and A7 Data  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups B1, B3, B4, B5 and B6 Data  
F. Group C  
- Attributes Data Sheet  
- Group C Lot Traveler  
- Pre and Post Read and Record Data for  
Intermittent Operating Life (Subgroup C6)  
- Bond Strength Data (Subgroup C6)  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups C1, C2, C3 and C6 Data  
G. Group D  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Group D Lot Traveler  
- Pre and Post RAD Read and Record Data  
- Pre and Post Radiation Data  
Class S - Equivalents  
1. Rad Hard “S” Equivalent - Standard Data Package  
A. Certificate of Compliance  
B. Serialization Records  
C. Assembly Flow Chart  
D. SEM Photos and Report  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
FSF150D, FSF150R  
TO-254AA  
3 LEAD JEDEC TO-254AA HERMETIC METAL PACKAGE  
A
INCHES  
MIN  
MILLIMETERS  
ØP  
E
A
SYMBOL  
MAX  
0.260  
0.050  
0.045  
0.800  
0.545  
MIN  
6.33  
MAX  
6.60  
NOTES  
1
A
0.249  
0.040  
0.035  
0.790  
0.535  
-
Q
A
1.02  
1.27  
-
1
H
1
Øb  
D
0.89  
1.14  
2, 3  
20.07  
13.59  
20.32  
13.84  
-
-
E
D
e
0.150 TYP  
0.300 BSC  
3.81 TYP  
7.62 BSC  
4
4
-
e
1
H
0.245  
0.265  
0.160  
0.560  
0.149  
0.130  
6.23  
6.73  
4.06  
1
1
J
0.140  
0.520  
0.139  
0.110  
3.56  
13.21  
3.54  
4
-
L
14.22  
3.78  
0.065 R MAX.  
TYP.  
ØP  
Q
-
L
Øb  
2.80  
3.30  
-
NOTES:  
1. These dimensions are within allowable dimensions of Rev. A of  
JEDEC outline TO-254AA dated 11-86.  
1
2
3
J
e
1
2. Add typically 0.002 inches (0.05mm) for solder coating.  
3. Lead dimension (without solder).  
e
1
4. Position of lead to be measured 0.250 inches (6.35mm) from bot-  
tom of dimension D.  
5. Die to base BeO isolated, terminals to case ceramic isolated.  
6. Controlling dimension: Inch.  
7. Revision 1 dated 1-93.  
WARNING!  
BERYLLIA WARNING PER MIL-S-19500  
Packages containing beryllium oxide (BeO) shall not be ground, machined, sandblasted, or subject to any mechanical  
operation which will produce dust containing any beryllium compound. Packages containing any beryllium compound  
shall not be subjected to any chemical process (etching, etc.) which will produce fumes containing beryllium or its’  
compounds.  
©2001 Fairchild Semiconductor Corporation  
FSF150D, FSF150R Rev. A  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
PACMAN™  
POP™  
PowerTrench  
QFET™  
QS™  
QT Optoelectronics™  
Quiet Series™  
SILENT SWITCHER  
SMART START™  
Star* Power™  
Stealth™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
TinyLogic™  
UHC™  
FAST  
FASTr™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MICROWIRE™  
OPTOLOGIC™  
OPTOPLANAR™  
ACEx™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
DenseTrench™  
DOME™  
UltraFET™  
VCX™  
EcoSPARK™  
E2CMOSTM  
EnSignaTM  
FACT™  
FACT Quiet Series™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TOANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOTASSUMEANY LIABILITYARISING OUT OF THEAPPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUTTHE EXPRESS WRITTENAPPROVALOF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H  

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