FQU10N20LTU [FAIRCHILD]
Power Field-Effect Transistor, 7.6A I(D), 200V, 0.38ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251, IPAK-3;
| 型号： | FQU10N20LTU |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 7.6A I(D), 200V, 0.38ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251, IPAK-3 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：786K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 2013
FQD10N20L
N-Channel QFET® MOSFET
200 V, 7.6 A, 360 mΩ
Description
Features
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, active power
factor correction (PFC), and electronic lamp ballasts.
•
7.6 A, 200 V, RDS(on) = 360 mΩ (Max.) @ VGS = 10 V,
ID = 3.8 A
•
•
•
•
Low Gate Charge (Typ. 13 nC)
Low Crss (Typ. 14 pF)
100% Avalanche Tested
Low Level Gate Drive Requirements Allowing
Direct Operation Form Logic Drivers
D
D
G
G
S
D-PAK
S
Absolute Maximum Ratings
T = 25°C unless otherwise noted.
C
Symbol
Parameter
FQD10N20LTM
Unit
V
V
I
Drain-Source Voltage
200
7.6
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
4.8
A
C
I
(Note 1)
Drain Current
- Pulsed
30.4
± 20
180
A
DM
V
E
I
Gate-Source Voltage
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
7.6
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
5.1
mJ
V/ns
W
AR
dv/dt
5.5
Power Dissipation (T = 25°C) *
2.5
P
A
D
Power Dissipation (T = 25°C)
51
W
C
- Derate above 25°C
0.4
W/°C
°C
T , T
Operating and Storage Temperature Range
-55 to +150
J
STG
Maximum lead temperature for soldering,
1/8” from case for 5 seconds
T
300
°C
L
Thermal Characteristics
Symbol
Parameter
Thermal Resistance, Junction to Case, Max.
FQD10N20LTM
Unit
RJC
2.48
110
50
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max.
Thermal Resistance, Junction to Ambient (*1 in2 Pad of 2-oz Copper), Max.
oC/W
RJA
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
www.fairchildsemi.com
1
Package Marking and Ordering Information
Part Number
Top Mark
Package
Packing Method Reel Size Tape Width
Tape and Reel 16 mm
330 mm
Quantity
FQD10N20LTM
FQD10N20L
DPAK
2500 units
Electrical Characteristics
T = 25°C unless otherwise noted.
C
Symbol
Parameter
Test Conditions
Min. Typ.
Max.
Unit
Off Characteristics
BV
V
= 0 V, I = 250 µA
GS D
Drain-Source Breakdown Voltage
200
--
--
--
--
V
DSS
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
I
= 250 µA, Referenced to 25°C
0.18
V/°C
D
/ ∆T
J
I
V
V
V
V
= 200 V, V = 0 V
--
--
--
--
--
--
--
--
1
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= 160 V, T = 125°C
10
DS
GS
GS
C
I
I
= 20 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
100
-100
GSSF
DS
= -20 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
V
= V , I = 250 µA
Gate Threshold Voltage
1.0
--
--
2.0
V
Ω
S
GS(th)
DS
GS
D
= 10 V, I = 3.8 A
R
Static Drain-Source
On-Resistance
0.29
0.3
0.36
0.38
GS
GS
D
DS(on)
= 5 V, I = 3.8 A
D
g
= 30 V, I = 3.8 A
Forward Transconductance
--
9.6
--
FS
DS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
640
95
830
125
18
pF
pF
pF
iss
V
= 25 V, V = 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
14
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
13
150
50
35
310
110
200
17
ns
ns
d(on)
V
= 100 V, I = 10 A,
DD
D
r
R
= 25 Ω
G
(Note 4)
(Note 4)
ns
d(off)
f
95
ns
Q
Q
Q
13
nC
nC
nC
g
V
V
= 160 V, I = 10 A,
DS
D
2.4
6.1
--
= 5 V
gs
gd
GS
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
7.6
30.4
1.5
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = 7.6 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = 10 A,
120
0.57
ns
µC
rr
GS
S
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 4.7 mH, I = 7.6 A, V = 50 V, R = 25 Ω, starting T = 25°C.
AS
DD
G
J
3. I ≤ 10 A, di/dt ≤ 300 A/µs, V ≤ BV
starting
T = 25°C.
SD
DD
DSS,
J
4. Essentially independent of operating temperature.
www.fairchildsemi.com
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
2
Typical Characteristics
VGS
Top :
10 V
8.0 V
6.0 V
5.0 V
4.5 V
4.0 V
3.5 V
101
101
Bottom : 3.0 V
℃
150
100
100
℃
25
※
Notes :
※
Notes :
μ
2. TC = 25
1. 250 s Pulse Test
℃
-55
1. VDS = 30V
℃
μ
2. 250 s Pulse Test
-1
-1
10
10
-1
100
101
0
2
4
6
8
10
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.6
1.2
0.8
0.4
0.0
101
VGS = 5V
VGS = 10V
100
※
Notes :
℃
℃
25
150
1. VGS = 0V
※
℃
Note : T = 25
J
μ
2. 250 s Pulse Test
-1
10
0
5
10
15
20
25
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID , Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1500
1200
900
600
300
0
12
10
8
C
iss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
rss = C
C
gd
VDS = 40V
VDS = 100V
C
iss
VDS = 160V
6
Coss
4
※
Notes :
1. V = 0 V
2. f = 1 MHz
C
rss
2
※
Note : ID = 10 A
20
0
-1
10
100
101
0
4
8
12
16
24
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
www.fairchildsemi.com
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
3
(Continued)
Typical Characteristics
1.2
1.1
1.0
0.9
0.8
3.0
2.5
2.0
1.5
1.0
0.5
0.0
※Notes :
1. VGS = 0 V
2. ID = 250 μA
※
Notes :
1. VGS = 10 V
2. ID = 5 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
T, Junction Temperature [oC]
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
8
6
4
2
0
Operation in This Area
is Limited by RDS(on)
102
101
100
10-1
10 µs
100 µs
1 ms
10 ms
DC
※
Notes :
1. TC = 25 o
2. TJ = 150 o
3. Single Pulse
C
C
100
101
102
25
50
75
100
125
150
℃
TC, Case Temperature [
]
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 . 5
1 0 0
0 . 2
※
N o t e s
:
℃
/W M a x .
2 . D u t y F a c t o r , D = t 1 /t 2
1 . Z θ C(t )
=
2 .4 8
J
0 . 1
3 . T J
-
T C
=
P D
* Z θ C(t )
J
M
M
0 . 0 5
1 0 -1
0 . 0 2
PDM
0 . 0 1
s i n g le p u ls e
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1
, S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
www.fairchildsemi.com
4
VGS
Same Type
as DUT
50KΩ
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
I
= const.
G
Charge
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
tr
td(off)
tf
t on
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
V
VDS (t)
VDD
DUT
GS
t p
t p
Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
www.fairchildsemi.com
5
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
www.fairchildsemi.com
6
Mechanical Dimensions
Figure 16. TO-252 (D-PAK), Molded, 3-Lead, Jedec TO-252 VAR. AB, Surface Mount
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO252-003
7
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©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
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intended to be an exhaustive list of all such trademarks.
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Sync-Lock™
®*
®
®
®
tm
®
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QS™
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™
®
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®
®
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Gmax™
GTO™
TinyCalc™
®
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Current Transfer Logic™
IntelliMAX™
®
DEUXPEED
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Marking Small Speakers Sound Louder
and Better™
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®
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Saving our world, 1mW/W/kW at a time™
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®
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FACT
FAST
®
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Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
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First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I66
8
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©2000 Fairchild Semiconductor Corporation
FQD10N20L Rev. C1
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