FQI28N15 [FAIRCHILD]

150V N-Channel MOSFET; 150V N沟道MOSFET
FQI28N15
型号: FQI28N15
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

150V N-Channel MOSFET
150V N沟道MOSFET

文件: 总9页 (文件大小:630K)
中文:  中文翻译
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December 2000  
TM  
QFET  
FQB28N15 / FQI28N15  
150V N-Channel MOSFET  
General Description  
Features  
These N-Channel enhancement mode power field effect  
transistors are produced using Fairchild’s proprietary,  
planar stripe, DMOS technology.  
28A, 150V, R  
= 0.09@V = 10 V  
DS(on) GS  
Low gate charge ( typical 40 nC)  
Low Crss ( typical 50 pF)  
Fast switching  
100% avalanche tested  
Improved dv/dt capability  
This advanced technology is especially tailored to minimize  
on-state  
resistance,  
provide  
superior  
switching  
performance, and withstand high energy pulse in the  
avalanche and commutation modes. These devices are  
well suited for low voltage applications such as audio  
amplifiers, high efficiency switching for DC/DC converters,  
DC motor control, and uninterrupted power supplies.  
175°C maximum junction temperature rating  
D
!
D
"
! "  
"
!
G
"
G
S
D2-PAK  
FQB Series  
I2-PAK  
FQI Series  
G
D
S
!
S
Absolute Maximum Ratings  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
FQB28N15 / FQI28N15  
Units  
V
V
I
Drain-Source Voltage  
150  
28  
DSS  
- Continuous (T = 25°C)  
Drain Current  
A
D
C
- Continuous (T = 100°C)  
19.8  
112  
A
C
I
(Note 1)  
Drain Current  
- Pulsed  
A
DM  
V
E
I
Gate-Source Voltage  
± 25  
300  
V
GSS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
mJ  
A
AS  
28  
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
16.8  
5.5  
mJ  
V/ns  
W
AR  
dv/dt  
Power Dissipation (T = 25°C) *  
3.75  
168  
P
A
D
Power Dissipation (T = 25°C)  
W
C
- Derate above 25°C  
Operating and Storage Temperature Range  
1.12  
-55 to +175  
W/°C  
°C  
T , T  
J
STG  
Maximum lead temperature for soldering purposes,  
1/8" from case for 5 seconds  
T
300  
°C  
L
Thermal Characteristics  
Symbol  
Parameter  
Typ  
--  
Max  
0.89  
40  
Units  
°C/W  
°C/W  
°C/W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Junction-to-Ambient *  
Thermal Resistance, Junction-to-Ambient  
θJC  
θJA  
θJA  
--  
--  
62.5  
* When mounted on the minimum pad size recommended (PCB Mount)  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Electrical Characteristics  
T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV  
V
= 0 V, I = 250 µA  
GS D  
Drain-Source Breakdown Voltage  
150  
--  
--  
--  
--  
V
DSS  
BV  
Breakdown Voltage Temperature  
Coefficient  
DSS  
I
= 250 µA, Referenced to 25°C  
0.17  
V/°C  
D
/
T  
J
I
V
V
V
V
= 150 V, V = 0 V  
--  
--  
--  
--  
--  
--  
--  
--  
1
µA  
µA  
nA  
nA  
DSS  
DS  
GS  
Zero Gate Voltage Drain Current  
= 120 V, T = 150°C  
10  
DS  
GS  
GS  
C
I
= 25 V, V = 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
100  
-100  
GSSF  
DS  
I
= -25 V, V = 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
= V , I = 250 µA  
Gate Threshold Voltage  
2.0  
--  
--  
4.0  
0.09  
--  
V
S
GS(th)  
DS  
GS  
DS  
GS  
D
R
g
= 10 V, I = 14 A  
Static Drain-Source On-Resistance  
Forward Transconductance  
0.067  
18.5  
DS(on)  
D
(Note 4)  
= 40 V, I = 14 A  
--  
FS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
--  
--  
--  
1250  
260  
50  
1600  
340  
65  
pF  
pF  
pF  
iss  
V
= 25 V, V = 0 V,  
GS  
DS  
Output Capacitance  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
--  
--  
--  
--  
--  
--  
--  
17  
180  
100  
115  
40  
45  
370  
210  
240  
52  
ns  
ns  
d(on)  
V
= 75 V, I = 28 A,  
DD  
D
r
R
= 25 Ω  
G
ns  
d(off)  
f
(Note 4, 5)  
(Note 4, 5)  
ns  
Q
Q
Q
nC  
nC  
nC  
g
V
V
= 120 V, I = 28 A,  
DS  
D
7.9  
20  
--  
= 10 V  
gs  
gd  
GS  
--  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
--  
--  
--  
--  
--  
--  
--  
28  
112  
1.5  
--  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0 V, I = 28 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
--  
V
SD  
GS  
S
= 0 V, I = 28 A,  
100  
0.4  
ns  
µC  
rr  
GS  
S
(Note 4)  
dI / dt = 100 A/µs  
Q
Reverse Recovery Charge  
--  
F
rr  
Notes:  
1. Repetitive Rating : Pulse width limited by maximum junction temperature  
2. L = 0.64mH, I = 28A, V = 25V, R = 25 Ω, Starting T = 25°C  
AS  
DD  
G
J
3. I 28A, di/dt 300A/us, V BV  
Starting T = 25°C  
SD  
DD  
DSS,  
J
4. Pulse Test : Pulse width 300µs, Duty cycle 2%  
5. Essentially independent of operating temperature  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Typical Characteristics  
102  
101  
100  
102  
VGS  
Top :  
15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.0 V  
5.5 V  
5.0 V  
Bottom : 4.5 V  
175  
101  
25  
-55  
Notes :  
μ
Notes :  
1. 250 s Pulse Test  
100  
1. VDS = 40V  
2. TC = 25  
μ
2. 250 s Pulse Test  
-1  
10  
10-1  
100  
101  
2
4
6
8
10  
VGS, Gate-Source Voltage [V]  
VDS, Drain-Source Voltage [V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
300  
240  
180  
120  
60  
102  
101  
100  
VGS = 10V  
VGS = 20V  
Notes :  
175  
25  
1. VGS = 0V  
2. 250 s Pulse Test  
Note : T = 25  
J
μ
-1  
0
10  
0
20  
40  
60  
80  
100  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
ID , Drain Current [A]  
VSD, Source-Drain voltage [V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
3000  
2500  
2000  
1500  
1000  
500  
12  
10  
8
C
iss = Cgs + Cgd (Cds = shorted)  
Coss = Cds + C  
gd  
Crss = Cgd  
VDS = 30V  
VDS = 75V  
C
iss  
VDS = 120V  
Coss  
6
4
Notes :  
C
rss  
1. VGS = 0 V  
2. f = 1 MHz  
2
Note : ID = 28 A  
36  
0
10  
0
-1  
100  
101  
0
9
18  
27  
45  
QG, Total Gate Charge [nC]  
VDS, Drain-Source Voltage [V]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Typical Characteristics (Continued)  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.2  
1.1  
1.0  
Notes :  
1. VGS = 0 V  
2. ID = 250 μA  
0.9  
Notes :  
1. VGS = 10 V  
2. ID = 14 A  
0.8  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
TJ, Junction Temperature [oC]  
TJ, Junction Temperature [oC]  
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
30  
25  
20  
15  
10  
5
Operation in This Area  
is Limited by R DS(on)  
102  
101  
100  
100 µs  
1 ms  
10 ms  
DC  
Notes :  
1. TC = 25 o  
2. TJ = 175 o  
C
C
3. Single Pulse  
-1  
0
25  
10  
100  
101  
102  
50  
75  
100  
125  
150  
175  
TC, Case Temperature [  
]
VDS, Drain-Source Voltage [V]  
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs. Case Temperature  
1 0 0  
D = 0 .5  
N o te s  
1 . Z θ J C(t)  
2 . D u ty F a c to r, D = t1 /t2  
:
0 .2  
/W M a x .  
=
0 .8 9  
1 0 -1  
0 .1  
3 . T J M  
-
T C  
=
P D  
* Z θ J C(t)  
M
0 .0 5  
PDM  
0 .0 2  
0 .0 1  
t1  
s in g le p u ls e  
t2  
1 0 -2  
1 0 -5  
1 0 -4  
1 0 -3  
1 0 -2  
1 0 -1  
1 0 0  
1 0 1  
t1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]  
Figure 11. Transient Thermal Response Curve  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Gate Charge Test Circuit & Waveform  
VGS  
Same Type  
50KΩ  
as DUT  
Qg  
12V  
200nF  
10V  
300nF  
VDS  
VGS  
Qgs  
Qgd  
DUT  
3mA  
Charge  
Resistive Switching Test Circuit & Waveforms  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
10V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
--------------------  
BVDSS - VDD  
L
1
2
2
----  
EAS  
=
L IAS  
VDS  
I D  
BVDSS  
IAS  
RG  
VDD  
ID (t)  
VDD  
VDS (t)  
DUT  
10V  
t p  
t p  
Time  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Package Dimensions  
D2PAK  
4.50 ±0.20  
9.90 ±0.20  
+0.10  
–0.05  
1.30  
0.10 ±0.15  
2.40 ±0.20  
0.80 ±0.10  
1.27 ±0.10  
+0.10  
0.50  
–0.05  
2.54 TYP  
2.54 TYP  
10.00 ±0.20  
(8.00)  
(4.40)  
10.00 ±0.20  
(2XR0.45)  
0.80 ±0.10  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
Package Dimensions (Continued)  
I2PAK  
4.50 ±0.20  
9.90 ±0.20  
+0.10  
0.05  
1.30  
1.27 ±0.10  
1.47 ±0.10  
0.80 ±0.10  
+0.10  
0.05  
0.50  
2.40 ±0.20  
2.54 TYP  
2.54 TYP  
10.00 ±0.20  
©2000 Fairchild Semiconductor International  
Rev. A2, December 2000  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
HiSeC™  
SuperSOT™-8  
SyncFET™  
TinyLogic™  
UHC™  
Bottomless™  
CoolFET™  
CROSSVOLT™  
E2CMOS™  
FACT™  
ISOPLANAR™  
MICROWIRE™  
POP™  
PowerTrench®  
QFET™  
VCX™  
FACT Quiet Series™  
QS™  
FAST®  
Quiet Series™  
SuperSOT™-3  
SuperSOT™-6  
FASTr™  
GTO™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY  
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY  
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;  
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR  
INTERNATIONAL.  
As used herein:  
result in significant injury to the user.  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the body,  
or (b) support or sustain life, or (c) whose failure to perform  
when properly used in accordance with instructions for use  
provided in the labeling, can be reasonably expected to  
2. A critical component is any component of a life support  
device or system whose failure to perform can be  
reasonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or In  
Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
©2000 Fairchild Semiconductor International  
Rev. A, January 2000  

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