FQD11P06TM_SB82077 [FAIRCHILD]
Power Field-Effect Transistor, 9.4A I(D), 60V, 0.185ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, LEAD FREE, DPAK-3;
| 型号： | FQD11P06TM_SB82077 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Power Field-Effect Transistor, 9.4A I(D), 60V, 0.185ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, LEAD FREE, DPAK-3 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：632K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
QFET
FQD11P06 / FQU11P06
60V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
•
•
•
•
•
•
-9.4A, -60V, R
= 0.185Ω @V = -10 V
DS(on) GS
Low gate charge ( typical 13 nC)
Low Crss ( typical 45 pF)
Fast switching
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as automotive,
DC/DC converters, and high efficiency switching for power
management in portable and battery operated products.
100% avalanche tested
Improved dv/dt capability
S
!
D
●
●
G
!
▶
▲
●
I-PAK
FQU Series
D-PAK
FQD Series
G
S
G D S
!
D
Absolute Maximum Ratings
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQD11P06 / FQU11P06
Units
V
A
V
I
Drain-Source Voltage
Drain Current
-60
-9.4
DSS
- Continuous (T = 25°C)
D
C
- Continuous (T = 100°C)
- Pulsed
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
-5.95
-37.6
± 30
160
-9.4
3.8
A
A
V
mJ
A
mJ
V/ns
W
C
I
(Note 1)
Drain Current
DM
V
E
I
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
AR
dv/dt
-7.0
2.5
Power Dissipation (T = 25°C) *
P
A
D
Power Dissipation (T = 25°C)
38
0.3
-55 to +150
W
W/°C
°C
C
- Derate above 25°C
Operating and Storage Temperature Range
T , T
J
STG
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
T
300
°C
L
Thermal Characteristics
Symbol
Parameter
Typ
--
--
Max
3.28
50
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
θJC
θJA
θJA
--
110
* When mounted on the minimum pad size recommended (PCB Mount)
©2004 Fairchild Semiconductor Corporation
Rev. C4, August 2004
Elerical Characteristics
T = 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
∆BV
/
V
I
= 0 V, I = -250 µA
GS D
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
-60
--
--
--
--
V
DSS
DSS
∆T
= -250 µA, Referenced to 25°C
-0.07
V/°C
D
J
I
V
V
V
V
= -60 V, V = 0 V
--
--
--
--
--
--
--
--
-1
-10
-100
100
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= -48 V, T = 125°C
DS
GS
GS
C
I
= -25 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
GSSF
GSSR
DS
I
= 25 V, V = 0 V
DS
On Characteristics
V
R
V
V
V
= V , I = -250 µA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
-2.0
--
--
-4.0
0.185
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
DS(on)
= -10 V, I = -4.7 A
0.15
4.9
D
g
= -30 V, I = -4.7 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
--
--
--
420
195
45
550
250
60
pF
pF
pF
iss
V
= -25 V, V = 0 V,
GS
DS
oss
rss
f = 1.0 MHz
Switching Characteristics
t
t
t
t
Q
Q
Q
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
6.5
40
15
45
13
25
90
40
100
17
--
ns
ns
ns
d(on)
V
R
= -30 V, I = -5.7 A,
= 25 Ω
DD
D
r
G
d(off)
f
(Note 4, 5)
(Note 4, 5)
ns
nC
nC
nC
g
V
V
= -48 V, I = -11.4 A,
DS
GS
D
2.0
6.3
= -10 V
gs
gd
--
Drain-Source Diode Characteristics and Maximum Ratings
I
I
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
--
--
--
--
--
--
--
--
83
0.26
-9.4
-37.6
-4.0
--
A
A
V
ns
µC
S
SM
V
t
V
V
= 0 V, I = -9.4 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
SD
GS
S
= 0 V, I = -11.4 A,
rr
GS
S
dI / dt = 100 A/µs
(Note 4)
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 2.1mH, I = -9.4A, V = -25V, R = 25 Ω, Starting T = 25°C
AS
DD
G
DSS,
J
3. I ≤ -11.4A, di/dt ≤ 300A/µs, V ≤ BV
Starting T = 25°C
J
SD
DD
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2004 Fairchild Semiconductor Corporation
Rev. C4, August 2004
Typical Characteristics
VGS
Top : - 15.0 V
- 10.0 V
- 8.0 V
1
101
10
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom : - 4.5 V
150℃
0
100
10
25℃
-55℃
※
Notes :
1. 250µ s Pulse Test
2. TC = 25
※
Notes :
1. VDS = -30V
2. 250µ s Pulse Test
℃
-1
10
-1
-1
10
100
101
2
4
6
8
10
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.8
101
100
0.6
0.4
0.2
0.0
VGS = - 10V
VGS = - 20V
※
Notes :
25℃
150℃
1. VGS = 0V
※
Note : T = 25℃
J
2. 250µ s Pulse Test
-1
10
0
10
20
30
40
50
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
1000
800
600
400
200
0
12
10
8
C
iss = Cgs + Cgd (Cds = shorted)
oss = Cds + Cgd
rss = Cgd
C
C
VDS = -30V
VDS = -48V
C
oss
C
iss
※
Notes :
6
1. VGS = 0 V
2. f = 1 MHz
4
C
rss
2
※
Note : ID = -11.4 A
12
0
100
101
-1
0
2
4
6
8
10
14
10
QG, Total Gate Charge [nC]
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2004 Fairchild Semiconductor Corporation
Rev.C4, August 2004
Typical Characteristics (Continued)
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
※
Notes :
0.9
※
Notes :
1. VGS = 0 V
2. ID = -250 µ A
1. VGS = -10 V
2. ID = -4.7 A
0.8
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
TJ, Junction Temperature [oC]
T, Junction Temperature [oC]
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
10
8
2
Operation in This Area
is Limited by R DS(on)
10
100 µs
1 ms
1
10
6
10 ms
DC
4
0
10
※
Notes :
2
1. TC = 25 o
C
C
2. TJ = 150 o
3. Single Pulse
-1
0
10
100
101
102
25
50
75
100
125
150
TC, Case Temperature [℃]
-VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
1 0 0
0 .2
※
N o te s
1 . Z θ J C(t)
2 . D u ty F a c to r, D = t1/t2
3 . T J M T C P D M Z θ J C(t)
:
=
3 .2 8 ℃ /W M a x.
0 .1
-
=
*
0 .0 5
0 .0 2
1 0 -1
PDM
0 .0 1
sin g le p u lse
t1
t2
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1 , S q u a re W a ve P u ls e D u ra tio n [s e c]
Figure 11. Transient Thermal Response Curve
©2004 Fairchild Semiconductor Corporation
Rev.C4, August 2004
Gate Charge Test Circuit & Waveform
VGS
Same Type
50KΩ
as DUT
-10V
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
t on
t off
VDS
td(on)
tr
td(off)
tf
VDD
VGS
VGS
RG
10%
DUT
-10V
90%
VDS
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
L
1
2
----
--------------------
BVDSS - VDD
EAS
=
LIAS
VDS
ID
2
t p
Time
VDD
VDS (t)
RG
VDD
ID (t)
DUT
-10V
IAS
BVDSS
t p
©2004 Fairchild Semiconductor Corporation
Rev.C4, August 2004
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
VDS
DUT
I SD
_
L
Driver
RG
Compliment of DUT
(N-Channel)
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
Gate Pulse Period
VGS
D =
10V
( Driver )
Body Diode Reverse Current
IRM
I SD
( DUT )
di/dt
IFM , Body Diode Forward Current
VSD
VDS
( DUT )
Body Diode
Forward Voltage Drop
VDD
Body Diode Recovery dv/dt
©2004 Fairchild Semiconductor Corporation
Rev.C4, August 2004
Package Dimensions
D-PAK
6.60 ±0.20
5.34 ±0.30
2.30 ±0.10
0.50 ±0.10
(0.50)
(4.34)
(0.50)
MAX0.96
0.76 ±0.10
0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
2.30TYP
2.30TYP
[2.30±0.20]
[2.30±0.20]
6.60 ±0.20
(5.34)
(5.04)
(1.50)
(2XR0.25)
0.76 ±0.10
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. C4, August 2004
Package Dimensions (Continued)
I-PAK
2.30 ±0.20
0.50 ±0.10
6.60 ±0.20
5.34 ±0.20
(0.50)
(4.34)
(0.50)
MAX0.96
0.76 ±0.10
0.50 ±0.10
2.30TYP
2.30TYP
[2.30±0.20]
[2.30±0.20]
Dimensions in Millimeters
©2004 Fairchild Semiconductor Corporation
Rev. C4, August 2004
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intended to be an exhaustive list of all such trademarks.
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MICROCOUPLER™
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MicroPak™
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MSX™
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QFET®
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
A
CEx™
FASTr™
ActiveArray™
Bottomless™
CoolFET™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
QS™
CROSSVOLT™
DOME™
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Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
TinyLogic®
HiSeC™
TINYOPTO™
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UHC™
EcoSPARK™
I2C™
MSXPro™
E2CMOS™
i-Lo™
OCX™
EnSigna™
ImpliedDisconnect™
OCXPro™
UltraFET®
FACT™
OPTOLOGIC®
OPTOPLANAR™
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POP™
SILENT SWITCHER® VCX™
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SPM™
FACT Quiet Series™
Across the board. Around the world.™
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2004 Fairchild Semiconductor Corporation
Rev. I11
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