概述
规格参数
数据手册FQAF12N60 概述
600V N-Channel MOSFET 600V N沟道MOSFET 功率场效应晶体管
FQAF12N60 规格参数
| 是否Rohs认证： | 符合 | 生命周期： | Obsolete |
| 零件包装代码： | TO-3PF | 包装说明： | TO-3PF, 3 PIN |
| 针数： | 3 | Reach Compliance Code： | unknown |
| 风险等级： | 5.75 | 其他特性： | AVALANCHE RATED |
| 雪崩能效等级（Eas）： | 790 mJ | 外壳连接： | ISOLATED |
| 配置： | SINGLE WITH BUILT-IN DIODE | 最小漏源击穿电压： | 600 V |
| 最大漏极电流 (Abs) (ID)： | 7.8 A | 最大漏极电流 (ID)： | 7.8 A |
| 最大漏源导通电阻： | 0.7 Ω | FET 技术： | METAL-OXIDE SEMICONDUCTOR |
| JESD-30 代码： | R-PSFM-T3 | JESD-609代码： | e3 |
| 元件数量： | 1 | 端子数量： | 3 |
| 工作模式： | ENHANCEMENT MODE | 最高工作温度： | 150 °C |
| 封装主体材料： | PLASTIC/EPOXY | 封装形状： | RECTANGULAR |
| 封装形式： | FLANGE MOUNT | 峰值回流温度（摄氏度）： | NOT APPLICABLE |
| 极性/信道类型： | N-CHANNEL | 最大功率耗散 (Abs)： | 100 W |
| 最大脉冲漏极电流 (IDM)： | 31 A | 认证状态： | Not Qualified |
| 子类别： | FET General Purpose Power | 表面贴装： | NO |
| 端子面层： | Matte Tin (Sn) | 端子形式： | THROUGH-HOLE |
| 端子位置： | SINGLE | 处于峰值回流温度下的最长时间： | NOT APPLICABLE |
| 晶体管应用： | SWITCHING | 晶体管元件材料： | SILICON |
| Base Number Matches： | 1 |
FQAF12N60 数据手册
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PDF下载April 2000
TM
QFET
FQAF12N60
600V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply.
•
•
•
•
•
•
7.8A, 600V, R
= 0.7 Ω @ V = 10 V
DS(on) GS
Low gate charge ( typical 42 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capabilit
D
!
"
! "
"
G
!
"
TO-3PF
FQAF Series
!
S
G
D S
Absolute Maximum Ratings
ꢀꢀ
T = 25°C unless otherwise noted
C
Symbol
Parameter
FQAF12N60
Units
V
V
I
Drain-Source Voltage
600
7.8
DSS
- Continuous (T = 25°C)
Drain Current
A
D
C
- Continuous (T = 100°C)
4.9
A
C
I
(Note 1)
Drain Current
- Pulsed
31
A
DM
V
E
I
Gate-Source Voltage
±ꢀ30
790
V
GSS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
AS
7.8
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
10
mJ
AR
dv/dt
4.5
Vꢀns
W
P
Power Dissipation (T = 25°C)
100
D
C
- Derate above 25°C
Operating and Storage Temperature Range
0.8
W/°C
°C
T , T
-55 to +150
J
STG
Maximum lead temperature for soldering purposes,
T
300
°C
L
1/8ꢁ from case for 5 seconds
Thermal Characteristics
Symbol
Parameter
Typ
--
Max
1.25
40
Units
°CꢁW
°CꢁW
R
R
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
θ
θ
JC
JA
--
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Electrical Characteristics
ꢀꢀꢀꢀꢀ
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
V
= 0 V, I = 250 µA
GS D
Drain-Source Breakdown Voltage
600
--
--
--
--
V
DSS
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
J
I
= 250 µA, Referenced to 25°C
0.71
V/°C
D
/
I
∆T
V
V
V
V
= 600 V, V = 0 V
--
--
--
--
--
--
--
--
10
100
100
-100
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= 480 V, T = 125°C
DS
GS
GS
C
I
I
= 30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
GSSF
DS
= -30 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V , I = 250 µA
Gate Threshold Voltage
3.0
--
--
5.0
0.7
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= 10 V, I = 3.9 A
0.55
8.4
D
g
= 50 V, I = 3.9 A
(Note 4)
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
1480
200
25
1900
270
35
pF
pF
pF
iss
V
= 25 V, V = 0 V,
GS
DS
Output Capacitance
f = 1.0 MHz
oss
rss
Reverse Transfer Capacitance
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
30
115
95
70
240
200
180
54
ns
ns
d(on)
V
= 300 V, I = 12 A,
DD
D
r
R
= 25 Ω
G
ns
d(off)
f
(Note 4, 5)
(Note 4, 5)
85
ns
Q
Q
Q
42
nC
nC
nC
V
= 480 V, I = 12 A,
g
DS
GS
D
V
= 10 V
8.6
21
--
gs
gd
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
7.8
31
1.4
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = 7.8 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = 12 A,
380
3.5
ns
µC
rr
GS
S
(Note 4)
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 24mH, I = 7.8A, V = 50V, R = 25 Ω, Starting T = 25°C
AS
DD
G
J
3. I ꢀ 12A, di/dt ꢀ 200A/µs, V ꢀ BV
Starting T = 25°C
4. Pulse Test : Pulse width ꢀ 300µs, Duty cycle ꢀ 2%
SD
DD
DSS, J
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Typical Characteristics
V
Top :
15GVS
10V
8.0V
7.0V
6.5V
6.0V
101
101
Bottom : 5.5 V
ꢀ
150
ꢀ
25
100
ꢀ
-55
100
ꢀ
Notes :
ꢀ
Notes :
1. VDS = 50V
2. 250 s Pulse Test
ꢁ
1. 250 s Pulse Test
2. TC = 25
ꢁ
ꢂ
10-1
-1
10
100
101
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1
10
VGS = 10V
VGS = 20V
0
10
ꢀ
150
ꢀ
ꢀ
Notes :
1. VGS = 0V
25
ꢁ
2. 250 s Pulse Test
-1
10
0
5
10
15
20
25
30
35
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
3000
2400
1800
1200
600
12
10
8
C
iss = Cgs + Cgd (Cds = shorted)
C
oss = C + C
gd
rss = Cds
VDS = 120V
VDS = 300V
C
gd
C
iss
VDS = 480V
C
oss
6
4
ꢀ
Notes :
C
rss
1. VGS = 0 V
2. f = 1 MHz
2
ꢀ
Note : ID = 12 A
0
0
10
0
5
10
15
20
25
30
35
40
45
-1
0
10
1
10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Typical Characteristics
(Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.1
1.0
0.9
0.8
ꢀ
Notes:
1. VGS = 0 V
2. ID= 250
ꢀ
Notes :
ꢁ
A
1. V = 10 V
2. IDG=S 6.0 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T, Junction Temperature [oC]
T, Junction Temperature [oC]
J
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
8
6
4
2
0
102
Operation in This Area
is Limited by R DS(on)
10 µs
100 µs
101
100
1 ms
10 ms
DC
-1
10
ꢀ
Notes :
1. TC = 25 o
2. TJ = 150 o
C
C
3. Single Pulse
-2
10
100
101
102
103
25
50
75
100
125
150
ꢀ
TC, Case Temperature [
]
VDS, Drain-Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
1 0 0
D = 0 .5
ꢀ
N o te s
1 . J C(t)
2 . D u ty F a c to r, D = t1 /t2
:
0 .2
0 .1
ꢂ
/W M a x .
Z
=
1 .2 5
ꢀ
3 . T J M
-
T C
=
P D
*
Z
J C(t)
ꢀ
M
1 0 -1
0 .0 5
PDM
0 .0 2
0 .0 1
t1
t2
s in g le p u ls e
1 0 -2
1 0 -5
1 0 -4
1 0 -3
1 0 -2
1 0 -1
1 0 0
1 0 1
t1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Gate Charge Test Circuit & Waveform
VGS
Same Type
50Kꢀ
as DUT
Qg
12V
200nF
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
10V
td(on)
tr
td(off)
tf
t on
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
VDD
VDS (t)
DUT
10V
t p
t p
Time
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
©2000 Fairchild Semiconductor International
Rev. A, April 2000
Package Dimensions
TO-3PF
5.50 ±0.20
3.00 ±0.20
15.50 ±0.20
ø3.60 ±0.20
(1.50)
0.85 ±0.03
2.00 ±0.20
2.00 ±0.20
2.00 ±0.20
2.00 ±0.20
3.30 ±0.20
4.00 ±0.20
+0.20
–0.10
0.75
5.45TYP
[5.45 ±0.30]
5.45TYP
[5.45 ±0.30]
+0.20
–0.10
0.90
©2000 Fairchild Semiconductor International
Rev. A, April 2000
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
HiSeC™
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
Bottomless™
CoolFET™
CROSSVOLT™
E2CMOS™
FACT™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench®
QFET™
VCX™
FACT Quiet Series™
QS™
FAST®
Quiet Series™
SuperSOT™-3
SuperSOT™-6
FASTr™
GTO™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL.
As used herein:
result in significant injury to the user.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2000 Fairchild Semiconductor International
Rev. A, January 2000
FQAF12N60 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| FQAF12P20 | FAIRCHILD | 200V P-Channel MOSFET | 获取价格 |
|
| FQAF13N50 | FAIRCHILD | 500V N-Channel MOSFET | 获取价格 |
|
| FQAF13N80 | FAIRCHILD | 800V N-Channel MOSFET | 获取价格 |
|
| FQAF13N80 | ONSEMI | 功率 MOSFET，N 沟道，QFET®，800V，8A，750mΩ，TO-3PF | 获取价格 |
|
| FQAF14N30 | FAIRCHILD | 300V N-Channel MOSFET | 获取价格 |
|
| FQAF15N70 | FAIRCHILD | 700V N-Channel MOSFET | 获取价格 |
|
| FQAF16N25 | FAIRCHILD | 250V N-Channel MOSFET | 获取价格 |
|
| FQAF16N25C | FAIRCHILD | 250V N-Channel MOSFET | 获取价格 |
|
| FQAF16N50 | FAIRCHILD | 500V N-Channel MOSFET | 获取价格 |
|
| FQAF16N50 | ONSEMI | 功率 MOSFET，N 沟道，QFET®， 500 V，11.3 A，320 mΩ，TO-3PF | 获取价格 |
|
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