FDMS3016DC [FAIRCHILD]

N-Channel Dual CoolTM PowerTrench MOSFET 30 V, 49 A, 6.0; N沟道双CoolTM的PowerTrench MOSFET的30 V , 49 A, 6.0
FDMS3016DC
型号: FDMS3016DC
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

N-Channel Dual CoolTM PowerTrench MOSFET 30 V, 49 A, 6.0
N沟道双CoolTM的PowerTrench MOSFET的30 V , 49 A, 6.0

文件: 总8页 (文件大小:435K)
中文:  中文翻译
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July 2010  
FDMS3016DC  
N-Channel Dual CoolTM PowerTrench® MOSFET  
30 V, 49 A, 6.0 mΩ  
Features  
General Description  
„ Dual CoolTM Top Side Cooling PQFN package  
„ Max rDS(on) = 6.0 mΩ at VGS = 10 V, ID = 12 A  
„ Max rDS(on) = 9.0 mΩ at VGS = 4.5 V, ID = 10 A  
„ High performance technology for extremely low rDS(on)  
„ RoHS Compliant  
This N-Channel MOSFET is produced using Fairchild  
Semiconductor’s  
advanced  
PowerTrench®  
process.  
Advancements in both silicon and Dual CoolTM package  
technologies have been combined to offer the lowest rDS(on)  
while maintaining excellent switching performance by extremely  
low Junction-to-Ambient thermal resistance.  
Applications  
„ Synchronous Rectifier for DC/DC Converters  
„ Telecom Secondary Side Rectification  
„ High End Server/Workstation  
Pin 1  
S
S
4
3
2
1
G
S
S
S
S
D
D
D
D
5
6
7
8
G
D
D
D
D
Top  
Power 56  
Bottom  
MOSFET Maximum Ratings TA = 25°C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
30  
±20  
49  
V
V
Drain Current -Continuous (Package limited)  
-Continuous (Silicon limited)  
-Continuous  
TC = 25 °C  
C = 25 °C  
T
78  
ID  
A
TA = 25 °C  
(Note 1a)  
18  
-Pulsed  
200  
72  
EAS  
Single Pulse Avalanche Energy  
Peak Diode Recovery dv/dt  
Power Dissipation  
(Note 3)  
(Note 4)  
mJ  
dv/dt  
1.3  
V/ns  
TC = 25 °C  
TA = 25 °C  
60  
PD  
W
Power Dissipation  
(Note 1a)  
3.3  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJC  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
Thermal Resistance, Junction to Case  
(Top Source)  
(Bottom Drain)  
(Note 1a)  
5.7  
2.1  
38  
81  
16  
23  
11  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
(Note 1b)  
°C/W  
(Note 1i)  
(Note 1j)  
(Note 1k)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Dual CoolTM Power 56  
Reel Size  
Tape Width  
12 mm  
Quantity  
3016  
FDMS3016DC  
13’’  
3000 units  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
www.fairchildsemi.com  
1
Electrical Characteristics TJ = 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 250 μA, VGS = 0 V  
30  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = 250 μA, referenced to 25 °C  
17  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
VDS = 24 V, VGS = 0 V  
VGS = ±20 V, VDS = 0 V  
1
μA  
±100  
nA  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 250 μA  
1.0  
1.9  
-6  
3.0  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
D = 250 μA, referenced to 25 °C  
GS = 10 V, ID = 12 A  
mV/°C  
V
5.0  
7.0  
7.5  
44  
6.0  
9.0  
9.4  
rDS(on)  
gFS  
Static Drain to Source On Resistance  
Forward Transconductance  
VGS = 4.5 V, ID = 10 A  
mΩ  
VGS = 10 V, ID = 12 A, TJ = 125 °C  
VDS = 5 V, ID = 12 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1038  
513  
87  
1385  
685  
pF  
pF  
pF  
Ω
VDS = 15 V, VGS = 0 V,  
f = 1 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
135  
0.9  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
9
3
18  
10  
ns  
ns  
VDD = 15 V, ID = 12 A,  
V
GS = 10 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
19  
2
35  
ns  
10  
ns  
Qg  
Total Gate Charge  
Total Gate Charge  
Gate to Source Gate Charge  
Gate to Drain “Miller” Charge  
VGS = 0 V to 10 V  
VGS = 0 V to 4.5 V  
16  
7.6  
3
23  
nC  
nC  
nC  
nC  
Qg  
10.6  
VDD = 15 V,  
D = 12 A  
I
Qgs  
Qgd  
2.5  
Drain-Source Diode Characteristics  
V
GS = 0 V, IS = 12 A  
(Note 2)  
(Note 2)  
0.82  
0.73  
25  
1.3  
1.2  
45  
VSD  
Source to Drain Diode Forward Voltage  
V
VGS = 0 V, IS = 1.9 A  
trr  
Reverse Recovery Time  
ns  
IF = 12 A, di/dt = 100 A/μs  
Qrr  
Reverse Recovery Charge  
9
18  
nC  
www.fairchildsemi.com  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
2
Thermal Characteristics  
RθJC  
RθJC  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
RθJA  
Thermal Resistance, Junction to Case  
(Top Source)  
(Bottom Drain)  
(Note 1a)  
(Note 1b)  
(Note 1c)  
(Note 1d)  
(Note 1e)  
(Note 1f)  
5.7  
2.1  
38  
81  
27  
34  
16  
19  
26  
61  
16  
23  
11  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Ambient  
°C/W  
(Note 1g)  
(Note 1h)  
(Note 1i)  
(Note 1j)  
(Note 1k)  
(Note 1l)  
RθJA  
13  
NOTES:  
1. R  
is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. R  
is guaranteed by design while R is determined  
θCA  
θJA  
θJC  
by the user's board design.  
b. 81 °C/W when mounted on  
a minimum pad of 2 oz copper  
a. 38 °C/W when mounted on  
a 1 in pad of 2 oz copper  
2
2
c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper  
d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper  
2
e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper  
f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper  
2
g. 200FPM Airflow, No Heat Sink,1 in pad of 2 oz copper  
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper  
2
i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in pad of 2 oz copper  
j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper  
2
k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in pad of 2 oz copper  
l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper  
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.  
3. E of 72 mJ is based on starting T = 25 °C, L = 1 mH, I = 12 A, V = 27 V, V = 10 V.  
AS  
J
AS  
DD  
GS  
o
4. I 12 A, di/dt 100 A/μs, V BV  
, Starting T = 25 C.  
J
SD  
DD  
DSS  
www.fairchildsemi.com  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
3
Typical Characteristics TJ = 25°C unless otherwise noted  
50  
6
5
4
3
2
1
0
PULSE DURATION = 80s  
VGS = 10V  
DUTY CYCLE = 0.5%MAX  
40  
30  
20  
10  
0
VGS = 4.5V  
VGS = 3V  
VGS = 3.5V  
VGS = 4V  
VGS = 3.5V  
VGS = 4.5V  
VGS = 4V  
PULSE DURATION = 80s  
DUTY CYCLE = 0.5%MAX  
VGS = 3V  
VGS = 10V  
40  
0
1
2
3
4
5
0
10  
20  
30  
50  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
ID, DRAIN CURRENT(A)  
Figure 1. On-Region Characteristics  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs Drain Current and Gate Voltage  
1.8  
50  
PULSE DURATION = 80s  
ID = 12A  
GS = 10V  
DUTY CYCLE = 0.5%MAX  
V
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
40  
30  
20  
10  
0
ID = 12A  
TJ = 125oC  
TJ = 25oC  
4
-50 -25  
0
25  
50  
75  
100 125 150  
2
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
F i gu re 3 . N orma li zed On - Res is ta nc e  
vs Junction Temperature  
Figure4. On-Resistance vs Gate to  
Source Voltage  
50  
50  
PULSE DURATION = 80s  
VGS = 0V  
TJ = 150oC  
10  
DUTY CYCLE = 0.5%MAX  
40  
VDS = 5V  
1
30  
TJ = 25oC  
0.1  
20  
TJ = 150oC  
TJ = 25oC  
TJ = -55oC  
0.01  
0.001  
10  
TJ = -55oC  
0
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs Source Current  
www.fairchildsemi.com  
4
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
Typical Characteristics TJ = 25°C unless otherwise noted  
10  
3000  
1000  
ID = 12A  
Ciss  
8
VDD = 10V  
VDD = 15V  
6
Coss  
VDD = 20V  
4
100  
30  
f = 1MHz  
= 0V  
2
0
V
GS  
Crss  
0
3
6
9
12  
15  
18  
0.1  
1
10  
30  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Q , GATE CHARGE(nC)  
g
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s D r a i n  
to Source Voltage  
80  
60  
40  
20  
0
30  
R
θJC = 2.1 oC/W  
10  
VGS = 10 V  
TJ = 25oC  
Limited by package  
VGS = 4.5 V  
TJ = 125oC  
1
0.01  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE(ms)  
Figure9. U n c l a m p e d I n d u c t i v e  
Switching Capability  
Figure10. Maximum Continuous Drain  
Current vs Case Temperature  
500  
2000  
SINGLE PULSE  
RθJA = 81 oC/W  
TA = 25 o  
1000  
100  
10  
100  
10  
100 us  
1 ms  
C
10 ms  
100 ms  
1 s  
1
THIS AREA IS  
LIMITED BY r  
DS(on)  
10 s  
DC  
0.1  
SINGLE PULSE  
TJ = MAX RATED  
θJA = 81 oC/W  
A = 25 oC  
0.01  
R
1
T
0.001  
0.5  
10-4  
10-3  
10-2  
t, PULSE WIDTH (sec)  
10-1  
1
10  
200  
0.01  
0.1  
1
10  
100  
100 1000  
VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure 11. Forward Bias Safe  
Operating Area  
Figure12. Single Pulse Maximum  
Power Dissipation  
www.fairchildsemi.com  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
5
Typical Characteristics TJ = 25°C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
0.01  
P
DM  
0.01  
t
1
t
SINGLE PULSE  
RθJA = 81 oC/W  
2
NOTES:  
DUTY FACTOR: D = t /t  
1
2
PEAK T = P  
J
x Z  
x R  
+ T  
θJA A  
DM  
θJA  
0.001  
0.0005  
10-4  
10-3  
10-2  
10-1  
t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 13. Junction-to-Ambient Transient Thermal Response Curve  
www.fairchildsemi.com  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
6
Dimensional Outline and Pad Layout  
www.fairchildsemi.com  
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  
4
TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
AccuPower™  
Auto-SPM™  
Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT™  
CTL™  
F-PFS™  
FRFET  
Global Power Resource  
Green FPS™  
Green FPS™ e-Series™  
Gmax™  
Power-SPM™  
PowerTrench  
PowerXS™  
®*  
®
®
SM  
®
The Power Franchise  
®
Programmable Active Droop™  
®
QFET  
m  
TinyBoost™  
TinyBuck™  
TinyCalc™  
QS™  
Quiet Series™  
RapidConfigure™  
GTO™  
Current Transfer Logic™  
IntelliMAX™  
ISOPLANAR™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
®
DEUXPEED  
®
TinyLogic  
Dual Cool™  
TINYOPTO™  
TinyPower™  
TinyPWM™  
®
EcoSPARK  
Saving our world, 1mW/W/kW at a time™  
SignalWise™  
SmartMax™  
EfficentMax™  
ESBC™  
MicroPak™  
TinyWire™  
MicroPak2™  
MillerDrive™  
MotionMax™  
Motion-SPM™  
OptiHiT™  
SMART START™  
®
TriFault Detect™  
TRUECURRENT™*  
µSerDes™  
®
SPM  
®
STEALTH™  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SupreMOS™  
SyncFET™  
Fairchild  
®
Fairchild Semiconductor  
FACT Quiet Series™  
®
®
OPTOLOGIC  
FACT  
FAST  
®
®
UHC  
®
OPTOPLANAR  
®
Ultra FRFET™  
UniFET™  
VCX™  
FastvCore™  
FETBench™  
tm  
®
Sync-Lock™  
FlashWriter  
FPS™  
*
PDP SPM™  
VisualMax™  
XS™  
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE  
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY  
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY  
THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE  
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used here in:  
1. Life support devices or systems are devices or systems which, (a) are  
intended for surgical implant into the body or (b) support or sustain life,  
and (c) whose failure to perform when properly used in accordance with  
instructions for use provided in the labeling, can be reasonably  
expected to result in a significant injury of the user.  
2. A critical component in any component of a life support, device, or  
system whose failure to perform can be reasonably expected to cause  
the failure of the life support device or system, or to affect its safety or  
effectiveness.  
ANTI-COUNTERFEITING POLICY  
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,  
www.Fairchildsemi.com, under Sales Support.  
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their  
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application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the  
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PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
Advance Information  
Formative / In Design  
Datasheet contains preliminary data; supplementary data will be published at a later  
date. Fairchild Semiconductor reserves the right to make changes at any time without  
notice to improve design.  
Preliminary  
First Production  
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve the design.  
No Identification Needed  
Obsolete  
Full Production  
Datasheet contains specifications on a product that is discontinued by Fairchild  
Semiconductor. The datasheet is for reference information only.  
Not In Production  
Rev. I48  
www.fairchildsemi.com  
8
©2010 Fairchild Semiconductor Corporation  
FDMS3016DC Rev.C  

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