FDJ1028N_06 [FAIRCHILD]
N-Channel 2.5 Vgs Specified PowerTrench MOSFET; N沟道2.5的Vgs指定的PowerTrench MOSFET
| 型号： | FDJ1028N_06 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | N-Channel 2.5 Vgs Specified PowerTrench MOSFET |
| 文件： | 总6页 (文件大小：575K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2006
FDJ1028N
N-Channel 2.5 Vgs Specified PowerTrench® MOSFET
Features
Applications
■ 3.2 A, 20 V.
R
R
= 90 mΩ @ V = 4.5 V
■ Battery management
DS(ON)
DS(ON)
GS
= 130 mΩ @ V = 2.5 V
GS
General Description
This dual N-Channel 2.5V specified MOSFET uses Fairchild’s
advanced low voltage PowerTrench process. Packaged in FLMP
■ Low gate charge
■ High performance trench technology for extremely low
R
DS(ON)
■ FLMP SC75 package: Enhanced thermal performance in
SC75, the R
and thermal properties of the device are
DS(ON)
industry-standard package size
optimized for battery power management applications.
Bottom Drain Contact
S2
S1
4
5
6
3
2
1
G1
G2
S2
S1
Bottom Drain Contact
Absolute Maximum Ratings T = 25°C unless otherwise noted
A
Symbol
Parameter
Ratings
Units
V
Drain-Source Voltage
Gate-Source Voltage
20
V
V
A
DSS
V
12
3.2
GSS
I
Drain Current
– Continuous
– Pulsed
Power Dissipation for single Operation
(Note 1a)
(Note 1a)
D
12
P
1.5
W
D
T , T
Operating and Storage Junction Temperature Range
–55 to +150
°C
J
STG
Thermal Characteristics
R
R
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case
80
5
°C/W
θJA
θJC
Packge Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.F
FDJ1028N
7"
8mm
3000 units
©2005 Fairchild Semiconductor Corporation
1
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FDJ1028N Rev. B3 (W)
Electrical Characteristics T = 25°C unless otherwise noted
A
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV
Drain–Source Breakdown Voltage
V
I
= 0 V, I = 250 µA
20
V
DSS
GS
D
∆BVDSS
∆T
Breakdown Voltage Temperature
Coefficient
= 250 µA, Referenced to 25°C
13
mV/°C
D
J
I
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
V
= 16 V, V = 0 V
1
µA
DSS
DS
GS
I
=
12 V, V = 0 V
100
nA
GSS
GS
DS
On Characteristics (Note 2)
Gate Threshold Voltage
V
V
I
= V , I = 250 µA
0.6
1.0
–3
1.5
V
GS(th)
DS
GS
D
∆VGS(th)
Gate Threshold Voltage
Temperature Coefficient
= 250 µA, Referenced to 25°C
mV/°C
D
∆T
J
R
Static Drain–Source
On–Resistance
V
V
V
= 4.5 V, I = 3.2 A
70
100
83
90
130
132
mΩ
DS(on)
GS
D
= 2.5 V, I = 2.7 A
GS
GS
D
= 4.5 V, I = 3.2A, T = 125°C
D
J
g
Forward Transconductance
V
= 5 V, I = 3.2 A
7.5
S
FS
DS
D
Dynamic Characteristics
C
C
C
R
Input Capacitance
V
= 10 V, V = 0 V,
200
50
30
3
pF
pF
pF
Ω
iss
oss
rss
G
DS
GS
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1.0 MHz
Switching Characteristics (Note 2)
t
t
t
t
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
V
= 10 V, I = 1 A,
7
8
14
16
20
4
ns
ns
d(on)
DD
GS
D
= 4.5 V, R
= 6 Ω
GEN
r
11
2
ns
d(off)
f
ns
Q
Q
Q
V
V
= 10 V, I = 3.2 A,
2
3
nC
nC
nC
g
DS
GS
D
= 4.5 V
0.4
1.0
gs
gd
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
I
1.25
1.2
A
V
S
V
Drain–Source Diode Forward Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V
= 0 V, I = 1.25 A (Note 2)
0.8
11
SD
GS
S
t
I
= 3.2 A,
F
nS
nC
rr
d /d = 100 A/µs
iF
t
Q
2.5
rr
Notes:
1.
R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θJA
θJC
is guaranteed by design while R
is determined by the user's board design.
θCA
a) 80°C/W when mounted on a
b) 140°C/W when mounted on
a
2
1in pad of 2 oz copper (Single
Operation).
minimum pad of
(Single Operation).
2 oz copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
2
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FDJ1028N Rev. B3 (W)
Typical Characteristics
12
2.2
2
3.5V
VGS = 4.5V
3.0V
10
8
VGS = 2.5V
1.8
1.6
1.4
1.2
1
2.5V
6
3.0V
4
3.5V
4.0V
2.0V
4.5V
2
0
0.8
0
0.5
1
1.5
2
2.5
3
0
2
4
6
8
10
12
ID, DRAIN CURRENT (A)
V
DS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.28
0.24
0.2
1.6
1.4
1.2
1
ID = 3.2A
ID = 1.6A
VGS = 4.5V
0.16
0.12
0.08
0.04
TA = 125°C
0.8
0.6
TA = 25°C
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
1
10
8
VGS = 0V
VDS = 5V
TA = -55°C
25°C
TA = 125°C
125°C
0.1
6
25°C
4
0.01
0.001
0.0001
-55°C
2
0
1
1.5
2
2.5
3
3.5
0
0.2
0.4
0.6
0.8
1
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
3
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FDJ1028N Rev. B3 (W)
Typical Characteristics
300
250
200
150
100
50
10
f = 1MHz
GS = 0 V
ID = 3.2A
V
VDS = 5V
10V
8
6
4
2
0
CISS
15V
COSS
CRSS
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0
5
10
15
20
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
10
8
100
10
SINGLE PULSE
RθJA = 140°C/W
RDS(ON) LIMIT
100µs
T
A = 25°C
1ms
6
10ms
1s 100ms
10s
1
4
DC
VGS = 4.5V
0.1
0.01
SINGLE PULSE
2
Rθ
JA = 140°C/W
TA = 25°C
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
θ
θ
JA
R
JA(t) = r(t) * R
θ
R
JA = 140 °C/W
0.2
P(pk)
0.1
0.1
t1
0.05
t2
T
J - TA = P * R
θ
JA(t)
0.02
0.01
Duty Cycle, D = t1/t 2
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
4
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FDJ1028N Rev. B3 (W)
Dimensional Outline and Pad Layout
PKG
L
PKG
L
(0.24)
DRAIN
C
C
(0.18)
1
3
0.30 MIN
4
6
DRAIN 1
TERMINAL
0.30
0.20
0.20
PKG C
(0.73)
L
2.35 MIN
PKG
L
0.84
C
(0.46)
(0.50)
1.35
0.60
6
4
DRAIN 1
DRAIN 2
0.50 MIN
Bottom View
1
3
DRAIN 2
TERMINAL
0.50
1.70
1.50
PKG
A
1.00
C
L
Recommended Landing Pattern
B
4
6
1.75
1.55
PKG C
L
1
3
0.275
0.125
(0.20)
0.075
M
A B
0.50
1.00
Top View
PKG
C
L
0.80
0.65
SEATING
PLANE
PKG
C
L
0.225
0.075
1.075
0.925
2.15
1.85
5
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FDJ1028N Rev. B3 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
®
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OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
PowerSaver™
SILENT SWITCHER
SMART START™
SPM™
UniFET™
UltraFET
VCX™
®
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT™
DOME™
®
HiSeC™
Stealth™
Wire™
2
I C™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TCM™
TinyBoost™
TinyBuck™
i-Lo™
ImpliedDisconnect™
IntelliMAX™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
EcoSPARK™
2
E CMOS™
®
EnSigna™
FACT™
PowerTrench
®
QFET
®
FAST
QS™
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FPS™
FRFET™
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®
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UHC™
Across the board. Around the world.™
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support or
sustain life, or (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the user.
2. A critical component is any component of a life support device or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Definition
Formative or In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I20
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