FDH15N50 [FAIRCHILD]
15A, 500V, 0.38 Ohm, N-Channel SMPS Power MOSFET; 15A ， 500V ， 0.38 Ohm的N通道开关电源功率MOSFET
| 型号： | FDH15N50 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 15A, 500V, 0.38 Ohm, N-Channel SMPS Power MOSFET |
| 文件： | 总6页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 2003
FDH15N50 / FDP15N50 / FDB15N50
15A, 500V, 0.38 Ohm, N-Channel SMPS Power MOSFET
Applications
Features
•
Low Gate Charge
Requirement
Q
results in Simple Drive
Switch Mode Power Supplies(SMPS), such as
g
•
•
•
•
•
•
PFC Boost
•
Improved Gate, Avalanche and High Reapplied dv/dt
Ruggedness
Two-Switch Forward Converter
Single Switch Forward Converter
Flyback Converter
•
•
•
•
Reduced r
DS(ON)
Buck Converter
Reduced Miller Capacitance and Low Input Capacitance
Improved Switching Speed with Low EMI
175°C Rated Junction Temperature
High Speed Switching
Package
Symbol
DRAIN
SOURCE
DRAIN
GATE
(FLANGE)
D
S
GATE
DRAIN
(FLANGE)
SOURCE
G
SOURCE
DRAIN
GATE
TO-263AB
DRAIN
FDB SERIES
(BOTTOM)
TO-247
TO-220AB
FDH SERIES
FDP SERIES
o
Absolute Maximum Ratings T = 25 C unless otherwise noted
C
Symbol
Parameter
Drain to Source Voltage
Ratings
500
Units
V
V
V
DSS
V
Gate to Source Voltage
±30
GS
Drain Current
o
15
11
60
A
A
Continuous (T = 25 C, V = 10V)
C
GS
I
D
o
Continuous (T = 100 C, V = 10V)
C
GS
1
Pulsed
A
Power dissipation
Derate above 25 C
300
2
W
W/ C
P
o
o
D
o
T , T
Operating and Storage Temperature
Soldering Temperature for 10 seconds
-55 to 175
C
J
STG
o
300 (1.6mm from case)
C
Thermal Characteristics
o
R
R
R
Thermal Resistance Junction to Case
0.50
C/W
θJC
θJA
θJA
o
Thermal Resistance Junction to Ambient (TO-247)
Thermal Resistance Junction to Ambient (TO-220, TO-263)
40
62
C/W
C/W
o
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
Package Marking and Ordering Information
Device Marking
FDH15N50
Device
Package
TO-247
TO-220
TO-263
Reel Size
Tube
Tape Width
Quantity
30
FDH15N50
FDP15N50
FDB15N50
-
-
FDP15N50
Tube
50
FDB15N50
330mm
24mm
800
Electrical Characteristics T = 25°C (unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Statics
B
Drain to Source Breakdown Voltage
I
= 250µA, V = 0V
500
-
-
-
-
V
VDSS
D
GS
o
Reference to 25 C,
ID = 1mA
∆B
/∆T Breakdown Voltage Temp. Coefficient
0.58
V/°C
VDSS
J
r
Drain to Source On-Resistance
Gate Threshold Voltage
V
V
V
V
V
= 10V, I = 7.5A
-
0.33
0.38
4.0
Ω
DS(ON)
GS
DS
DS
GS
GS
D
V
= V , I = 250µA
2.0
3.4
V
GS(th)
GS
D
o
= 500V
T
T
= 25 C
-
-
-
-
-
-
25
C
C
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
µA
nA
DSS
o
= 0V
= 150 C
250
±100
I
= ±30V
GSS
Dynamics
g
Forward Transconductance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Turn-On Delay Time
Rise Time
V
= 10V, I = 7.5A
10
-
-
33
7.2
12
9
-
41
10
16
-
S
fs
DD
D
Q
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
g(TOT)
V
V
= 10V,
= 400V,
= 15A
GS
Q
Q
-
gs
gd
DS
I
D
-
t
-
d(ON)
V
I
= 250V,
= 15A,
= 6.2Ω,
= 17Ω
DD
t
-
5.4
26
5
-
r
D
R
R
t
Turn-Off Delay Time
Fall Time
-
-
G
D
d(OFF)
t
-
-
f
C
Input Capacitance
-
1850
230
16
-
ISS
V
= 25V, V = 0V,
GS
DS
C
Output Capacitance
Reverse Transfer Capacitance
-
-
OSS
RSS
f = 1MHz
C
-
-
Avalanche Characteristics
2
E
Single Pulse Avalanche Energy
Avalanche Current
760
-
-
-
-
mJ
A
AS
AR
I
15
Drain-Source Diode Characteristics
Continuous Source Current
D
S
MOSFET symbol
showing the
integral reverse
p-n junction diode.
I
-
-
-
-
15
60
A
A
S
(Body Diode)
G
1
Pulsed Source Current
(Body Diode)
I
SM
V
Source to Drain Diode Voltage
Reverse Recovery Time
I
I
I
= 15A
-
-
-
0.86
470
5
1.2
730
6.6
V
SD
SD
SD
SD
t
= 15A, di /dt = 100A/µs
ns
µC
rr
SD
Q
Reverse Recovered Charge
= 15A, di /dt = 100A/µs
SD
RR
Notes:
1: Repetitive rating; pulse width limited by maximum junction temperature
2: Starting T = 25°C, L = 7.0mH, I = 15A
J
AS
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
Typical Characteristics
100
o
100
10
1
o
T
= 25 C
T
V
= 175
C
J
J
V
DESCENDING
DESCENDING
GS
GS
10V
6V
5.5V
5V
4.5V
4V
10V
6.5V
6V
5.5V
5V
4.5V
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1
1
10
100
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. Output Characteristics
Figure 2. Output Characteristics
60
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
PULSE DURATION = 80µs
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
DUTY CYCLE = 0.5% MAX
VDD = 100V
50
40
30
20
10
0
TJ = 175oC
TJ = 25oC
V
= 10V, I = 7.5A
D
GS
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
-50
-25
0
25
50
75
100
125
150
175
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Transfer Characteristics
Figure 4. Normalized Drain To Source On
Resistance vs Junction Temperature
4000
1000
15
CISS
ID = 15A
12
9
100V
250V
COSS
400V
6
100
CRSS
3
VGS = 0V, f = 1MHz
0
10
1
10
100
0
10
20
30
40
50
Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 5. Capacitance vs Drain To Source
Voltage
Figure 6. Gate Charge Waveforms For Constant
Gate Current
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
Typical Characteristics
30
25
20
100
10
TC = 25oC
100µs
1ms
15
TJ = 175oC
TJ = 25oC
10ms
DC
10
5
1.0
0.1
OPERATION IN THIS AREA
LIMITED BY RDS(ON)
0
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1
10
100
1000
VSD, SOURCE TO DRAIN VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Body Diode Forward Voltage vs Body
Diode Current
Figure 8. Maximum Safe Operating Area
16
12
8
50
If R = 0
AV
If R ≠ 0
t
= (L)(I )/(1.3*RATED BV
- V
DD
)
AS
DSS
t
= (L/R)ln[(I *R)/(1.3*RATED BV
- V ) +1]
DSS DD
AV
AS
10
o
STARTING T = 25 C
J
4
o
STARTING T = 150 C
J
0
25
1
0.01
50
75
100
125
150
175
0.1
1
10
50
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 9. Maximum Drain Current vs Case
Temperature
Figure 10. Unclamped Inductive Switching
Capability
0
10
0.50
0.20
t
1
-1
10
0.10
0.05
P
D
t
2
DUTY FACTOR, D = t / t
1
2
0.02
PEAK T = (P
D
X Z
X R
) + T
JC C
J
θ
JC
θ
0.01
SINGLE PULSE
-2
10
-5
-4
-3
-2
-1
10
0
1
10
10
10
10
10
10
t , RECTANGULAR PULSE DURATION (s)
1
Figure 11. Normalized Transient Thermal Impedance, Junction to Case
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
Test Circuits and Waveforms
V
BV
DSS
DS
t
P
V
DS
L
I
AS
V
DD
VARY t TO OBTAIN
P
+
-
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
0V
0
AS
0.01Ω
t
AV
Figure 12. Unclamped Energy Test Circuit
Figure 13. Unclamped Energy Waveforms
V
DS
V
Q
V
DD
g(TOT)
R
L
V
= 10V
GS
DS
V
GS
+
-
V
DD
V
GS
V
= 1V
DUT
GS
0
I
g(REF)
Q
g(TH)
Q
Q
gd
gs
I
g(REF)
0
Figure 14. Gate Charge Test Circuit
Figure 15. Gate Charge Waveforms
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
-
V
GS
V
DD
10%
10%
0
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
Figure 16. Switching Time Test Circuit
Figure 17. Switching Time Waveform
©2003 Fairchild Semiconductor Corporation
FDH15N50 / FDP15N50 / FDB15N50 RevD2
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PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I3
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