FAN8005D2TF [FAIRCHILD]
3-CH Motor Driver; 3 - CH电机驱动器
| 型号： | FAN8005D2TF |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 3-CH Motor Driver |
| 文件： | 总16页 (文件大小：341K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN8005D2
3-CH Motor Driver
Features
Description
• 3-Channel BTL (Balanced transformer-less) driver
• Built-in variable regulator with reset (Series-REG)
• Built-in thermal shutdown circuit
• Built-in power save circuit
The FAN8005D2 is a monolithic integrated circuit, suitable
for a 3-ch motor driver which drives focus actuator, tracking
actuator, and sled motor of a CD-media system.
• Built-in general OP-amp
• Operating supply voltage: 4.5V ~ 5.5V
• Corresponds to 3.3V or 5V DSP
28-SSOPH-300
Typical Applications
Ordering Information
• Compact disk player
• Digital video disk player
• Compact disk ROM
Device
Package
Operating Temp.
−35°C ~ +85°C
−35°C ~ +85°C
FAN8005D2 28-SSOPH-300
FAN8005D2TF 28-SSOPH-300
Rev. 1.0.2
©2001 Fairchild Semiconductor Corporation
FAN8005D2
Pin Assignments
FIN(GND)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
FAN8005D2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
FIN(GND)
2
FAN8005D2
Pin Definitions
Pin Number
Pin Name
REF
I/O
I
Pin Function Descrition
1
Bias voltage input
2
IN1.1
IN1.2
I
Op-amp CH1 input (+)
Op-amp CH1 input (−)
Op-amp CH1 output
Op-amp CH2 input (+)
Op-amp CH2 input (−)
Op-amp CH2 output
Signal ground
3
I
4
OUT1
IN2.1
IN2.2
O
I
5
6
I
7
OUT2
SGND
VM12
PS
O
-
8
9
-
BTL CH1, 2 supply voltage
Power save
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I
DO2+
O
O
O
O
-
Drive2 output (+)
Drive2 output (−)
Drive1 output (+)
Drive1 output (−)
Power ground
DO2
DO1+
DO1
−
−
PGND
DO3−
DO3+
RESX
VREGX
VM3
O
O
I
Drive3 output (−)
Drive3 output (+)
Regulator reset
O
-
Op-amp output
BTL CH3 supply voltage
Op-amp input(+)
REGOX
OPIN−
OPIN+
OPOUT
OUT3
IN3.2
I
I
Op-amp input (−)
Op-amp input (+)
Op-amp output
I
O
O
I
Op-amp CH3 output
Op-amp CH3 input (−)
Op-amp CH3 input (+)
Supply voltage
IN3.1
I
VCC
-
3
FAN8005D2
Internal Block Diagram
FIN
(GND)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
+
−
-
+
+
−
−
+
−
REGULATOR
+
−
+
−
+
VM3
TSD
20k
+
−
10k
10k
10k
10k
-
−
−
+
+
10k
−
+
LEVEL
SHIFT
LEVEL
SHIFT
VM12
+
VM12
+
−
−
−
+
−
+
−
−
−
−
+
+
+
+
50k
50k
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(GND)
FIN
4
FAN8005D2
Equivalent Circuits
Error amp input
Power save input
2
5
3
6
50Ω
50kΩ
10
50Ω
50Ω
27
26
50kΩ
Error amp output
Signal reference input
4
1
6
50Ω
0.2kΩ
50Ω
25
Power output
Regulator reset
11
12
13
14
16
17
50Ω
50kΩ
18
30kΩ
5
FAN8005D2
Equivalent Circuits (Continued)
Regulator
Regulator output
50Ω
21
19
50Ω
General op amp input
General op amp output
24
22
23
50Ω
50Ω
6
FAN8005D2
Absolute Maximum Ratings ( Ta=25°C)
Parameter
Symbol
VCCmax
PD
Value
7
Unit
Maximum supply voltage
Power dissipation
V
@1.4
W
°C
°C
Operating temperature range
Storage temperature range
TOPR
−35 ~ +85
−55 ~ +150
TSTG
Notes:
1. When mounted on a 76.2mm × 114mm × 1.57mm PCB (Phenolic resin material).
2. Power dissipation reduces 11.2mW / °C for using above Ta = 25°C
3. Do not exceed PD and SOA (Safe operating area).
PD (Temporary)
Pd (mW)
2,000
1,200
SOA
400
0
85
0
25
50
75
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Conditions ( Ta=25°C)
Parameter
Supply voltage
Symbol
Min.
Typ.
Max.
Unit
V
4.5
-
5.5
V
CC
7
FAN8005D2
Electrical Characteristics
(Unless otherwise specified, Ta=25°C, V =VM12=VM3=5V)
CC
Parameter
Quiescent current
Symbol
ICC
Conditions
Min.
Typ. Max.
Unit
mA
mA
V
VIN=0V
PS pin=GND
-
-
13
-
-
1
Power save on current
Power save on voltage
Power save off voltage
BTL DRIVE CIRCUIT
Output offset voltage 1
Output offset voltage 2
Maximum output voltage 1
Maximum output voltage 2
Closed loop voltage gain 1
Closed loop voltage gain 2
Ripple rejection ratio
Slew rate
IPS
VPSon
VPSoff
-
-
-
-
0.5
-
2
-
V
VOO1
VOO2
VOM1
VOM2
GVC1
GVC2
RR
VIN=2.5V (CH1,2)
−50
−60
2.7
3
-
+50
mV
mV
V
VIN=2.5V (CH3)
-
+60
VCC=5V, RL=8Ω (CH1, 2)
VCC=5V, RL=24Ω (CH3)
3.5
3.8
12
18
60
1
-
-
13.5
20
-
V
f=1kHz, V =0.1VRMS (CH1, 2)
IN
10.5
16
-
dB
dB
dB
V/µs
f=1kHz, V =0.1VRMS (CH3)
IN
VIN=0.1VRMS, f=120Hz
VO=2Vp-p, f=120kHz
SR
-
-
ERROR AMP CIRCUIT
Input offset voltage
VOFOP
IBOP
-
-
−20
-
-
+20
mV
nA
V
Input bias current
-
4.5
-
300
High level output voltage
Low level output voltage
Output sink current
VOHOP
VOLOP
ISINK
VCC=5V, RL=10kΩ
VCC=5V, RL =10kΩ
VCC=5V, RL= 1kΩ
4.8
0.2
3
-
0.5
V
1
-
-
-
mA
mA
V/µs
Output source current
Slew rate
ISOURCE VCC=5V, RL=1kΩ
1
3
SROP
f=120kHz, 2Vp-p
-
1
GENERAL OP AMP CIRCUIT
Input offset voltage
VOFOP
IBOP
-
-
−20
-
-
+20
mV
nA
V
Input bias current
-
3
-
300
High level output voltage
Low level output voltage
Output sink current
VOHOP
VOLOP
ISINK
VCC=5V, RL=1kΩ
VCC=5V, RL =1kΩ
VCC=5V, RL= 50Ω
4
-
1
1.3
V
2
2
-
5
-
-
-
-
-
-
mA
mA
dB
dB
V/µs
dB
Output source current
Open loop voltage gain
Ripple rejection ratio
Slew rate
ISOURCE VCC=5V, RL=50Ω
5
GVO
RROP
SROP
CMRR
VIN=−75dB, f=1kHz
VIN=−20dB, f =120Hz
f=120kHz, 2Vp-p
75
65
1
-
-
Common mode rejection ratio
VIN=−20dB, f=1kHz
-
80
VARIABLE REGULATOR CIRCUIT
Regulator output voltage
Load regulation
VREG
∆VR1
∆VCC
IL=100mA
3.0
−40
−20
-
-
-
4.5
10
30
V
IL=0→200mA
mV
mV
Line regulation
IL=200mA, V =5→8V
CC
8
FAN8005D2
Application Information
1. Reference Input & Power Save Function
Pin 1 (REF) is a reference input pin.
• Reference input
The applied voltage at the reference input pin must be between 1.5V and 3.5V, when V =5V.
CC
• Power save input
The following input conditions must be satisfied for the power save function.
Power save on voltage
Power save off voltage
Below 0.5V
Above 2V
Power save function operation
Normal operation
2. Protection Function
Thermal shutdown (TSD)
• If the chip temperature rises above 175°C, the thermal shutdown (TSD) circuit is activated and the output circuit is in the
mute state, that is off state. The TSD circuit has a temperature hysteresis of 25°C.
3. Regulator & Reset Function
The regulator configuration with the external components is illustrated in figure 1.
• The external circuit is composed of the KSB772 PNP transistor and a capacitor about 33µF, and two feedback resistors R1,
R2.
The capacitor operates both as a ripple eliminator and as a compensator of the feedback loop.
• The output voltage (REG OUT) is
R1
Vout = 1 + ------- × 2.5
R2
• When the voltage of pin18 (Vreset) is 0V, the regulator reset function is activated, and the output voltage (REG OUT)
becomes 0V. Otherwise, if the voltage of pin 18 is 5V, the regulator operates properly.
V
CC
REG OUT
KSB772
+
Vreset
R1
R2
19
21
18
−
+
FAN8005D2
2.5V
Figure 1. Regulator circuit
9
FAN8005D2
4. Focus / Tracking Actuator Sled Motor Drive Part
R2
R1
−
+
OPin+
OPin-
OPout
5
6
27
26
2
3
Vin
13 17
+
DOP
DON
11
−
R1
Vp
R2
M
R2
+
R2
7
25
4
12 14 16
−
1
R1
Vref
R2
VM12
Dp
60k
+
Vp
−
62k
Qp
• The voltage, Vref is the reference voltage given by the external bias voltage of the pin 1.
• The input signal (Vin) through pins 3,6 and 26 are amplified one time and then fed to the output stage.
(assume that input opamp was used as a buffer)
• The total closed loop voltage gain is as follows (assume that R2=2R1)
Vin = Vref + ∆V
DOP= Vp + 2∆V
DON= Vp–2∆V
Vout = DOP – DON= 4∆V
Vout
Gain = 20log------------ = 20log4= 12dB
∆V
• To change the total closed loop voltage gain, Use the input opamp as an amplifier
• The output stage is the balanced transformerless (BTL) driver.
• The bias voltage Vp is expressed as ;
62k
60k + 62k
-------------------------
Vp = (PVCC1 – VDp – VcesatQp) ×
PVCC1 – VDp + VcesatQp
+ VcesatQp
- - - - - - - - - -
(1)
= -------------------------------------------------------------------------- + VcesatQp
1.97
10
FAN8005D2
Typical Performance Characteristics
< V
& V
>
OM
CC
< VCC
&
ICC
>
V
OM (V)
I
CC (mA)
14
10
9
8
7
6
5
4
3
2
1
CH1
CH2
CH3
12
10
8
6
4
Ta= 25 ℃
VCC= VM12= VM3
RL1= 8Ω (CH1,2)
RL2= 24Ω (CH3)
Ta=25℃
VCC=VM12=VM3
2
0
3
0
2
6
9
12
15
VCC (V)
5
8
11
14
VCC (V)
< VCC & GVC
>
< I
& V
>
OUT
OM
G
VC (dB)
VOUT (V)
20
4.5
18
16
14
12
10
8
4
3.5
3
CH1 Upp.
CH1 Low
CH2 Upp.
CH2 Low
CH3 Upp.
CH3 Low
2.5
2
1.5
1
6
Ta= 25℃
VCC= VM12= VM3
Ta= 25℃
CH1
CH2
CH3
VCC= VM12= VM3
RL1= 8Ω (CH1,2)
RL2= 24Ω (CH3)
4
0.5
0
2
0
3
0
100
200
300
400
500
600
700
5
7
9
11
13
15
17
19
21
VCC (V)
IOM (mA)
< I & V
O
(LOAD REGULATION) >
< V & V
(LINE REGULATION) >
OUT
OUT
CC
VOUT (V)
VOUT (V)
4
3.40
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
3
2
1
Ta= 25℃
VCC= 5V
Ta=25℃
0
4
0
200
400
600
800
1000
IO (mA)
6
8
10
12
14
16
VCC (V)
18
11
FAN8005D2
Typical Performance Characteristics (Continued)
< V & I
CC
(ERROR OP-AMP) >
< V & I
CC
(ERROR OP-AMP) >
sink
source
Isink (mA)
16
I
source (mA)
5
CH1
CH2
CH3
14
12
10
8
4
3
2
1
6
CH1
CH2
CH3
4
Ta= 25℃
RL= 1KΩ
Ta= 25℃
RL= 1KΩ
2
0
3
0
3
6
9
12
15
6
9
12
15
VCC (V)
VCC (V)
< V & I
CC
(GENERAL OP-AMP) >
< V & I
(GENERAL OP-AMP) >
source
CC
sink
Isource (mA)
Isink (mA)
30
120
25
20
15
10
5
100
80
60
40
Ta= 25℃
RL= 50Ω
20
Ta= 25℃
RL= 50Ω
0
3
0
3
6
9
12
15
6
9
12
15
VCC (V)
VCC (V)
< TEMP & G
>
TEMP & LINE REGULATION
VC
G
VC (dB)
Δ VCC (mV)
20
20
18
16
14
12
10
8
16
12
8
6
CH1
CH2
CH3
VCC= VM12= VM3= 4.5V
RL1= 8Ω (CH1,2)
RL2= 24Ω (CH3)
4
4
VCC= 6V→9V
IL= 200mA
2
0
0
- 40
- 20
0
20
40
60
80
100
- 40
- 20
0
20
40
60
80
100
TEMP (℃)
TEMP (℃)
12
FAN8005D2
Application Circuits 1
(Differential PWM control mode)
BIAS
VOLTAGE
VCC
1
2
28
27
REF
VCC
SERVO AMP
PWM1
BIAS
SLED
PWM2
IN1.1
IN3.1
BIAS
PWM1
FOCUS
3
4
5
6
7
26
IN1.2
OUT1
IN2.1
IN2.2
OUT2
PWM2
PWM1
IN3.2
TRACKING
OUT3 25
OPOUT 24
OPIN+ 23
PWM2
BIAS
22
OPIN−
FAN8005D2
VARIABLE
REGULATOR
8
9
21
SGND
VM12
REGOX
20
VM3
5V
5V
10
11
12
VREGX 19
PS
PS
VCC
18
DO2+
RESX
REGULATOR RESET
SLED MOTOR
TRACKING
ACTUATOR
17
16
15
DO3+
DO3-
DO2−
13 DO1+
FOCUS
ACTUATOR
14
PGND
DO1−
13
FAN8005D2
Application Circuits 2
(Voltage control mode)
BIAS
VOLTAGE
1
2
VCC
28
27
REF
VCC
SERVO AMP
SLED
IN1.1
IN3.1
3
4
5
6
7
26
FOCUS
IN1.2
OUT1
IN2.1
IN2.2
OUT2
IN3.2
OUT3 25
OPOUT 24
OPIN+ 23
TRACKING
22
OPIN-
FAN8005D2
VARIABLE
REGULATOR
33uF
+
8
9
21
20
SGND
VM12
REGOX
VM3
5V
5V
PS
10
11
12
VREGX 19
PS
VCC
18
DO2+
RESX
REGULATOR RESET
SLED MOTOR
TRACKING
ACTUATOR
17
16
15
DO3+
DO3-
DO2-
13 DO1+
FOCUS
ACTUATOR
14
PGND
DO1-
14
FAN8005D2
15
FAN8005D2
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
user.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
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3/17/01 0.0m 001
Stock#DSxxxxxxxx
2001 Fairchild Semiconductor Corporation
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