FAN7687 [FAIRCHILD]
PC Power Supply Output Monitoring IC; PC电源输出监控IC
| 型号： | FAN7687 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | PC Power Supply Output Monitoring IC |
| 文件： | 总14页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FAN7685/FAN7686/FAN7687
PC Power Supply Output Monitoring IC
Features
Description
• PC Power Supply Outputs Supervisory Circuitry
• Few External Components
The FAN7685/FAN7686/FAN7687 is a complete output
supervisory circuitry intended for use in the secondary side
of the switched mode power supply. It provides overvoltage
protection (OVP), undervoltage protection(UVP), overcur-
rent protection (OCP), and power good signal generator to
monitor and control the outputs of the switching power sup-
ply system. Remote on/off(PSON) control and some preci-
sion protection features are also implemented.
• Over Voltage Protection for 3.3V, 5V and 12V Outputs
• Under Voltage Protection for 3.3V, 5V and 12V Outputs
• Over Current Protection for 3.3V, 5V and 12V Outputs
• Dual Over Current Portection for 12V Outputs(FAN7687)
• Fault Protection Output With Open Drain Output
• Open Drain Power Good Output
• 300ms Power Good Delay
• 38ms PSON On/Off Delay
• 73us Debounce
• 2.3ms PSON to FPO Turn Off Delay
• Latch Function Controlled by PSON
It directly senses all the output rails for OVP, UVP, and OCP
without external divider resistors. As for output control,
power good output(PGO) and fault protection output(FPO)
are included. The FAN7685/FAN7686/FAN7687 offers a
simple and cost effective solution with minimum number of
external components and greatly reduces PCB board space
for power supply.
14DIP
Typical Application
• PC Switching Mode Power Supply
1
14SOP
1
Rev. 1.1.0
©2004 Fairchild Semiconductor Corporation
FAN7685/FAN7686/FAN7687
Internal Block Diagrams
PSON
3.6V
Vref
Vcc
Vcc
REF.
POR
13
clr
Delay
2.3ms
CLK
Start-up
CLK
Oscillator
Reset
10
VS12
VS5
(9)
R
L
UVP
L
3
12
FPO
L
L
R
R
S
FPO
L
L
L
H
Debounce
73us
Q
H
VS33
11
Delay
75ms
clr
CLK
CLK
R
L
PWR
L
Vcc
L
PGI_O
OVP
150uA
L
3.6V
L
PSON
L
L
Debounce
38ms
L
4
PSON
L
CLK
R
Vref
3.6V
H
PGO
GND
14
2
Q
L
L
L
9
(8)
IS33
IS5
H
8
(7)
L
H
UVP
L
H
CLK
L
R
H
Short
H
Debounce
73us
H
5
Vcc
L
IS12
Detector
Delay
H
Iref
when AC ON
clr
300ms
L
CLK
FAN7685
(FAN7686)
Vref
8*Iref
8*Iref 8*Iref
1.2V
PSON
6
RI
1
PGI
PSON
3.6V
Vref
Vcc
13
REF.
VCC12
clr
Delay
2.3ms
CLK
Start-up
POR
CLK
Oscillator
Reset
Power On Reset
R
L
3
FPO
UVP
L
UVP
L
L
L
R
R
S
FPO
Block
H
L
L
Debounce
73us
Q
H
10
12
11
Delay
75ms
clr
VS12
VS5
CLK
CLK
R
Vcc
L
L
PGI_O
150uA
3.6V
VS33
OVP
OVP
L
PSON
L
L
L
Debounce
38ms
4
Block
PSON
CLK
R
3.6V
H
PGO
GND
14
2
IS33
IS5
9
8
Q
L
L
L
H
OCP
5
7
COMPs
IS12
L
H
UVP
Vcc
CLK
H
L
R
H
Iref
L
Short
H
ISVCC12
Debounce
73us
H
L
Detector
Delay
H
when AC ON
clr
300ms
1.2V
L
8*Iref
CLK
Vref
PSON
FAN7687
6
RI
1
PGI
FAN7687A
2
FAN7685/FAN7686/FAN7687
Pin Assignments
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
PGI
GND
FPO
PSON
IS12
RI
PGO
VCC
PGI
GND
FPO
PSON
IS12
RI
PGO
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
PGI
GND
FPO
PGO
VCC12
VS5
VS5
VS33
VS12
IS33
IS5
VS5
VS33
NC
PSON
IS12
VS33
VS12
IS33
RI
VS12
IS33
8
8
8
ISVCC12
IS5
NC
IS5
Pin Definitions
Pin Number
Pin Name
I/O
I
-
O
I
I
Pin Function Description
1
2
3
4
5
6
PGI
GND
FPO
PSON
IS12
RI
Power Good Input
Ground
Fault Protection Output, Open Drain Output
Remote On/Off Control Input
12V Over Current Protection
Reference Current Setting Resistor
No Connection(FAN7685)
O
NC
7
IS5*
ISVCC12**
IS5
I
I
I
I
I
I
I
5V Over Current Protection(FAN7686)
12V-II Over Current Protection(FAN7687)
5V Over Current Protection(FAN7685/7)
3.3V Over Current Protection(FAN7686)
3.3V Over Current Protection(FAN7685/7)
12V Output Over/Under Voltage Protection(FAN7686)
12V Output Over/Under Voltage Protection(FAN7685/7)
No Connection(FAN7686)
8
9
IS33*
IS33
VS12*
VS12
NC*
10
11
12
VS33
VS5
Vcc
VCC12**
PGO
I
I
I
I
O
3.3V Output Over/Under Voltage Protection
5V Output Over/Under Voltage Protection
Supply Voltage(FAN7675/6)
13
14
Supply Voltage & 12V-II OV/UV Protectioin(FAN7687)
Power Good Output, Open Drain Output
Notes :
* : FAN7686 Pin Definitions
** : FAN7687/FAN7687A Pin Definitions
3
FAN7685/FAN7686/FAN7687
Absolute Maximum Ratings
Parameter
Supply Voltage
Symbol
, VCC12
Value
16
Unit
V
V
CC
V
PSON
, VS5, VS33, V
,
PGI
8
IS5, IS33
Input Voltage
V
VS12, IS12, ISVCC12
16
V
V
8
16
PGO
Output Voltage
V
FPO
Operating Temperature
Storage Temperature
Power Dissipation
Topr
Tstg
-40 ~ 125
-55 ~ 150
1
°C
°C
W
P
D
*Note : Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
Recommended Operating Conditions
Characteristic
Min.
Typ.
Max.
Unit
Supply Voltage
V
, VCC12
4
15
V
CC
V
PSON
, VS5, VS33, V
IS33
, IS5,
PGI
-
-
7
Input Voltage
V
VS12, IS12, ISVCC12
-
-
-
-
-
-
-
-
-
-
15
7
15
30
10
V
V
V
PGO
Output Voltage
V
FPO
FPO
I
mA
mA
ms
uA
Output Sink Current
I
PGO
tr
Supply Voltage Rising Time, See Note1
Output Current for RI
1
I
12.5
-
62.5
O(RI)
Note
1. V
slew rate must be less than 14V/ms.
CC
4
FAN7685/FAN7686/FAN7687
Electrical Characteristics(V = 5V, Ta=25°C, unless otherwise specified)
CC
Over Voltage Protection, Under Voltage Protection and FPO
Parameter
Test Condition
Min.
3.9
3.77
5.8
5.71
13.3
13.71
13.42
2.55
2.88
4.1
Typ.
4.1
Max.
4.3
4.06
6.4
6.16
14.3
14.79
14.5
2.83
3.02
4.5
Unit
VS33
VS5
FAN7687A
6.1
FAN7687A
Over Voltage Threshold
V
13.8
VS12,
(VS12)
FAN7687A
FAN7687A
VCC12
(VCC12)
2.69
4.3
VS33
VS5
FAN7687A
FAN7687A
Under Voltage Threshold
4.37
8.8
10.5
10.21
4.58
9.8
11.0
10.71
V
9.3
VS12,
(VS12)
FAN7687A
FAN7687A
VCC12
(VCC12)
Ratio of Current Sense Sink Current to
Current Sense Setting Pin(RI) Source
Current
Resistor at RI=30kΩ,
Iref
7.6
8
8.4
0.1% Resistor
Offset Voltage of OCP Comparator
Leakage Current(FPO)
V
V
V
=0V
PSON
= 5V
FPO
-5
-
-
-
-
-
-
5
5
0.3
0.7
mV
uA
offset
I
LKGI
I
I
=10mA
=30mA
FPO
FPO
Low Level Output Voltage(FPO)
V
V
OLI
-
PGI and PGO
Input Threshold Voltage(PGI)
Leakage Current(PGO)
Low Level Output Voltage(PGO)
V
1.16
-
-
1.20
-
-
1.24
5
0.4
V
uA
V
PGI
I
V
I
= 5V
LKG2
PGO
=10mA
PGO
V
OL2
PSON Control
Input Pull-up Current
High-Level Input Voltage
Low-Level Input Voltage
I
V
V
V
V
= 0V
= 5V
-
2.4
-
150
-
-
-
-
uA
V
V
PSON
PSON
PSON
IHPS
1.2
ILPS
Total Device
Supply Current
I
-
-
1
mA
CC
Switching Characteristics
Debounce Time(PSON)
Noise Debounce Time
25
38
51
ms
us
ms
t
b1
t
50
200
73
300
100
410
b2*
PGO Delay Time(PGI to PGO)
t
d1
FPO goes low and
t
d2
51
75
102
410
ms
every time PGI > 1.2
Internal UVP Delay Time
FPO goes low and
t
200
300
ms
ms
d4*
everytime PGI<1.2
PSON off to FPO Delay Time
t
d3
t
+1.6 t +2.3 t +3.2
b1 b1
b1
* : These parameters although guaranteed over the recommended operating conditions, are not 100% tested in production.
5
FAN7685/FAN7686/FAN7687
Timing Chart
1) AC Input ON/OFF - Normal State
AC Input
VCC
Enable
POR
PSON
FPO
tb1
AC Input
Disable
PGI
UVP
Threshold
OUT
PGO
tb2+td1
2) PSON ON/OFF - Normal State
PSON
FPO
PGI
td3
tb1
UVP
Threshold
OUT
PGO
tb1+tb2
tb2+td1
6
FAN7685/FAN7686/FAN7687
3) Under Voltage at Normal State
Latch
PSON
FPO
PGI
tb1
tb2
UVP
Threshold
UVP
Threshold
OUT
PGO
tb2+td1
4) Under Voltage at AC Input ON
AC Input
Enable
VCC
POR
PSON
FPO
PGI
Latch
tb2+td2
tb1
PGI
UVP
Threshold
Threshold
OUT
PGO
tb2+td1
7
FAN7685/FAN7686/FAN7687
5) Under Voltage at PSON ON/OFF
Latch
PSON
tb2+td2
FPO
PGI
td3
tb1
PGI
UVP
Threshold
Threshold
OUT
PGO
tb1+tb2
tb2+td1
6) Over Voltage at PSON ON/OFF
Latch
PSON
FPO
PGI
tb1
tb2
UVP
Threshold
OVP
OUT
PGO
Threshold
tb2+td1
8
FAN7685/FAN7686/FAN7687
Typical Application Circuits
FAN7685 Application Circuit
12V Output
5V Output
3.3V Output
RS_12V
RIS12
VS12
VS5
IS12
5V Coil
RS_5V
RIS5
IS5
3.3V Coil
PWM
RS_3.3V
RIS33
VS33
IS33
5Vsb
PGI
PGO
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
PGO
GND
5Vsb
VS5
FPO
VS5
VS33
VS12
IS33
IS5
PSON
IS12
RI
PSON
VS33
VS12
NC
8
FAN7687 Application Circuit
12V-I Output
5V Output
RS_12V-I
RIS12
VS12
IS12
5V Coil
RS_5V
RS_3.3V
RS_12V-II
RIS5
VS5
IS5
3.3V Coil
PWM
3.3V Output
12V-II Output
RIS33
VS33
IS33
12V_II Coil
RISVCC12
ISVCC12
5Vsb
PGI
PGO
1
2
3
4
5
6
7
14
13
12
11
10
9
PGO
GND
VCC12
VS5
5Vsb
FPO
VS5
VS33
VS12
IS33
IS5
PSON
IS12
VS33
VS12
IS33
IS5
PSON
IS12
RI
ISVCC12
8
ISVCC12
9
FAN7685/FAN7686/FAN7687
Application Information
Power Good(PGO) and Power Good Delay
A PC power supply is commonly designed to provide the motherboard with a power good signal, which is defined by the com-
puter manufacturers. If the +3.3V, +5V, and +12V outputs are above the undervoltage threshold limit, the PC power supply
makes the power good signal high. At this time the power supply should be able to provide enough power to assure continuous
operation within the specification. Conversely, when one of the +3.3V, +5V, or +12V outputs falls below the undervoltage
threshold or rises above the overvoltage threshold, or when main power has been turned off for a sufficiently long time so that
power supply operation is no longer assured, a PGO signal will be a low state.
The AC input, power good(PGO), remote on/off(PSON), and +3.3V/+5V/+12V supply rails are shown in the below figure.
T1
T5
VAC
PSON
+12VDC
+5VDC
95%
10%
+3.3VDC
T3
T2
PGO
T4
T6
Although there is no requirement to meet specific timing parameters, the following signal timings are recommended :
-T1(Power On Time) : T1 < 500ms
-T2(Rise Time) : 0.1ms ≤ T2 ≤ 20ms
-T3(PGO Delay) : 100ms < T3 <500ms
-T4(PGO Delay Risetime) : T4 ≤ 10ms
-T5(AC Loss to PGO Hold-Up Time) : T5 ≥ 16ms
-T6(Power Down Warning) : T6 ≥ 1ms
Furthermore, motherboards should be designed to comply with the above recommended timing range. If timings other than
these are implemented or required, that information should be clearly specified.
The FAN7685/FAN7686/FAN7687 provide a power good(PGO) signal for the +3.3V, +5V and +12V supply voltage rails and
a separate power good input(PGI). An internal delay circuit is used to generate a 300ms power good delay.
If voltages at PGI(+1.2V), VS33(+3.3V), VS5(+5V), and VS12(+12V) rise above the undervoltage threshold, the open drain
power good output(PGO) will go high after a delay of 300ms. When the PGI voltage or any of +3.3V, +5V, and +12V rails
drops below the undervoltage threshold, the PGO signal will be disabled immediately.
Power Supply Remote On/Off(PSON) and Fault Protection Output(FPO)
Since the latest personal computer generation focuses on easy turn on and power saving functions, a PC power supply will
require two characteristics. One is a dc power supply remote on/off function; the other is standby power to achieve very low
power consumption of the PC power supply. Thus, the main power needs to be shut down.
The power supply remote on/off(PSON) is an active-low signal that turns on all of the main power rails including the +3.3V,
+5V, and +12V power rails. When this signal is held high by the PC motherboard or left open circuited, the signal of the fault
protect output(FPO) also goes high. Thus, the main power rails can not deliver current and are held at 0V.
When the FPO signal is held high due to a fault condition, the fault status will be latched and the outputs of the main power
rails can not deliver current and are held at 0V. Toggling the PSON input signal from low to high will reset the fault protection
latch. During this fault condition only the standby power is not affected.
When the PSON input signal goes from high to low or low to high, the 38ms debounce block will be active to avoid that a
glitch on the PSON input may disable/enable the FPO output. When the PSON is set low, the undervoltage function is disabled
for 75ms to avoid turn-on failure. At turn-off, there is an additional delay of 2.3ms from PSON to FPO.
Power should be delivered to the rails only when the PSON signal is held at ground potential, thus the FPO becomes a low
10
FAN7685/FAN7686/FAN7687
state after a debounce of 38ms. The FPO pin can be connected to +5V(or up to +15V) through a pull-up resistor.
Under Voltage Protection
The FAN7685/FAN7686/FAN7687 provide undervoltage protection(UVP) for the +3.3V, +5V, and +12V power rails. When
an undervoltage condition appears at one of the VS33(+3.3V), VS5(+5V), or VS12(+12V) input pins for more than 73us, the
PGO goes low and FPO output goes high. Also, this fault condition will be latched until the PSON is toggled from low to high
or the Vcc falls below a minimum operating voltage.
When the power supply is turned on by the AC input or PSON, an internal UVP delay time is 75ms. But at normal state an
UVP delay time is only a 73us debounce time. The need for undervoltage protection is often overlooked in off-line switching
power supply system design. But it is very important in battery powered or hand-held equipment since the TTL or CMOS
logic often malfunctions under UVP condition.
Over Voltage Protection(OVP)
The overvoltage protection(OVP) of the FAN7685/FAN7686/FAN7687 monitor +3.3V, +5V, and +12V. When an overvoltage
condition appears at one of the +3.3V, +5V, or +12V input pins for more than 73us, the FPO output goes high and the PGO
goes low. Also, this fault condition will be latched until the PSON is toggled from low to high or Vcc drops below a minimum
operating voltage. During overvoltage condition, most power supplies have the potential to deliver higher output voltages than
those normally specified or required. In unprotected equipment, it is possible for output voltages to be high enough to cause
internal or external damage to the system. To protect the system under these abnormal conditions, it is common practice to pro-
vide overvoltage protection within the power supply.
Because TTL and CMOS circuits are very vulnerable to overvoltage, it is becoming industry standard to provide overvoltage
protection on all +3.3V, +5V, and +12V outputs. Therefore, not only the +3.3V and +5V rails for the logic circuits on the moth-
erboard need to be protected, but also the +12V peripheral devices such as the hard disk, flopply disk, and CD-ROM players
etc., need to be protected.
Over Current Protection
In bridge or forward type, off-line switching power supplies, usually designed from medium to large power, the overload pro-
tection design needs to be very precise. Most of these types of power supplies are sensing the output current for an overload
condition. The trigger point needs to be set higher than the maximum load in order to prevent false turn-on.
During safety testing the power supply might have tied the output voltage direct to ground. If this happens during the nomal
operating, this is called a short-circuit or over current condition. When it happens before the power supply turns on, this is
called a short-circuit power supply turn-on. It can happen during the design period, in the production line, at quality control
inspection or at the end user. The FAN7685/FAN7686/FAN7687 provide an UVP and OCP with a 75ms delay after PSON is
set low.
The FAN7685/FAN7686/FAN7687 provide overcurrent protection(OCP) for the 3.3V, 5V, and 12V rails. When an overcurrent
condition appears at the OCP comparator input pins for more than 73us, the FPO output goes high and PGO goes low. Also,
this fault condition will be latched until PSON is toggled from low to high or Vcc is removed.
The resistor connected between the RI pin and the GND pin will introduce an accurate I
for the OCP function. Of course,
O(RI)
a more accurate resistor tolerance will be better. The formula for choosing the RI resistor is V /I
. The I range is
RI O(RI) O(RI)
from 12.5uA to 62.5uA. Four OCP comparators and the I
is less than 1mA.
section are supplied by VS12. Current drawn from the VS12pin
O(RI)
Following is an example on calculating OCP for the 12V rail :
VRI
RI = -------------- = -------------- = 60kΩ
IO(RI) 20uA
1.2V
IO(RI) × K × R(IS12)= R(sense) × I(OCP – Trip)
(OCP – Trip)= 20u × 8 × 560Ω ⁄ (0.01Ω) = 9.2A
I
11
FAN7685/FAN7686/FAN7687
Mechanical Dimensions
Package
Dimensions in millimeters/inches
14-DIP
12
FAN7685/FAN7686/FAN7687
Mechanical Dimensions
Package
Dimensions in millimeters/inches
14-SOP
13
FAN7685/FAN7686/FAN7687
Ordering Information
Product Number
FAN7685N
Package
Operating Temperature
Packing
FAN7686N
FAN7687N
14DIP
-40 ~ 125°C
Tube
FAN7687AN
FAN7685M
FAN7686M
FAN7687M
14SOP
14SOP
-40 ~ 125°C
-40 ~ 125°C
Tube
FAN7687AM
FAN7685MX
FAN7686MX
FAN7687MX
FAN7687AMX
Tape & Reel
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
3/9/04 0.0m 001
Stock#DSxxxxxxxx
2004 Fairchild Semiconductor Corporation
相关型号：
©2020 ICPDF网 联系我们和版权申明