DM9334 [FAIRCHILD]
8-Bit Addressable Latch; 8位可寻址锁存器
| 型号： | DM9334 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 8-Bit Addressable Latch |
| 文件： | 总5页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1986
Revised February 2000
DM9334
8-Bit Addressable Latch
General Description
Features
The DM9334 is a high speed 8-bit Addressable Latch
designed for general purpose storage applications in digital
systems. It is a multifunctional device capable of storing
single line data in eight addressable latches, and being a
one-of-eight decoder and demultiplexer with active level
HIGH outputs. The device also incorporates an active level
LOW common clear for resetting all latches, as well as an
active level LOW enable.
■ Common clear
■ Easily expandable
■ Random (addressable) data entry
■ Serial to parallel capability
■ 8 bits of storage/output of each bit available
■ Active high demultiplexing/decoding capability
The DM9334 has four modes of operation which are shown
in the mode selection table. In the addressable latch mode,
data on the data line (D) is written into the addressed latch.
The addressed latch will follow the data input with all non-
addressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous state
and are unaffected by the data or address inputs.
In the one-of-eight decoding or demultiplexing mode, the
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs
are LOW and unaffected by the address and data inputs.
When operating the device as an addressable latch,
changing more than one bit of the address could impose a
transient wrong address. Therefore, this should only be
done while in the memory mode.
The function tables summarize the operation of the prod-
uct.
Ordering Code:
Order Number Package Number
Package Description
DM9334N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006609
www.fairchildsemi.com
Function Tables
E
C
Mode
L
H
L
H
H
L
Addressable Latch
Memory
Active HIGH Eight Channel Demultiplexer
Clear
H
L
Inputs
Present Output States
Mode
C
L
L
L
L
L
•
E
H
L
L
L
L
•
D
X
L
H
L
H
•
A0
X
A1
X
L
L
L
L
•
A2
X
L
Q0
L
Q1
L
Q2
L
Q3
L
L
L
L
L
•
Q4
L
Q5
L
Q6
L
Q7
L
Clear
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
Demultiplex
•
•
•
•
•
•
•
•
•
•
L
H
H
H
H
H
•
L
H
L
L
L
L
•
H
X
L
H
L
H
•
H
X
L
H
X
L
L
L
L
•
H
X
L
L
L
L
L
L
L
L
L
L
L
H
QN−1
L
Memory
QN−1 QN−1 QN−1
QN−1 QN−1
L
H
H
H
QN−1
QN−1
L
QN−1
H
QN−1
Addressable
Latch
•
•
•
•
•
•
•
•
•
•
•
H
H
L
L
L
H
H
H
H
H
H
H
QN−1
QN−1
QN−1
QN−1
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care Condition
Q
= Previous Output State
N−1
Logic Diagram
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Storage Temperature Range
0° to +70°C
−65°C to +150°C
Recommended Operating Conditions
Symbol
VCC
Parameter
Min
4.75
2
Nom
Max
Units
V
Supply Voltage
5
5.25
VIH
VIL
IOH
IOL
tW
HIGH Level Input Voltage
V
LOW Level Input Voltage
0.8
−0.8
16
V
HIGH Level Output Current
LOW Level Output Current
ENABLE Pulse Width (Figure 1) (Note 3)
mA
mA
ns
19
20
20
10
13
13
14
5
tSU
Setup Time
(Note 3)
Data 1 (Figure 5)
Data 0 (Figure 5)
Address (Figure 6)
(Note 2)
ns
tH
Hold Time
(Note 3)
Data 1 (Figure 5)
Data 0 (Figure 5)
0
0
0
−10
−13
ns
TA
Free Air Operating Temperature
70
°C
Note 2: The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is
addressed without affecting the other latches.
Note 3: T = 25°C and V = 5V.
A
CC
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
= Min, I = −12 mA
Min
Max
Units
(Note 4)
V
V
Input Clamp Voltage
HIGH Level
V
V
V
V
V
V
−1.5
V
V
I
CC
I
= Min, I = Max
OH
CC
OH
2.4
3.6
0.2
Output Voltage
= Max, V = Min
IH
IL
V
LOW Level
= Min, I = Max
CC OL
OL
0.4
1
V
Output Voltage
= Min, V = Max
IL
IH
I
I
Input Current @ Max Input Voltage
= Max, V = 5.5V
mA
I
CC
I
HIGH Level
V
= Max
E Input
Others
60
40
IH
CC
µA
Input Current
V = 2.4V
I
I
LOW Level
V
= Max
E Input
Others
−2.4
−1.6
−100
86
IL
CC
mA
Input Current
V = 0.4V
I
I
I
Short Circuit Output Current
Supply Current
V
V
= Max (Note 5)
= Max
−30
mA
mA
OS
CC
CC
CC
56
Note 4: All typicals are at V = 5V, T = 25°C.
CC
A
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
3
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Switching Characteristics
at VCC = 5V and T = 25°C
A
From (Input)
R = 400Ω, C = 15 pF
L L
Symbol
Parameter
Units
ns
To (Output)
Enable to Output,
(Figure 1)
Min
Max
t
t
t
t
t
t
t
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
PLH
28
Enable to Output,
(Figure 1)
PHL
PLH
PHL
PLH
PHL
PHL
27
35
28
35
35
31
ns
Data to Output,
(Figure 4)
ns
Data to Output,
(Figure 4)
ns
Address to Output,
(Figure 2)
ns
Address to Output,
(Figure 2)
ns
Clear to Output,
(Figure 3)
ns
Switching Time Waveforms
Other Conditions: C = H, A = Stable
Other Conditions: E = L, C = L, D = H
FIGURE 1.
FIGURE 2.
Other Conditions: E = L, C = H, A = Stable
Other Conditions: E = H
FIGURE 4.
FIGURE 3.
Other Conditions: C = H
Note: The shaded areas indicate when the inputs are permitted to change
for predictable output performance.
Other Conditions: C = H, A = Stable
FIGURE 6.
FIGURE 5.
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4
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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5
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