DM74ALS169BMX [FAIRCHILD]
Synchronous Up/Down Counter ; 同步加/减计数器\n
| 型号： | DM74ALS169BMX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Synchronous Up/Down Counter
|
| 文件： | 总7页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 1984
Revised April 2000
DM74ALS169B
Synchronous Four-Bit Up/Down Counters
General Description
Features
These synchronous presettable counters feature an inter-
nal carry look ahead for cascading in high speed counting
applications. The DM74ALS169B is a four-bit binary up/
down counter. The carry output is decoded to prevent
spikes during normal mode of counting operation. Synchro-
nous operation is provided so that outputs change coinci-
dent with each other when so instructed by count enable
inputs and internal gating. This mode of operation elimi-
nates the output counting spikes which are normally asso-
■ Switching specifications at 50 pF
■ Switching specifications guaranteed over full tempera-
ture and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin-for-pin compatible with Schottky
and low power Schottky TTL counterpart
■ Improved AC performance over Schottky and low power
Schottky counterparts
ciated with asynchronous (ripple clock) counters.
A
buffered clock input triggers the four flip-flops on the rising
(positive going) edge of clock input waveform.
■ Synchronously programmable
■ Internal look ahead for fast counting
■ Carry output for n-bit cascading
■ Synchronous counting
These counters are fully programmable; that is, the outputs
may each be preset either HIGH or LOW. The load input
circuitry allows loading with carry-enable output of cas-
caded counters. As loading is synchronous, setting up a
low level at the load input disables the counter and causes
the outputs to agree with the data inputs after the next
clock pulse.
■ ESD inputs
The carry look-ahead circuitry permits cascading counters
for n-bit synchronous applications without additional gating.
Both count enable inputs (P and T) must be LOW to count.
The direction of the count is determined by the level of the
up/down input. When the input is HIGH, the counter counts
UP; when LOW, it counts DOWN. Input T is fed forward to
enable the carry outputs. The carry output thus enabled will
produce a low level output pulse with a duration approxi-
mately equal to the high portion of the QA output when
counting UP, and approximately equal to the low portion of
the QA when counting DOWN. This low level overflow carry
pulse can be used to enable successively cascaded
stages. Transitions at the enable P or T inputs are allowed
regardless of the level of the clock input.
The control functions for these counters are fully synchro-
nous. Changes at control inputs (enable P, enable T, load,
up/down) which modify the operating mode have no effect
until clocking occurs. The function of the counter (whether
enabled, disabled, loading or counting) will be dictated
solely by the conditions meeting the stable setup and hold
times.
Ordering Code:
Order Number Package Number
Package Description
DM74ALS169BM
DM74ALS169BN
M16A
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 2000 Fairchild Semiconductor Corporation
DS006207
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Connection Diagram
Mode Select Table
Action on Rising
Clock Edge
LOAD
EP
ET
U/D
L
H
H
H
H
X
L
X
L
X
H
L
Load (Pn → Qn)
Count Up (Increment)
Count Down (Decrement)
No Change (Hold)
L
L
H
X
X
H
X
X
No Change (Hold)
State Diagram
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Logic Diagram
3
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Absolute Maximum Ratings(Note 1)
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
Storage Temperature Range
Typical θJA
0°C to +70°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
−65°C to +150°C
N Package
78.1°C/W
M Package
106.8°C/W
Recommended Operating Conditions
Symbol
Parameter
Min
4.5
2
Nom
Max
Units
V
VCC
VIH
VIL
Supply Voltage
5
5.5
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency
V
0.8
−0.4
8
V
IOH
IOL
fCLK
tSU
mA
mA
MHz
0
40
Setup Time (Note 2)
Data;
15↑
6
ns
A, B, C, D
En P, En T
Load
15↑
15↑
15↑
8
8
ns
ns
ns
U/D
10
tH
Hold Time (Note 2)
Data;
0↑
−3
ns
A, B, C, D
En P, En T
Load
0↑
0↑
−3
−4
−4
ns
ns
U/D
0↑
ns
ns
tW
Width of Clock Pulse
13
Note 2: The symbol (↑) indicates that the rising edge of the clock is used as reference.
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Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C
Symbol
Parameter
Input Clamp Voltage
HIGH Level
Conditions
CC = 4.5V, II = −18 mA
IOH = −0.4 mA
Min
Typ
Max
Units
VIK
V
−1.5
V
VOH
VOL
II
V
CC − 2
V
V
Output Voltage
VCC = 4.5V to 5.5V
LOW Level
VCC = 4.5V
IOL = 8 mA
0.35
0.5
0.1
Output Voltage
Input Current @ Max
Input Voltage
VCC = 5.5V, VIH = 7V
mA
IIH
IIL
HIGH Level Input Current
LOW Level Input Current
Output Drive Current
Supply Current
VCC = 5.5V, VIH = 2.7V
VCC = 5.5V, VIL = 0.4V
VCC = 5.5V, VO = 2.25V
VCC = 5.5V
20
−0.2
−112
25
µA
mA
mA
mA
IO
−30
ICC
15
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From
To
Min
Max
Units
fMAX
Maximum Clock Frequency
40
MHz
tPLH
Propagation Delay Time
V
CC = 4.5V to 5.5V
L = 500Ω
L = 50 pF
Clock
Ripple Carry
3
20
ns
LOW-to-HIGH Level Output
R
C
tPHL
tPLH
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Clock
Clock
Clock
Ripple Carry
Any Q
6
2
5
20
15
20
ns
ns
ns
Any Q
tPLH
tPHL
tPLH
tPHL
Propagation Delay Time
En T
En T
Ripple Carry
Ripple Carry
2
3
5
5
13
16
19
19
ns
ns
ns
ns
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
U/D (Note 3) Ripple Carry
U/D (Note 3) Ripple Carry
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Note 3: Propagation delay time from up/down to ripple carry must be measured with the counter at either a minimum or a maximum count. As the logic level
of the up/down input is changed, the ripple carry output will follow. If the count is minimum (0), the ripple carry output transition will be in phase. If the count is
maximum, the ripple carry output will be out of phase.
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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相关型号：
DM74ALS169BMX_NL
Binary Counter, ALS Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, TTL, PDSO16, 0.150 INCH, MS-012AC, SOIC-16
FAIRCHILD
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