CD4024BCN [FAIRCHILD]
7-Stage Ripple Carry Binary Counter; 7级纹波进位二进制计数器
| 型号： | CD4024BCN |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 7-Stage Ripple Carry Binary Counter |
| 文件： | 总6页 (文件大小：59K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
October 1987
Revised April 2002
CD4024BC
7-Stage Ripple Carry Binary Counter
General Description
Features
The CD4024BC is a 7-stage ripple-carry binary counter.
Buffered outputs are externally available from stages 1
through 7. The counter is reset to its logical “0” stage by a
logical “1” on the reset input. The counter is advanced one
count on the negative transition of each clock pulse.
■ Wide supply voltage range: 3.0V to 15V
■ High noise immunity: 0.45 VDD (typ.)
■ Low power TTL compatibility: Fan out of 2 driving 74L
or 1 driving 74LS
■ High speed: 12 MHz (typ.)
input pulse rate VDD − VSS = 10V
■ Fully static operation
Ordering Code:
Order Number Package Number
Package Description
CD4024BCM
CD4024BCN
M14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Top View
© 2002 Fairchild Semiconductor Corporation
DS005957
www.fairchildsemi.com
Logic Diagrams
Input Logic
Flip-flop logic (1 of 7 identical stages).
Block Diagram
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2
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions (Note 1)
DC Supply Voltage (VDD
)
−0.5 to +18 VDC
−0.5 to VDD +0.5 VDC
−65°C to +150°C
DC Supply Voltage (VDD
Input Voltage (VIN
Operating Temperature Range (TA)
)
+3 to +15 VDC
0 to VDD VDC
Input Voltage (VIN
)
)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
−55°C to +125°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed, they are not meant to imply that
the devices should be operated at these limits. The table of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provides
conditions for actual device operation.
700 mW
500 mW
Small Outline
Lead Temperature
Note 2: VSS = 0V unless otherwise specified.
(Soldering, 10 seconds) (TL)
260°C
DC Electrical Characteristics (Note 2)
−55°C
+25°C
Typ
0.3
+125°C
Symbol
IDD
Parameter
Conditions
Units
Min
Max
Min
Max
5
Min
Max
Quiescent Device Current
V
V
V
DD = 5V
5
150
300
600
DD = 10V
DD = 15V
10
20
0.5
10
20
µA
0.7
VOL
VOH
VIL
LOW Level Output Voltage
HIGH Level Output Voltage
LOW Level Input Voltage
HIGH Level Input Voltage
|lO|<1 µA
V
V
V
DD = 5V
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
DD = 10V
DD = 15V
V
V
V
|lO|<1 µA
V
V
V
DD = 5V
4.95
9.95
4.95
9.95
5
4.95
9.95
DD = 10V
DD = 15V
10
15
14.95
14.95
14.95
|lO|<1 µA
VDD = 5V, VO = 0.5V or 4.5V
VDD = 10V, VO = 1.0V or 9.0V
VDD = 15V, VO = 1.5V or 13.5V
1.5
3.0
4.0
2
4
6
1.5
3.0
4.0
1.5
3.0
4.0
VIH
|lO|<1 µA
V
V
V
V
V
V
V
V
V
V
V
DD = 5V, VO = 0.5V or 4.5V
DD = 10V, VO = 1.0V or 9.0V
DD = 15V, VO = 1.5V or 13.5V
DD = 5V, VO = 0.4V
3.5
7.0
3.5
7.0
3
6
3.5
7.0
V
11.0
0.64
1.6
11.0
0.51
1.3
9
11.0
0.36
0.9
IOL
IOH
IIN
LOW Level Output Current
(Note 3)
0.88
2.25
8.8
DD = 10V, VO = 0.5V
DD = 15V, VO = 1.5V
DD = 5V, VO = 4.6V
mA
4.2
3.4
2.4
HIGH Level Output Current
(Note 3)
−0.64
−1.6
−4.2
−0.51 −0.88
−1.3 −2.25
−0.36
−0.9
−2.4
DD = 10V, VO = 9.5V
DD = 15V, VO = 13.5V
DD = 15V, VIN = 0V
mA
−3.4
−8.8
−5
Input Current
−0.1
−10
−0.1
−1.0
µA
−5
DD = 15V, VIN = 15V
0.1
10
0.1
1.0
Note 3: IOH and IOL are tested one output at a time.
3
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AC Electrical Characteristics (Note 4)
T
A = 25°C, CL = 50 pF, RL = 200 k, tr and tf = 20 ns unless otherwise specified
Symbol
Parameter
Propagation Delay Time
to Q1 Output
Conditions
Min
Typ
185
85
Max
350
125
100
200
100
80
Units
tPHL, tPLH
tTHL, tTLH
tWL, tWH
tRCL, tFCL
fCL
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DD = 5V
DD = 10V
DD = 15V
DD = 5V
ns
70
Transition Time
100
50
DD = 10V
DD = 15V
DD = 5V
ns
ns
40
Minimum Input Pulse Width
Input Rise and Fall Time
Maximum Input Pulse Frequency
Reset Propagation Delay Time
Reset Minimum Pulse Width
Input Capacitance (Note 5)
75
200
110
90
DD = 10V
DD = 15V
DD = 5V
40
35
15
DD = 10V
DD = 15V
DD = 5V
10
µs
8
1.5
4
5
12
15
185
85
70
185
85
70
5
DD = 10V
DD = 15V
DD = 5V
MHz
ns
5
tPHL
350
125
100
350
125
100
7.5
DD = 10V
DD = 15V
DD = 5V
tWH
DD = 10V
DD = 15V
ns
CIN
Any Input
pF
Note 4: AC Parameters are guaranteed by DC correlated testing.
Note 5: Capacitance is guaranteed by periodic testing.
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4
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
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