74VHCT138ASJX [FAIRCHILD]
3-To-8-Line Demultiplexer ; 3-至8行解复用器\n
| 型号： | 74VHCT138ASJX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 3-To-8-Line Demultiplexer
|
| 文件： | 总6页 (文件大小：72K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 1997
Revised April 1999
74VHCT138A
3-to-8 Decoder/Demultiplexer
ply voltage and to the output pins with VCC = 0V. These cir-
General Description
cuits prevent device destruction due to mismatched supply
and input/output voltages. This device can be used to inter-
face 3V to 5V systems and two supply systems such as
battery backup.
The VHCT138A is an advanced high speed CMOS 3-to-8
DECODER fabricated with silicon gate CMOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
Features
■ High Speed: tPD = 7.6 ns (typ) at VCC = 5V
When the device is enabled, 3 Binary Select inputs (A0, A1
and A2) determine which one of the outputs (O0–O7) will go
LOW. When enable input E3 is held LOW or either E1 or E2
■ Low power dissipation: ICC = 4 µA (max.) at TA = 25°C
is held HIGH, decoding function is inhibited and all outputs
go HIGH. E3, E1 and E2 inputs are provided to ease cas-
■ Power down protection is provided on all inputs and
outputs
cade connection and for use as an address decoder for
memory systems. Protection circuits ensure that 0V to 7V
can be applied to the input pins without regard to the sup-
■ Pin and function compatible with 74HCT138
Ordering Code:
Order Number
74VHCT138AM
74VHCT138ASJ
74VHCT138AMTC
74VHCT138AN
Package Number
M16A
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
M16D
MTC16
N16E
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A0–A2
E1–E2
E3
Description
Address Inputs
Enable Inputs
Enable Input
Outputs
O0–O7
© 1999 Fairchild Semiconductor Corporation
DS500014.prf
www.fairchildsemi.com
Truth Table
Inputs
Outputs
E1
E2
E3
A0
A1
A2
O0 O1 O2 O3 O4 O5 O6 O7
H
X
X
X
H
X
X
X
L
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
L
H
H
H
L
H
H
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 5)
−0.5V to +7.0V
Supply Voltage (VCC
)
DC Input Voltage (VIN
)
−0.5V to +7.0V Supply Voltage (VCC
)
4.5V to +5.5V
0V to +5.5V
DC Output Voltage (VOUT
)
Input Voltage (VIN
)
(Note 2)
−0.5V to 7.0V
−0.5V to VCC+ 0.5V
−20 mA
Output Voltage (VOUT
)
(Note 3)
(Note 3)
0V to VCC
0V to 5.5V
Input Diode Current (IIK
)
(Note 2)
Output Diode Current (IOK
(Note 4)
)
Operating Temperature (TOPR
)
−40°C to +85°C
±20 mA Input Rise and Fall Time (tr, tf)
DC Output Current (IOUT
)
±25 mA
±75 mA
V
CC = 5.0V ± 0.5V
0
20 ns/V
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
DC VCC/GND Current (ICC
)
Storage Temperature (TSTG
Lead Temperature (TL)
(Soldering, 10 seconds)
)
−65°C to +150°C
260°C
Note 2: V = 0V.
CC
Note 3: HIGH or LOW state.
I
absolute maximum rating must be
OUT
observed.
Note 4: V
<GND, V
> V (Outputs Active).
OUT CC
OUT
Note 5: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
T
= 25°C
T = −40°C to +85°C
A
V
(V)
A
CC
Symbol
Parameter
Units
Conditions
Min
Typ
Max
Min
Max
V
V
V
HIGH Level Input Voltage 4.5 − 5.5
LOW Level Input Voltage 4.5 − 5.5
2.0
2.0
V
V
IH
0.8
0.8
IL
HIGH Level
4.5
4.5
4.4
4.5
0.0
4.4
V
V
= V
I
OH
= −50 µA
= −8 mA
= 50 µA
= 8 mA
OH
IN
IH
V
V
Output Voltage
3.94
3.80
or V
I
IL OH
V
LOW Level
4.5
0.1
0.36
±0.1
4.0
0.1
= V
I
OL
OL
IN
IH
Output Voltage
4.5
0.44
±1.0
20.0
1.50
or V
I
IL OL
I
I
I
Input Leakage Current
Quiescent Supply Current
0 − 5.5
5.5
µA
µA
mA
V
= 5.5V or GND
IN
IN
V
V
= V or GND
CC
IN
CC
Maximum I
5.5
1.35
= 3.4V
CCT
CC/Input
in
other inputs = V or GND
CC
I
Output Leakage Current
0
0.5
5.0
µA
V
= 5.5V
OFF
OUT
AC Electrical Characteristics
T
= 25°C
T = −40°C to +85°C
A
V
(V)
A
CC
Symbol
Parameter
Units
ns
Conditions
Min
Typ
7.6
8.1
Max
10.4
11.4
Min
Max
12.0
13.0
t
t
Propagation Delay
5.0 ± 0.5
1.0
1.0
C
C
= 15 pF
= 50 pF
PLH
L
A
to O
n
PHL
L
n
t
t
Propagation Delay
to O
5.0 ± 0.5
5.0 ± 0.5
6.6
7.1
9.1
1.0
1.0
10.5
11.5
C
C
= 15 pF
= 50 pF
PLH
PHL
L
ns
10.1
E
L
3
n
t
t
Propagation Delay
or E to O
7.0
7.5
9.6
1.0
1.0
11.0
12.0
C
C
= 15 pF
= 50 pF
PLH
PHL
L
ns
10.6
E
L
1
2
n
C
C
Input Capacitance
4
10
10
pF
pF
V
= Open
IN
CC
Power Dissipation Capacitance
49
(Note 6)
PD
Note 6: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
PD
operating current can be obtained by the equation: I (opr.) = C * V * f + I .
CC
CC
PD
CC
IN
3
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
www.fairchildsemi.com
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
相关型号：
©2020 ICPDF网 联系我们和版权申明