74LVX244M_NL [FAIRCHILD]
Bus Driver, LV/LV-A/LVX/H Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013, SOIC-20;型号: | 74LVX244M_NL |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Bus Driver, LV/LV-A/LVX/H Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013, SOIC-20 光电二极管 |
文件: | 总6页 (文件大小:84K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 1993
Revised April 2005
74LVX244
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
Features
■ Input voltage translation from 5V to 3V
The LVX244 is an octal non-inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The inputs tolerate up
to 7V allowing interface of 5V systems to 3V systems.
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number Package Number
Package Description
74LVX244M
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX244SJ
74LVX244MTC
MTC20
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Pin Descriptions
IEEE/IEC
Pin Names
OE1, OE2
Description
3-STATE Output Enable Inputs
I0–I7
Inputs
O0–O7
Outputs
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
L
H
Z
Connection Diagram
H
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
L
L
L
H
X
L
H
Z
H
H
X
HIGH Voltage Level
Immaterial
L
Z
LOW Voltage Level
High Impedance
© 2005 Fairchild Semiconductor Corporation
DS011552
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Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC
DC Input Diode Current (IIK
VI 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK
VO 0.5V
)
0.5V to 7.0V
)
Supply Voltage (VCC
)
2.0V to 3.6V
0V to 5.5V
20 mA
Input Voltage (VI)
0.5V to 7V
Output Voltage (Vo)
0V to VCC
)
Operating Temperature (TA)
40 C to 85 C
0 ns/V to 100 ns/V
20 mA
20 mA
Input Rise and Fall Time ( t/ V)
VO VCC 0.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
DC Output Voltage (VO)
DC Output Source
0.5V to VCC 0.5V
or Sink Current (IO)
25 mA
DC VCC or Ground Current
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
(ICC or IGND
)
75 mA
65 C to 150 C
180 mW
Storage Temperature (TSTG
Power Dissipation
)
DC Electrical Characteristics
T
25 C
Typ
T
40 C to 85 C
A
A
V
Symbol
Parameter
Units
Conditions
CC
Min
1.5
2.0
2.4
Max
Min
Max
V
HIGH Level Input
Voltage
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
1.5
2.0
2.4
IH
V
V
V
V
LOW Level Input
Voltage
0.5
0.8
0.8
0.5
0.8
0.8
IL
V
V
HIGH Level Output
Voltage
1.9
2.9
2.0
3.0
1.9
2.9
V
V
V
V
V
or V
or V
or V
I
50
50
A
A
OH
OL
IN
IH
IL OH
I
I
OH
OH
2.58
2.48
4 mA
LOW Level Output
Voltage
0.0
0.0
0.1
0.1
0.1
0.1
I
50
50
A
A
IN
IH
IL OL
V
A
I
I
OL
OL
0.36
0.25
0.44
2.5
4 mA
I
3-STATE Output
V
V
V
V
OZ
IN
IH
V
IL
Off-State Current
or GND
CC
OUT
IN
I
Input Leakage Current
Quiescent Supply Current
3.6
3.6
0.1
4.0
1.0
A
A
5.5V or GND
IN
I
40.0
V or GND
CC
CC
IN
Noise Characteristics (Note 3)
V
T
25 C
Limit
CC
A
C
L
(pF)
Symbol
Parameter
Quiet Output Maximum Dynamic V
Units
(V)
3.3
3.3
3.3
3.3
Typ
V
V
V
V
0.5
0.5
0.8
0.8
2.0
0.8
V
V
V
V
50
OLP
OLV
IHD
ILD
OL
Quiet Output Minimum Dynamic V
50
50
50
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Note 3: Input t
t
3 ns
r
f
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2
AC Electrical Characteristics
V
T
25 C
Typ
T
A
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
Min
Max
11.4
14.9
7.1
Min
Max
13.5
17.0
8.5
t
t
Propagation Delay
Time
2.7
6.1
8.6
4.7
7.2
7.1
1.0
1.0
1.0
1.0
1.0
C
C
C
C
C
R
C
R
C
R
C
R
C
R
C
15 pF
50 pF
15 pF
50 pF
15 pF,
1 k
PLH
PHL
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
ns
3.3 0.3
2.7
10.6
13.8
12.0
16.5
t
t
3-STATE Output
Enable Time
PZL
PZH
9.6
5.5
8.0
17.3
8.8
1.0
1.0
1.0
20.0
10.5
14.0
50 pF,
1 k
ns
3.3 0.3
15 pF,
1 k
12.3
50 pF,
1 k
t
t
t
t
3-STATE Output
Disable Time
2.7
3.3 0.3
2.7
11.6
9.7
16.0
11.4
1.5
1.0
1.0
19.0
13.0
1.5
50 pF,
1 k
PLZ
ns
ns
PHZ
Output to Output
Skew (Note 4)
50 pF
OSLH
OSHL
3.3
1.5
1.5
Note 4: Parameter guaranteed by design. t
|t
t
|, t
|t
t
|
PHLn
OSLH
PLHm
PLHn OSHL
PHLm
Capacitance
T
25 C
Typ
T
40 C to 85 C
A
A
Symbol
Parameter
Units
Min
Max
10
Min
Max
C
C
C
Input Capacitance
Output Capacitance
4
6
10
pF
pF
pF
IN
OUT
PD
Power Dissipation Capacitance (Note 5)
19
Note 5: C is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
PD
3
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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6
相关型号:
74LVX244SJX
Bus Driver, LV/LV-A/LVX/H Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, 5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-20
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