74LVT240WM [FAIRCHILD]
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs; 低压带3态输出的八路缓冲器/线路驱动器
| 型号： | 74LVT240WM |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs |
| 文件： | 总8页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
July 1999
Revised March 2005
74LVT240 • 74LVTH240
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
Features
■ Input and output interface capability to systems at
The LVT240 and LVTH240 are inverting octal buffers and
line drivers designed to be employed as memory address
drivers, clock drivers and bus oriented transmitters or
receivers which provides improved PC board density.
5V VCC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH240),
also available without bushold feature (74LVT240)
The LVTH240 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
■ Live insertion/extraction permitted
These octal buffers and line drivers are designed for low-
voltage (3.3V) VCC applications, but with the capability to
■ Power Up/Down high impedance provides glitch-free
bus loading
provide a TTL interface to a 5V environment. The LVT240
and LVTH240 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
■ Outputs source/sink 32 mA/ 64 mA
■ Functionally compatible with the 74 series 240
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Human-body model 2000V
Machine model 200V
Charged-device model 1000V
Ordering Code:
Package
Order Number
Package Description
Number
74LVT240WM
74LVT240SJ
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVT240MSA
74LVT240MTC
MSA20
MTC20
MTC20
74LVT240MTCX_NL
(Note 1)
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH240WM
74LVTH240SJ
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH240MSA
74LVTH240MTC
MSA20
MTC20
MTC20
74LVTH240MTCX_NL
(Note 1)
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JECED J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
© 2005 Fairchild Semiconductor Corporation
DS500153
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Logic Symbol
Pin Descriptions
IEEE/IEC
Pin Names
Description
OE1, OE2
I0–I7
3-STATE Output Enable Inputs
Inputs
O0–O7
3-STATE Outputs
Truth Tables
Inputs
Outputs
(Pins 12, 14, 16, 18)
OE1
In
L
L
L
H
X
H
L
Connection Diagram
H
Z
Inputs
Outputs
(Pins 3, 5, 7, 9)
OE2
In
L
L
L
H
X
H
L
H
Z
H
L
X
Z
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
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2
Absolute Maximum Ratings(Note 2)
Symbol
VCC
Parameter
Supply Voltage
Value
Conditions
Units
V
0.5 to 4.6
0.5 to 7.0
0.5 to 7.0
VI
DC Input Voltage
V
VO
DC Output Voltage
Output in 3-STATE
V
0.5 to 7.0 Output in HIGH or LOW State (Note 3)
V
IIK
IOK
IO
DC Input Diode Current
DC Output Diode Current
DC Output Current
50
50
VI GND
mA
mA
mA
mA
mA
mA
C
VO GND
64
VO VCC Output at HIGH State
VO VCC Output at LOW State
128
ICC
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
64
IGND
TSTG
128
65 to 150
Recommended Operating Conditions
Symbol
VCC
Parameter
Min
2.7
0
Max
3.6
5.5
32
Units
Supply Voltage
V
V
VI
Input Voltage
IOH
IOL
TA
HIGH-Level Output Current
LOW-Level Output Current
mA
64
Free-Air Operating Temperature
40
0
85
C
t/ V
Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V
10
ns/V
Note 2: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 3: I Absolute Maximum Rating must be observed.
O
DC Electrical Characteristics
T
40 C to 85 C
A
V
(V)
CC
Symbol
Parameter
Units
Conditions
Min
Typ
Max
(Note 4)
V
V
V
V
Input Clamp Diode Voltage
Input HIGH Voltage
2.7
2.7–3.6
2.7–3.6
2.7–3.6
2.7
1.2
0.8
V
V
I
18 mA
0.1V or
IK
I
2.0
V
V
IH
O
O
Input LOW Voltage
V
0.1V
A
IL
CC
Output HIGH Voltage
V
0.2
V
V
V
V
V
V
V
V
A
A
A
A
A
A
A
A
A
I
I
I
I
I
I
I
I
100
OH
CC
OH
OH
OH
OL
OL
OL
OL
OL
2.4
2.0
8 mA
3.0
32 mA
V
Output LOW Voltage
2.7
0.2
0.5
100 A
OL
2.7
24 mA
16 mA
32 mA
64 mA
0.8V
3.0
0.4
3.0
0.5
3.0
0.55
I
I
I
Bushold Input Minimum Drive
3.0
75
75
V
V
I(HOLD)
I
I
(Note 5)
2.0V
Bushold Input Over-Drive
Current to Change State
3.0
500
500
(Note 6)
(Note 7)
I(OD)
(Note 5)
Input Current
3.6
3.6
10
1
V
V
V
V
5.5V
0V or V
0V
I
I
I
I
I
Control Pins
Data Pins
CC
5
3.6
0
1
V
CC
I
I
Power Off Leakage Current
Power up/down 3-STATE
Output Current
100
0V V or V
5.5V
OFF
I
O
V
V
V
V
0.5V to 3.0V
PU/PD
O
I
0–1.5V
100
A
GND or V
0.5V
CC
I
3-STATE Output Leakage Current
3-STATE Output Leakage Current
3.6
3.6
5
5
A
A
OZL
O
O
I
3.0V
OZH
3
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DC Electrical Characteristics (Continued)
T
40 C to 85 C
A
V
(V)
CC
Symbol
Parameter
Units
Conditions
Min
Typ
Max
(Note 4)
I
3-STATE Output Leakage Current
Power Supply Current
3.6
3.6
3.6
3.6
3.6
10
0.19
5
A
mA
mA
mA
mA
V
V
O
5.5V
OZH
CC
I
Outputs HIGH
Outputs LOW
CCH
I
Power Supply Current
CCL
I
Power Supply Current
0.19
0.19
Outputs Disabled
CCZ
I
Power Supply Current
V
V
5.5V,
Outputs Disabled
One Input at V
CCZ
CC
O
I
Increase in Power Supply Current
(Note 8)
3.6
0.2
mA
0.6V
CC
CC
Other Inputs at V or GND
CC
Note 4: All typical values are at V
3.3V, T
25 C.
CC
A
Note 5: Applies to bushold versions only (74LVTH240).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V or GND.
CC
Dynamic Switching Characteristics (Note 9)
V
T
25 C
Typ
0.8
0.8
Conditions
CC
A
Symbol
Parameter
Units
C
50 pF, R
500
(V)
3.3
3.3
Min
Max
L
L
V
V
Quiet Output Maximum Dynamic V
V
V
(Note 10)
(Note 10)
OLP
OL
Quiet Output Minimum Dynamic V
OLV
OL
Note 9: Characterized in SOIC package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
T
40 C to 85 C
50 pF, R 500
A
C
L
L
V
3.3V 0.3V
Typ
V
2.7V
Max
Symbol
Parameter
Units
CC
CC
Min
Max
Min
(Note 11)
t
t
t
Propagation Delay Data to Output
Output Enable Time
1.1
1.3
1.1
1.4
2.0
1.8
3.8
4.0
4.6
4.4
4.5
4.3
1.1
1.3
1.1
1.4
2.0
1.8
4.6
4.2
5.6
5.1
4.7
4.3
PLH
ns
ns
PHL
PZH
t
PZL
t
t
t
t
Output Disable Time
ns
PHZ
PLZ
Output to Output Skew
(Note 12)
OSHL
OSLH
1.0
1.0
ns
Note 11: All typical values are at V
3.3V, T
25 C.
CC
A
Note 12: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
).
OSLH
OSHL
Capacitance (Note 13)
Symbol
Parameter
Input Capacitance
Output Capacitance
Conditions
Typical
Units
pF
C
C
V
V
0V, V 0V or V
3
6
IN
CC
I
CC
3.0V, V
0V or V
CC
pF
OUT
CC
O
Note 13: Capacitance is measured at frequency f 1 MHz, per MIL-STD-883, Method 3012.
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4
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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8
相关型号：
74LVT240WMX
LVT SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, 0.300 INCH, MS-013, SOIC-20
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