74LS174 [FAIRCHILD]
Hex/Quad D-Type Flip-Flops with Clear; 六/四路D型触发器与Clear
| 型号： | 74LS174 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Hex/Quad D-Type Flip-Flops with Clear |
| 文件： | 总7页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1992
Revised April 2000
DM74LS174 • DM74LS175
Hex/Quad D-Type Flip-Flops with Clear
General Description
Features
These positive-edge-triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. All have a direct clear
input, and the quad (175) versions feature complementary
outputs from each flip-flop.
■ DM74LS174 contains six flip-flops with single-rail
outputs
■ DM74LS175 contains four flip-flops with double-rail
outputs
Information at the D inputs meeting the setup time require-
ments is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a partic-
ular voltage level and is not directly related to the transition
time of the positive-going pulse. When the clock input is at
either the HIGH or LOW level, the D input signal has no
effect at the output.
■ Buffered clock and direct clear inputs
■ Individual data input to each flip-flop
■ Applications include:
Buffer/storage registers
Shift registers
Pattern generators
■ Typical clock frequency 40 MHz
■ Typical power dissipation per flip-flop 14 mW
Ordering Code:
Order Number Package Number
Package Description
DM74LS174M
DM74LS174SJ
DM74LS174N
DM74LS175M
DM74LS175SJ
DM74LS175N
M16A
M16D
N16E
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
DM74LS174
DM74LS175
© 2000 Fairchild Semiconductor Corporation
DS006404
www.fairchildsemi.com
Function Table
(Each Flip-Flop)
Inputs
Outputs
Clear
Clock
D
X
H
L
Q
L
Q †
H
L
H
H
H
X
↑
H
L
↑
L
H
L
X
Q0
Q0
H = HIGH Level (steady state)
L = LOW Level (steady state)
X = Don’t Care
↑ = Transition from LOW-to-HIGH level
= The level of Q before the indicated steady-state input conditions were established.
Q
0
† = DM74LS175 only
Logic Diagrams
DM74LS174
DM74LS175
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2
Absolute Maximum Ratings(Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
Storage Temperature Range
0°C to +70°C
−65°C to +150°C
DM74LS174 Recommended Operating Conditions
Symbol
Parameter
Min
4.75
2
Nom
Max
Units
V
VCC
VIH
VIL
Supply Voltage
5
5.25
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 2)
Clock Frequency (Note 3)
Pulse Width
V
0.8
−0.4
8
V
IOH
IOL
mA
mA
MHz
MHz
fCLK
fCLK
tW
0
0
30
25
Clock
Clear
20
20
20
0
ns
(Note 4)
tSU
tH
tREL
TA
Data Setup Time (Note 4)
Data Hold Time (Note 4)
Clear Release Time (Note 4)
ns
ns
ns
°C
25
0
Free Air Operating Temperature
70
Note 2: C = 15 pF, R = 2 kΩ, T = 25°C and V = 5V.
L
L
A
CC
Note 3: C = 50 pF, R = 2 kΩ, T = 25°C and V = 5V.
L
L
A
CC
Note 4: T = 25°C and V = 5V.
A
CC
DM74LS174 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions
Input Clamp Voltage = Min, I = −18 mA
Typ
Min
Max
Units
(Note 5)
V
V
V
V
V
V
V
−1.5
V
V
I
CC
I
HIGH Level
= Min, I = Max
OH
OH
CC
2.7
3.4
Output Voltage
LOW Level
= Max, V = Min
IH
IL
V
= Min, I = Max
OL
OL
CC
0.35
0.25
0.5
Output Voltage
= Max, V = Min
V
IL
IH
I
= 4 mA, V = Min
0.4
0.1
OL
CC
I
I
I
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level
V
V
V
= Max, V = 7V
mA
I
CC
CC
CC
I
= Max, V = 2.7V
20
µA
IH
IL
I
= Max
Clock
Clear
Data
−0.4
−0.4
−0.36
−100
26
Input Current
V = 0.4V
mA
I
I
I
Short Circuit Output Current
Supply Current
V
V
= Max (Note 6)
= Max (Note 7)
−20
mA
mA
OS
CC
CC
16
CC
Note 5: All typicals are at V = 5V, T = 25°C.
CC
A
Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 7: With all outputs OPEN and 4.5V applied to all data and clear inputs, I is measured after a momentary ground, then 4.5V applied to the clock.
CC
3
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DM74LS174 Switching Characteristics
at VCC = 5V and T = 25°C
A
R
= 2 kΩ
From (Input)
L
C
= 15 pF
C = 50 pF
L
Symbol
Parameter
To (Output)
Units
L
Min
30
Max
Min
25
Max
f
t
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
MHz
ns
MAX
PLH
PHL
PHL
Clock to Output
Clock to Output
Clear to Output
30
30
35
32
36
42
t
t
ns
ns
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4
DM74LS175 Recommended Operating Conditions
Symbol
Parameter
Min
4.75
2
Nom
Max
Units
V
V
V
V
Supply Voltage
5
5.25
CC
IH
IL
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 8)
Clock Frequency (Note 9)
Pulse Width
V
0.8
−0.4
8
V
I
I
f
f
t
mA
mA
MHz
MHz
OH
OL
0
0
30
CLK
CLK
W
25
Clock
Clear
20
20
20
0
ns
(Note 10)
t
t
t
Data Setup Time (Note 10)
Data Hold Time (Note 10)
Clear Release Time (Note 10)
Free Air Operating Temperature
ns
ns
ns
°C
SU
H
25
0
REL
T
70
A
Note 8: C = 15 pF, R = 2 kΩ, T = 25°C and V = 5V.
L
L
A
CC
Note 9: C = 50 pF, R = 2 kΩ, T = 25°C and V = 5V.
L
L
A
CC
Note 10: T = 25°C and V = 5V.
A
CC
DM74LS175 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions
Input Clamp Voltage = Min, I = −18 mA
Typ
Min
Max
Units
(Note 11)
V
V
V
V
V
V
V
−1.5
V
V
I
CC
CC
I
HIGH Level
= Min, I = Max
OH
OH
2.7
3.4
Output Voltage
LOW Level
= Max, V = Min
IH
IL
V
= Min, I = Max
OL
OL
CC
0.35
0.25
0.5
Output Voltage
= Max, V = Min
V
IL
IH
I
= 4 mA, V = Min
0.4
0.1
OL
CC
I
I
I
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level
V
V
V
= Max, V = 7V
mA
I
CC
CC
CC
I
= Max, V = 2.7V
20
µA
IH
IL
I
= Max
Clock
Clear
Data
−0.4
−0.4
−0.36
−100
18
Input Current
V = 0.4V
mA
I
I
I
Short Circuit Output Current
Supply Current
V
V
= Max (Note 12)
= Max (Note 13)
−20
mA
mA
OS
CC
CC
11
CC
Note 11: All typicals are at V = 5V, T = 25°C.
CC
A
Note 12: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 13: With all outputs OPEN and 4.5V applied to all data and clear inputs, I
is measured after a momentary ground, then 4.5V applied to the clock
CC
input.
DM74LS175 Switching Characteristics
at VCC = 5V and T = 25°C (See Section 1 for Test Waveforms and Output Load)
A
R
= 2 kΩ
From (Input)
L
C
= 15 pF
C = 50 pF
L
Symbol
Parameter
To (Output)
Units
L
Min
30
Max
Min
25
Max
f
Maximum Clock Frequency
MHz
ns
MAX
t
Propagation Delay Time
PLH
Clock to Q or Q
Clock to Q or Q
30
30
32
36
LOW-to-HIGH Level Output
t
Propagation Delay Time
PHL
ns
HIGH-to-LOW Level Output
t
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
PLH
Clear to Q
Clear to Q
25
35
29
42
ns
ns
t
PHL
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号：
74LS174B
D Flip-Flop, LS Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, PDIP16, DIP-16
NXP
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