74ACT153MTCX [FAIRCHILD]
4-Input Digital Multiplexer ; 4 ，输入数字多路复用器\n
| 型号： | 74ACT153MTCX |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 4-Input Digital Multiplexer
|
| 文件： | 总9页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1988
Revised November 1999
74AC153 • 74ACT153
Dual 4-Input Multiplexer
General Description
Features
The AC/ACT153 is a high-speed dual 4-input multiplexer
with common select inputs and individual enable inputs for
each section. It can select two lines of data from four
sources. The two buffered outputs present data in the true
(non-inverted) form. In addition to multiplexer operation,
the AC/ACT153 can act as a function generator and gener-
ate any two functions of three variables.
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ACT153 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC153SC
74AC153SJ
M16A
M16D
MTC16
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC153MTC
74AC153PC
74ACT153SC
74ACT153MTC
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
M16A
MTC16
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Enable Input
Side B Enable Input
Side A Output
I0a–I3a
I
0b–I3b
S0, S1
Ea
Eb
Za
Zb
Side B Output
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009928
www.fairchildsemi.com
Functional Description
Truth Table
The AC/ACT153 is a dual 4-input multiplexer. It can select
two bits of data from up to four sources under the control of
the common Select inputs (S0, S1). The two 4-input multi-
Select
Inputs
Inputs (a or b)
Output
plexer circuits have individual active-LOW Enables (Ea, Eb)
S0
S1
I0
I1
I2
I3
E
H
L
Z
L
L
H
L
which can be used to strobe the outputs independently.
When the Enables (Ea, Eb) are HIGH, the corresponding
X
L
X
L
L
L
X
L
X
X
X
L
X
X
X
X
X
X
X
X
outputs Za, Zb) are forced LOW. The AC/ACT153 is the
L
L
H
X
logic implementation of a 2-pole, 4-position switch, where
the position of the switch is determined by the logic levels
supplied to the Select inputs. The logic equations for the
outputs are shown below.
H
L
H
L
L
H
H
H
H
L
L
L
L
L
X
X
X
X
X
H
X
X
X
X
X
L
X
X
X
L
H
L
Z
a = Ea • (I0a • S1 • S0 + I1a • S1 • S0
I2a • S1 • S0 + I3a • S1 • S0)
+
+
L
H
X
X
H
L
H
H
Z
b = Eb • (I0b • S1 • S0 + I1b • S1 • S0
I2b • S1 • S0 + I3b • S1 • S0)
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
VIN from 30% to 70% of VCC
or Sink Current (IO)
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.1
3.15
3.85
0.9
2.1
3.15
3.85
0.9
V
OUT = 0.1V
2.25
2.75
1.5
V
or VCC − 0.1V
VIL
Maximum LOW Level
Input Voltage
V
OUT = 0.1V
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or VCC − 0.1V
VOH
Minimum HIGH Level
Output Voltage
4.4
4.4
IOUT = −50 µA
5.4
5.4
VIN = VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
OH = −12 mA
V
V
OH = −24 mA
OH = −24 mA (Note 2)
VOL
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
0.1
0.1
I
OUT = 50 µA
0.1
0.1
VIN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
I
I
OL = 12 mA
V
OL = 24 mA
OL = 24 mA (Note 2)
IIN
Maximum Input
5.5
±0.1
±1.0
µA
VI = VCC, GND
(Note 4)
IOLD
Leakage Current
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
VOLD = 1.65V Max
VOHD = 3.85V Min
VIN = VCC
IOHD
−75
ICC
5.5
4.0
40.0
µA
(Note 4)
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC
.
3
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DC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.0
2.0
0.8
0.8
4.4
5.4
2.0
2.0
0.8
0.8
4.4
5.4
V
OUT = 0.1V
or VCC − 0.1V
OUT = 0.1V
or VCC − 0.1V
V
V
V
1.5
VIL
Maximum LOW Level
Input Voltage
1.5
V
1.5
VOH
Minimum HIGH Level
Output Voltage
4.49
5.49
I
OUT = −50 µA
IN = VIL or VIH
V
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
V
I
I
OH = − 24 mA
OH = − 24 mA (Note 5)
VOL
Maximum LOW Level
Output Voltage
0.001
0.001
I
OUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
4.5
5.5
0.36
0.36
0.44
0.44
I
I
OL = 24 mA
OL = 24 mA (Note 5)
IIN
Maximum Input
Leakage Current
Maximum
5.5
5.5
±0.1
±1.0
µA
VI = VCC, GND
VI = VCC − 2.1V
ICCT
0.6
1.5
mA
ICC/Input
IOLD
IOHD
ICC
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
V
V
V
OLD = 1.65V Max
OHD = 3.85V Min
IN = VCC
−75
5.5
4.0
40.0
µA
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
(Note 7)
3.3
Units
Min
2.5
2.0
3.0
2.5
2.5
1.5
Typ
9.5
6.5
8.5
6.5
8.0
5.5
Max
15.0
11.0
14.5
11.0
13.5
9.5
Min
tPLH
Propagation Delay
2.5
2.0
2.5
2.0
2.0
1.5
17.5
12.5
16.5
12.0
16.0
11.0
ns
ns
Sn to Zn
5.0
tPHL
Propagation Delay
Sn to Zn
3.3
5.0
tPLH
Propagation Delay
3.3
ns
ns
5.0
E to Zn
tPHL
Propagation Delay
3.3
5.0
2.5
2.0
7.0
5.0
11.0
8.0
2.0
1.5
12.5
9.0
E to Zn
tPLH
Propagation Delay
3.3
5.0
3.3
5.0
2.5
1.5
1.5
1.5
7.5
5.5
7.0
5.0
12.5
9.0
2.0
1.5
1.5
1.5
14.5
10.5
13.0
10.0
ns
ns
I
n to Zn
tPHL
Propagation Delay
In to Zn
11.5
8.5
Note 7: Voltage Range 3.3 is 3.3V ± 0 3V
Voltage Range 5.0 is 5.0V ± 0.5V
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4
AC Electrical Characteristics for ACT
VCC
TA = +25°C
TA = −40°C to +85°C
CL = 50 pF
CL = 50 pF
Symbol
Parameter
(V)
Units
(Note 8)
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
5.0
5.0
3.0
7.0
7.0
11.5
2.0
2.5
13.5
13.5
ns
ns
Sn to Zn
tPHL
Propagation Delay
3.0
2.0
11.5
10.5
S
n to Zn
tPLH
Propagation Delay
5.0
5.0
6.5
6.0
2.0
2.5
12.5
11.0
ns
ns
En to Zn
tPHL
Propagation Delay
3.0
9.5
En to Zn
tPLH
Propagation Delay
In to Zn
5.0
5.0
2.5
2.0
5.5
5.5
9.5
9.5
2.0
2.0
11.0
11.0
ns
ns
tPHL
Propagation Delay
I
n to Zn
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
4.5
Units
Conditions
CIN
Input Capacitance
pF
pF
V
CC = OPEN
CC = 5.0V
CPD
Power Dissipation Capacitance
65.0
V
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
Package Number M16A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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9
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