74ACT151SC [FAIRCHILD]
8-Input Multiplexer; 8输入多路复用器型号: | 74ACT151SC |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | 8-Input Multiplexer |
文件: | 总9页 (文件大小:100K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
November 1988
Revised November 1999
74AC151 • 74ACT151
8-Input Multiplexer
General Description
Features
The AC/ACT151 is a high-speed 8-input digital multiplexer.
It provides, in one package, the ability to select one line of
data from up to eight sources. The AC/ACT151 can be
used as a universal function generator to generate any
logic function of four variables. Both true and complemen-
tary outputs are provided.
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ACT151 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC151SC
74AC151SJ
74AC151MTC
74AC151PC
74ACT151SC
74ACT151SJ
74ACT151PC
M16A
M16D
MTC16
N16E
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
Data Inputs
I0–I7
S0–S2
Select Inputs
E
Z
Z
Enable Input
Data Output
Inverted Data Output
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009927
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Truth Table
Functional Description
The AC/ACT151 is a logic implementation of a single pole,
8-position switch with the switch position controlled by the
state of three Select inputs, S0, S1, S2. Both true and com-
Inputs
Outputs
S2
S1
S0
E
H
L
L
L
L
L
L
L
L
Z
Z
L
plementary outputs are provided. The Enable input (E) is
active LOW. When it is not activated, the complementary
output is HIGH and the true output is LOW regardless of all
other inputs. The logic function provided at the output is:
X
L
X
L
X
L
H
I0
I1
I2
I3
I4
I5
I6
I7
I0
I1
I2
I3
I4
I5
I6
I7
L
L
H
L
Z = E • (I0 • S0 • S1 • S2 + I1 • S0 • S1 • S2
+
L
H
H
L
I2 • S0 • S1 • S2 + I3 • S0 • S1 • S2 + I4 • S0 • S1 • S2 + I5
S0 • S1 • S2 + I6 • S0 • S1 • S2 + I 7 • S0 • S1 • S2)
•
L
H
L
The AC/ACT151 provides the ability, in one package, to
select from eight sources of data or control information. By
proper manipulation of the inputs, the AC/ACT151 can pro-
vide any logic function of four variables and its comple-
ment.
H
H
H
H
L
H
L
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
V
IN from 30% to 70% of VCC
or Sink Current (IO)
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
V
IN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.1
3.15
3.85
0.9
2.1
3.15
3.85
0.9
V
OUT = 0.1V
2.25
2.75
1.5
V
or VCC − 0.1V
VIL
Maximum LOW Level
Input Voltage
V
OUT = 0.1V
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or VCC − 0.1V
VOH
Minimum HIGH Level
Output Voltage
4.4
4.4
IOUT = −50 µA
5.4
5.4
V
IN = VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
OH = −12 mA
V
V
OH = −24 mA
OH = −24 mA(Note 2)
VOL
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
0.1
0.1
IOUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
I
I
OL = 12 mA
V
OL = 24 mA
OL = 24 mA (Note 2)
IIN
(Note 4)
Maximum Input
Leakage Current
5.5
±0.1
±1.0
µA
V
I = VCC, GND
IOLD
IOHD
Minimum Dynamic
5.5
5.5
75
mA
mA
V
V
OLD = 1.65V Max
OHD = 3.85V Min
Output Current (Note 3)
−75
ICC
(Note 4)
Maximum Quiescent
Supply Current
5.5
4.0
40.0
µA
VIN = VCC or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC
.
3
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DC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
V
OUT = 0.1V
or VCC − 0.1V
OUT = 0.1V
or VCC − 0.1V
1.5
2.0
0.8
0.8
4.4
5.4
VIL
Maximum LOW Level
Input Voltage
1.5
V
V
V
V
V
V
1.5
VOH
Minimum HIGH Level
Output Voltage
4.49
5.49
I
OUT = −50 µA
V
IN = VIL or VIH
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
I
OH = −24 mA
I
OH = −24 mA (Note 5)
VOL
Maximum LOW Level
Output Voltage
0.001
0.001
I
OUT = 50 µA
0.1
0.1
V
IN = VIL or VIH
4.5
5.5
0.36
0.36
0.44
0.44
I
OL = 24 mA
I
OL = 24 mA (Note 5)
IIN
Maximum Input
Leakage Current
Maximum
5.5
5.5
±0.1
±1.0
µA
VI = VCC, GND
VI = VCC − 2.1V
ICCT
0.6
1.5
mA
ICC/Input
IOLD
IOHD
ICC
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
75
mA
mA
V
V
V
OLD = 1.65V Max
OHD = 3.85V Min
IN = VCC
−75
5.5
4.0
40.0
µA
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
VCC
T
A = +25°C
TA = −40°C to +85°C
C
L = 50 pF
C
L = 50 pF
Max
Symbol
Parameter
(V)
(Note 7)
3.3
Units
Min
Typ
11.5
8.5
12.0
8.5
8.0
6.0
8.5
6.5
9.5
7.0
9.5
7.0
Max
18.0
13.0
18.0
13.0
13.0
10.0
13.0
10.0
14.0
10.5
15.0
11.0
Min
3.0
2.0
2.5
1.5
2.0
1.5
1.5
1.5
2.0
1.5
2.0
1.5
tPLH
Propagation Delay
3.0
2.5
2.5
2.0
2.5
2.0
1.5
1.5
2.5
1.5
2.5
1.5
20.0
15.0
20.0
15.0
14.0
11.0
14.0
11.0
15.5
11.0
16.0
12.0
ns
ns
ns
ns
ns
ns
Sn to Z or Z
5.0
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
Sn to Z or Z
3.3
5.0
Propagation Delay
E to Z or Z
3.3
5.0
Propagation Delay
E to Z or Z
3.3
5.0
Propagation Delay
In to Z or Z
3.3
5.0
Propagation Delay
3.3
In to Z or Z
5.0
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
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AC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
C
L = 50 pF
C
L = 50 pF
Max
Symbol
Parameter
(V)
Units
(Note 8)
Min
Typ
Max
Min
tPLH
Propagation Delay
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
3.5
12.5
12.5
12.5
12.5
6.0
15.5
3.0
3.0
3.0
3.5
2.5
2.5
2.5
2.5
3.0
3.0
3.0
3.0
17.0
16.5
16.5
18.5
10.0
10.0
9.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Sn to Z
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Propagation Delay
3.5
3.5
4.0
2.5
2.5
2.5
3.0
3.5
3.5
3.5
4.0
15.5
15.0
16.5
9.5
Sn to Z
Propagation Delay
Sn to Z
Propagation Delay
Sn to Z
Propagation Delay
E to Z
Propagation Delay
E to Z
6.0
9.0
Propagation Delay
E to Z
6.0
8.5
Propagation Delay
E to Z
6.5
10.0
11.5
12.0
12.0
12.5
10.5
12.5
13.5
13.0
14.0
Propagation Delay
In to Z
7.5
Propagation Delay
In to Z
8.0
Propagation Delay
8.0
I
n to Z
Propagation Delay
In to Z
8.0
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol
Parameter
Typ
Units
Conditions
CIN
Input Capacitance
4.5
pF
pF
VCC = OPEN
VCC = 5.0V
CPD
Power Dissipation Capacitance
70.0
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
Package Number M16A
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOIC), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
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8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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