74AC241 [FAIRCHILD]
Octal Buffer/Line Driver with 3-STATE Outputs; 八路缓冲器/ 3态输出线路驱动器
| 型号： | 74AC241 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Octal Buffer/Line Driver with 3-STATE Outputs |
| 文件： | 总8页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1988
Revised March 2005
74AC241 • 74ACT241
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
Features
The AC/ACT241 is an octal buffer and line driver designed
to be employed as a memory address driver, clock driver
and bus-oriented transmitter or receiver which provides
improved PC board density.
■ ICC and IOZ reduced by 50%
■ Non-inverting 3-STATE outputs drive bus lines or buffer
memory address registers
■ Outputs source/sink 24 mA
■ ACT241 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC241SC
74AC241SJ
M20B
M20D
MTC20
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74AC241MTC
74AC241PC
74ACT241SC
74ACT241SJ
74ACT241MTC
74ACT241PC
M20B
M20D
MTC20
N20A
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE1
3-STATE Output Enable Input
OE2
3-STATE Output Enable Input (Active HIGH)
I0–I7
O0–O7
Inputs
Outputs
Truth Tables
Inputs
Outputs
OE1
In
(Pins 12, 14, 16, 18)
L
L
L
H
X
L
H
Z
Connection Diagram
H
Inputs
Outputs
OE2
In
(Pins 3, 5, 7, 9)
H
H
L
L
H
X
L
H
Z
H
L
X
Z
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
FACT is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009942
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Diode Current (IIK
VI 0.5V
)
0.5V to 7.0V
)
Supply Voltage (VCC
)
20 mA
20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI VCC 0.5V
ACT
DC Input Voltage (VI)
0.5V to VCC 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
VO 0.5V
)
0V to VCC
20 mA
20 mA
Operating Temperature (TA)
Minimum Input Edge Rate ( V/ t)
AC Devices
40 C to 85 C
VO VCC 0.5V
DC Output Voltage (VO)
DC Output Source
0.5V to VCC 0.5V
V
IN from 30% to 70% of VCC
or Sink Current (IO)
50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate ( V/ t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
65 C to 150 C
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140 C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
V
T
25 C
T
A
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.1
2.1
3.15
3.85
0.9
V
0.1V
IH
OUT
2.25
2.75
1.5
3.15
3.85
0.9
V
or V
0.1V
CC
Maximum LOW Level
Input Voltage
V
0.1V
0.1V
IL
OUT
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or V
CC
Minimum HIGH Level
Output Voltage
OH
4.4
4.4
I
50 A
OUT
5.4
5.4
V
V or V
IL IH
IN
OH
OH
OH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
12 mA
24 mA
V
V
24 mA (Note 2)
V
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
OL
0.1
0.1
I
50
A
OUT
0.1
0.1
V
V
or V
IH
IN
OL
OL
OL
IL
3.0
4.5
5.5
5.5
0.36
0.36
0.36
0.1
0.44
0.44
0.44
1.0
I
I
I
12 mA
24 mA
V
A
A
24 mA (Note 2)
V , GND
CC
I
I
(Note 4)
Maximum Input Leakage Current
Maximum 3-STATE
V
N
I
V (OE)
V , V
IL IH
OZ
I
Leakage Current
5.5
0.25
2.5
V
V
V
V
V
V
, GND
I
CC
V
, GND
O
CC
I
I
I
Minimum Dynamic
5.5
5.5
5.5
75
75
mA
mA
A
1.65V Max
3.85V Min
OLD
OHD
OLD
OHD
IN
Output Current (Note 3)
(Note 4) Maximum Quiescent Supply Current
4.0
40.0
V
or GND
CC
CC
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .
CC
IN
CC
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2
DC Electrical Characteristics for ACT
V
T
25 C
T
A
40 C to 85 C
CC
A
Symbol
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
1.5
1.5
1.5
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
0.8
4.4
5.4
V
0.1V
IH
OUT
V
V
V
2.0
0.8
0.8
4.4
5.4
or V
0.1V
0.1V
0.1V
50
CC
Maximum LOW Level
Input Voltage
V
IL
OUT
or V
CC
Minimum HIGH Level
Output Voltage
4.49
5.49
I
A
OH
OUT
V
V or V
IL IH
IN
OH
OH
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
V
V
I
I
I
24 mA
24 mA (Note 5)
V
Maximum LOW Level
Output Voltage
0.001
0.001
50
A
OL
OUT
0.1
0.1
V
V
or V
IH
IN
OL
OL
IL
4.5
5.5
5.5
0.36
0.36
0.1
0.44
0.44
1.0
V
A
I
I
24 mA
24 mA (Note 5)
I
I
I
Maximum Input
Leakage Current
Maximum 3-STATE
Leakage Current
Maximum
V
V
, GND
IN
I
CC
5.5
5.5
0.25
2.5
1.5
A
V
V
V
V
, V
OZ
I
IL
IH
V
, GND
O
I
CC
0.6
mA
V
2.1V
CCT
CC
I
/Input
CC
I
I
I
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
75
75
mA
mA
A
V
V
V
1.65V Max
3.85V Min
OLD
OHD
CC
OLD
OHD
IN
4.0
40.0
V
CC
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
V
T
25 C
T
40 C to 85 C
50 pF
Min Max
CC
A
A
C
50 pF
C
L
Symbol
Parameter
(V)
(Note 7)
3.3
Units
L
Min
Typ
Max
9.0
t
t
t
t
t
t
Propagation Delay
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.0
1.5
1.5
1.5
6.0
5.0
6.0
4.5
6.5
5.5
7.0
5.5
8.0
6.5
7.0
6.0
1.5
1.0
1.0
1.0
1.0
1.0
1.5
1.0
2.0
1.0
1.0
1.0
10.0
7.5
PLH
ns
ns
ns
ns
ns
ns
Data to Output
5.0
7.0
Propagation Delay
Data to Output
3.3
9.0
10.5
7.5
PHL
PZH
PZL
PHZ
PLZ
5.0
7.0
Output Enable Time
3.3
12.5
9.0
13.0
9.5
5.0
Output Enable Time
Output Disable Time
Output Disable Time
3.3
12.0
9.0
13.0
9.5
5.0
3.3
12.0
10.0
12.5
10.0
12.5
10.5
13.0
10.5
5.0
3.3
5.0
Note 7: Voltage Range 3.3 is 3.3V 3.3V
Voltage Range 5.0 is 5.0V 0.5V
3
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AC Electrical Characteristics for ACT
V
T
25 C
T
40 C to 85 C
50 pF
Min Max
CC
A
A
C
50 pF
C
L
Symbol
Parameter
(V)
(Note 8)
5.0
Units
ns
L
Min
Typ
Max
t
t
Propagation Delay
1.5
6.5
9.0
1.5
10.0
PLH
Data to Output
Propagation Delay
Data to Output
5.0
1.5
7.0
9.0
1.5
10.0
ns
PHL
t
t
t
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
1.5
1.5
1.5
2.0
6.0
7.0
8.0
7.0
9.0
1.0
1.5
1.5
1.5
10.0
11.0
11.5
11.5
ns
ns
ns
ns
PZH
PZL
PHZ
PLZ
10.0
10.5
10.5
Note 8: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
Parameter
Typ
Units
pF
Conditions
C
C
Input Capacitance
4.5
V
OPEN
5.0V
IN
CC
CC
Power Dissipation Capacitance
45.0
pF
V
PD
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4
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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8
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