74AC20SJX [FAIRCHILD]

Dual 4-input NAND Gate ; 双4输入与非门\n
74AC20SJX
型号: 74AC20SJX
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

Dual 4-input NAND Gate
双4输入与非门\n

栅极 触发器 逻辑集成电路 光电二极管
文件: 总7页 (文件大小:84K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
November 1988  
Revised November 1999  
74AC20  
Dual 4-Input NAND Gate  
General Description  
The AC20 contains four 4-input NAND gates.  
Features  
ICC reduced by 50%  
Outputs source/sink 24 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC20SC  
74AC20SJ  
74AC20MTC  
74AC20PC  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150Narrow Body  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn, Cn, Dn  
On  
Description  
Inputs  
Outputs  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009918  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Recommended Operating  
Conditions  
Supply Voltage (VCC  
)
0.5V to +7.0V  
DC Input Diode Current (IIK  
VI = −0.5V  
)
Supply Voltage (VCC  
)
2.0V to 6.0V  
0V to VCC  
20 mA  
+20 mA  
Input Voltage (VI)  
VI = VCC + 0.5V  
Output Voltage (VO)  
0V to VCC  
DC Input Voltage (VI)  
0.5V to VCC + 0.5V  
Operating Temperature (TA)  
40°C to +85°C  
125 mV/ns  
DC Output Diode Current (IOK  
)
Minimum Input Edge Rate (V/t)  
V
V
O = −0.5V  
20 mA  
+20 mA  
V
IN from 30% to 70% of VCC  
O = VCC + 0.5V  
VCC @ 3.3V, 4.5V, 5.5V  
DC Output Voltage (VO)  
DC Output Source  
0.5V to VCC + 0.5V  
or Sink Current (IO)  
± 50 mA  
DC VCC or Ground Current  
per Output Pin (ICC or IGND  
)
± 50 mA  
Note 1: Absolute maximum ratings are those values beyond which damage  
to the device may occur. The databook specifications should be met, with-  
out exception, to ensure that the system design is reliable over its power  
supply, temperature, and output/input loading variables. Fairchild does not  
recommend operation of FACT circuits outside databook specifications.  
Storage Temperature (TSTG  
Junction Temperature (TJ)  
PDIP  
)
65°C to +150°C  
140°C  
DC Electrical Characteristics  
VCC  
T
A = +25°C  
TA = −40°C to +85°C  
Symbol  
VIH  
Parameter  
Units  
Conditions  
VOUT = 0.1V  
(V)  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
Typ  
1.5  
Guaranteed Limits  
Minimum HIGH Level  
Input Voltage  
2.1  
2.1  
3.15  
3.85  
0.9  
2.25  
2.75  
1.5  
3.15  
3.85  
0.9  
V
or VCC 0.1V  
VIL  
Maximum LOW Level  
Input Voltage  
VOUT = 0.1V  
2.25  
2.75  
2.99  
4.49  
5.49  
1.35  
1.65  
2.9  
1.35  
1.65  
2.9  
V
V
or VCC 0.1V  
VOH  
Minimum HIGH Level  
Output Voltage  
4.4  
4.4  
IOUT = −50 µA  
5.4  
5.4  
VIN = VIL or VIH  
3.0  
4.5  
5.5  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
0.1  
2.46  
3.76  
4.76  
0.1  
I
I
I
OH = −12 mA  
V
V
OH = −24 mA  
OH = −24 mA (Note 2)  
VOL  
Maximum LOW Level  
Output Voltage  
0.002  
0.001  
0.001  
0.1  
0.1  
I
OUT = 50 µA  
0.1  
0.1  
VIN = VIL or VIH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
I
I
I
OL = 12 mA  
V
OL = 24 mA  
OL = 24 mA (Note 2)  
IIN  
Maximum Input  
5.5  
± 0.1  
± 1.0  
µA  
VI = VCC, GND  
(Note 4)  
IOLD  
Leakage Current  
Minimum Dynamic  
Output Current (Note 3)  
Maximum Quiescent  
Supply Current  
5.5  
5.5  
5.5  
75  
mA  
mA  
µA  
V
OLD = 1.65V Max  
VOHD = 3.85V Min  
IN = VCC  
or GND  
IOHD  
75  
20.0  
ICC  
2.0  
V
(Note 4)  
Note 2: All outputs loaded; thresholds on input associated with output under test.  
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.  
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC  
.
www.fairchildsemi.com  
2
AC Electrical Characteristics  
VCC  
T
A = +25°C  
T
A = −40°C to +85°C  
L = 50 pF  
Max  
C
L = 50 pF  
C
Symbol  
Parameter  
(V)  
(Note 5)  
3.3  
Units  
Min  
2.0  
1.5  
1.5  
1.5  
Typ  
6.0  
5.0  
5.0  
4.0  
Max  
8.5  
7.0  
7.0  
6.0  
Min  
tPLH  
Propagation Delay  
1.5  
1.0  
1.0  
1.0  
10.0  
8.0  
9.0  
7.0  
ns  
ns  
5.0  
tPHL  
Propagation Delay  
3.3  
5.0  
Note 5: Voltage Range 3.3 is 3.3V ± 0.3V  
Voltage Range 5.0 is 5.0V ± 0.5V  
Capacitance  
Symbol  
Parameter  
Typ  
Units  
Conditions  
CIN  
Input Capacitance  
4.5  
pF  
pF  
V
CC = OPEN  
CC = 5.0V  
CPD  
Power Dissipation Capacitance  
40.0  
V
3
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body  
Package Number M14A  
www.fairchildsemi.com  
4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
Package Number M14D  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Package Number MTC14  
www.fairchildsemi.com  
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Package Number N14A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
7
www.fairchildsemi.com  

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