74AC00PC_NL [FAIRCHILD]
NAND Gate, AC Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14;
| 型号： | 74AC00PC_NL |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | NAND Gate, AC Series, 4-Func, 2-Input, CMOS, PDIP14, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-14 栅 |
| 文件： | 总7页 (文件大小：90K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 1988
Revised November 1999
74AC00 • 74ACT00
Quad 2-Input NAND Gate
General Description
The AC/ACT00 contains four 2-input NAND gates.
Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
■ ACT00 has TTL-compatible inputs
Ordering Code:
Order Number Package Number
Package Description
74AC00SC
74AC00SJ
M14A
M14D
MTC14
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide
74AC00MTC
74AC00PC
74ACT00SC
74ACT00SJ
74ACT00MTC
74ACT00PC
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide
M14A
M14D
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form. (PC not available in Tape and Reel.)
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
Description
Inputs
Outputs
On
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009911
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
−0.5V to +7.0V
DC Input Diode Current (IIK
VI = −0.5V
)
Supply Voltage (VCC
)
−20 mA
+20 mA
AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
VI = VCC + 0.5V
ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
Input Voltage (VI)
Output Voltage (VO)
DC Output Diode Current (IOK
)
0V to VCC
V
V
O = −0.5V
−20 mA
+20 mA
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
AC Devices
−40°C to +85°C
O = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
−0.5V to VCC + 0.5V
V
IN from 30% to 70% of VCC
or Sink Current (IO)
±50 mA
VCC @ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
ACT Devices
125 mV/ns
125 mV/ns
DC VCC or Ground Current
per Output Pin (ICC or IGND
)
±50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
−65°C to +150°C
V
IN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
140°C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
DC Electrical Characteristics for AC
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
1.5
Guaranteed Limits
VIH
Minimum HIGH Level
Input Voltage
2.1
2.1
3.15
3.85
0.9
V
OUT = 0.1V
2.25
2.75
1.5
3.15
3.85
0.9
V
or VCC − 0.1V
VIL
Maximum LOW Level
Input Voltage
V
OUT = 0.1V
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or VCC − 0.1V
VOH
Minimum HIGH Level
Output Voltage
4.4
4.4
IOUT = −50 µA
5.4
5.4
VIN = VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
OH = −12 mA
V
V
OH = −24 mA
OH = −24 mA (Note 2)
VOL
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
0.1
0.1
I
OUT = 50 µA
0.1
0.1
VIN = VIL or VIH
3.0
4.5
5.5
0.36
0.36
0.36
0.44
0.44
0.44
I
I
I
OL = 12 mA
V
OL = 24 mA
OL = 24 mA (Note 2)
IIN
Maximum Input
5.5
±0.1
±1.0
µA
VI = VCC, GND
(Note 3) Leakage Current
IOLD
Minimum Dynamic
5.5
5.5
5.5
75
mA
mA
µA
VOLD = 1.65V Max
VOHD = 3.85V Min
VIN = VCC or GND
IOHD
Output Current (Note 4)
Maximum Quiescent Supply Current
−75
20.0
ICC
2.0
(Note 3)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
.
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2
DC Electrical Characteristics for ACT
VCC
T
A = +25°C
TA = −40°C to +85°C
Symbol
VIH
Parameter
Units
Conditions
(V)
4.5
5.5
4.5
5.5
4.5
5.5
Typ
1.5
1.5
1.5
1.5
Guaranteed Limits
Minimum HIGH Level
Input Voltage
2.0
2.0
0.8
0.8
4.4
5.4
2.0
2.0
0.8
0.8
4.4
5.4
V
OUT = 0.1V
or VCC − 0.1V
OUT = 0.1V
or VCC − 0.1V
V
V
V
VIL
Maximum LOW Level
Input Voltage
V
VOH
Minimum HIGH Level
Output Voltage
4.49
5.49
I
OUT = −50 µA
IN = VIL or VIH
V
4.5
5.5
4.5
5.5
3.86
4.86
0.1
3.76
4.76
0.1
I
I
OH = −24 mA
V
V
OH = −24 mA (Note 5)
VOL
Maximum LOW Level
Output Voltage
0.001
0.001
I
OUT = 50 µA
0.1
0.1
VIN = VIL or VIH
4.5
5.5
0.36
0.36
0.44
0.44
V
I
I
OL = 24 mA
OL = 24 mA (Note 5)
IIN
Maximum Input
5.5
±0.1
±1.0
µA
VI = VCC, GND
VI = VCC − 2.1V
Leakage Current
Maximum ICC/Input
Minimum Dynamic
Output Current (Note 6)
Maximum Quiescent
Supply Current
ICCT
IOLD
IOHD
ICC
5.5
5.5
5.5
0.6
1.5
75
mA
mA
mA
VOLD = 1.65V Max
VOHD = 3.85V Min
VIN = VCC
−75
5.5
2.0
20.0
µA
or GND
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
(Note 7)
3.3
Units
Min
2.0
1.5
1.5
1.5
Typ
7.0
6.0
5.5
4.5
Max
9.5
8.0
8.0
6.5
Min
tPLH
Propagation Delay
2.0
1.5
1.0
1.0
10.0
8.5
ns
ns
5.0
tPHL
Propagation Delay
3.3
8.5
5.0
7.0
Note 7: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
AC Electrical Characteristics for ACT
VCC
T
A = +25°C
T
A = −40°C to +85°C
L = 50 pF
Max
C
L = 50 pF
C
Symbol
Parameter
(V)
(Note 8)
5.0
Units
Min
1.5
1.5
Typ
5.5
4.0
Max
9.0
Min
tPLH
tPHL
Propagation Delay
Propagation Delay
1.0
1.0
9.5
8.0
ns
ns
5.0
7.0
Note 8: Voltage Range 5.0 is 5.0V ±0.5V
Capacitance
Symbol
Parameter
Typ
Units
pF
Conditions
CIN
Input Capacitance
4.5
V
CC = Open
CC = 5.0V
CPD
Power Dissipation Capacitance
30.0
pF
V
3
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Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
Package Number M14A
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide
Package Number M14D
5
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,4.4mm Wide
Package Number MTC14
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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相关型号：
74AC00SCTR
NAND Gate, AC Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-012, SOIC-14
FAIRCHILD
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