100302QC [FAIRCHILD]
Low Power Quint 2-Input OR/NOR Gate; 低功耗昆特2输入或/或非门
| 型号： | 100302QC |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Low Power Quint 2-Input OR/NOR Gate |
| 文件： | 总8页 (文件大小：81K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1989
Revised August 2000
100302
Low Power Quint 2-Input OR/NOR Gate
General Description
The 100302 is a monolithic quint 2-input OR/NOR gate with
common enable. All inputs have 50 kΩ pull-down resistors
and all outputs are buffered.
Features
■ 43% power reduction of the 100102
■ 2000V ESD protection
■ Pin/function compatible with 100102
■ Voltage compensated operating range = −4.2V to −5.7V
■ Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number Package Number
Package Description
100302SC
100302PC
100302QC
100302QI
M24B
N24E
V28A
V28A
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
Pin Descriptions
Pin Names
na–Dne
Description
D
Data Inputs
Enable Input
Data Outputs
E
Oa–Oe
Oa–Oe
Complementary Data Outputs
© 2000 Fairchild Semiconductor Corporation
DS010580
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Logic Symbol
Truth Table
D1X
D2X
OX
OX
E
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
L
H
L
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature (TSTG
Maximum Junction Temperature (TJ)
EE Pin Potential to Ground Pin
)
−65°C to +150°C
+150°C
Case Temperature (TC)
Commercial
V
−7.0V to +0.5V
VEE to +0.5V
−50 mA
0°C to +85°C
−40°C to +85°C
−5.7V to −4.2V
Input Voltage (DC)
Industrial
Output Current (DC Output HIGH)
ESD (Note 2)
Supply Voltage (VEE
)
≥2000V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics (Note 3)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C
Symbol
Parameter
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Input HIGH Current
Power Supply Current
Min
Typ
−955
−1705
Max
−870
Units
mV
mV
mV
mV
mV
mV
µA
Conditions
IN = VIH(Max) or VIL(Min)
VOH
VOL
VOHC
VOLC
VIH
−1025
−1830
−1035
Loading with
50Ω to −2.0V
Loading with
50Ω to −2.0V
V
V
−1620
IN = VIH(Min) or VIL(Max)
−1610
−870
−1165
−1830
0.50
Guaranteed HIGH Signal for All Inputs
Guaranteed LOW Signal for All Inputs
VIL
−1475
IIL
V
IN = VIL(Min)
IN = VIH(Max)
IIH
240
µA
V
IEE
−45
−36
−20
mA
Inputs OPEN
Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
DIP AC Electrical Characteristics
V
EE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol Parameter
Propagation Delay
T
C = 0°C
T
C = +25°C
TC = +85°C
Units
ns
Conditions
Min
Max
Min
Max
Min
Max
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
0.50
0.70
0.40
1.15
1.90
1.20
0.50
1.15
0.50
1.25
Data to Output
Figures 1, 2
Propagation Delay
Enable to Output
Transition Time
(Note 4)
0.70
0.40
1.90
1.20
0.80
0.40
2.00
1.20
ns
ns
Figures 1, 2
20% to 80%, 80% to 20%
Note 4: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
3
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Commercial Version (Continued)
SOIC and PLCC AC Electrical Characteristics
V
EE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol Parameter
Propagation Delay
T
C = 0°C
Max
T
C = +25°C
TC = +85°C
Units
ns
Conditions
Min
Min
Max
Min
Max
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
tOSHL
0.50
0.70
0.40
1.05
1.80
1.10
0.50
1.05
0.50
1.15
Data to Output
Figures 1, 2
Propagation Delay
(Note 5)
0.70
0.40
1.80
1.10
0.80
0.40
1.90
1.10
ns
Enable to Output
Transition Time
ns
Figures 1, 2
20% to 80%, 80% to 20%
Maximum Skew Common Edge
Output-to-Output Variation
Data to Output Path
PLCC Only
(Note 6)
250
310
200
330
250
330
200
280
250
310
200
330
250
330
200
280
250
310
200
330
250
330
200
280
ps
ps
ps
ps
ps
ps
ps
ps
tOSHL
tOSLH
tOSLH
tOST
tOST
tPS
Maximum Skew Common Edge
Output-to-Output Variation
Enable to Output Path
Maximum Skew Common Edge
Output-to-Output Variation
Data to Output Path
PLCC Only
(Note 6)
PLCC Only
(Note 6)
Maximum Skew Common Edge
Output-to-Output Variation
Enable to Output Path
Maximum Skew Opposite Edge
Output-to-Output Variation
Data to Output Path
PLCC Only
(Note 6)
PLCC Only
(Note 6)
Maximum Skew Opposite Edge
Output-to-Output Variation
Enable to Output Path
Maximum Skew
PLCC Only
((Note 6)
PLCC Only
(Note 6)
Pin (Signal) Transition Variation
Data to Output Path
tPS
Maximum Skew
PLCC Only
(Note 6)
Pin (Signal) Transition Variation
Enable to Output Path
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite
directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design.
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4
Industrial Version
PLCC DC Electrical Characteristics (Note 7)
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C
T
C = −40°C
TC = 0°C to +85°C
Symbol
Parameter
Units
mV
Conditions
Min
Max
−870
Min
Max
−870
VOH
VOL
VOHC
VOLC
VIH
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Input HIGH Current
Power Supply Current
−1085
−1830
−1095
−1025
−1830
−1035
V
IN = VIH(Max)
or VIL(Min)
IN = VIH(Min)
or VIL(Max)
Loading with
50Ω to −2.0V
Loading with
50Ω to −2.0V
−1575
−1620
V
mV
−1565
−870
−1610
−870
−1170
−1830
0.05
−1165
−1830
0.05
mV
mV
µA
Guaranteed HIGH Signal for ALL Inputs
Guaranteed LOW Signal for ALL Inputs
VIL
−1480
−1475
IIL
V
V
IN = VIL(Min)
IN = VIH(Max)
IIH
300
240
µA
IEE
−45
−20
−45
−20
mA
Inputs OPEN
Note 7: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under the “worst case” conditions.
PLCC AC Electrical Characteristics
V
EE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol Parameter
Propagation Delay
T
C = −40°C
T
C = +25°C
TC = +85°C
Units
ns
Conditions
Min
Max
Min
Max
Min
Max
tPLH
tPHL
tPLH
tPHL
tTLH
tTHL
0.40
1.05
0.50
1.05
0.50
1.15
Data to Output
Figures 1, 2
(Note 8)
Propagation Delay
Enable to Output
Transition Time
0.70
0.30
1.80
1.10
0.70
0.40
1.80
1.10
0.80
0.40
1.90
1.10
ns
ns
Figures 1, 2
20% to 80%, 80% to 20%
Note 8: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching.
5
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Test Circuitry
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 50Ω to GND
C
L = Fixture and stray capacitance ≤ 3 pF
FIGURE 1. AC Test Circuit
Switching Waveforms
FIGURE 2. Propagation Delay and Transition Times
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6
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
Package Number N24E
7
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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