EL0631 [EVERLIGHT]
8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER;
| 型号： | EL0631 |
| 厂家： | 
EVERLIGHT ELECTRONICS CO., LTD |
| 描述： | 8 PIN SOP DUAL CHANNEL HIGH SPEED 10MBit/s LOGIC GATE PHOTOCOUPLER |
| 文件： | 总13页 (文件大小：854K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Schematic
Features
• Complia
(Br <900
• High sp
• 10kV/μs
• Guarant
• Wide op
• Logic ga
• High iso
and out
• Complia
• Pb free
• UL and
• VDE approved (No.40028116)
• SEMKO approved
6. Vout 2
7. Vout 1
• NEMKO approved
• DEMKO approved
8. V
CC
• FIMKO approved
Description
The EL0630 and EL0631 are dual channel devices each consists of an
infrared emitting diode optically coupled to a high speed integrated
photo detector logic gate with a strobable output.
The devices are packaged in an 8-pin small outline package which
conforms to the standard SO8 footprint.
Applications
Truth Table (Positive Logic)
• Ground loop elimination
• LSTTL to TTL, LSTTL or 5 volt CMOS
• Line receiver, data transmission
• Data multiplexing
• Switching power supplies
• Pulse transformer replacement
• Computer peripheral interface
Input
H
L
Output
L
H
1
Copyright © 2010, Everlight All Rights Reserved. Release Date : April 22, 2015. Issue No: DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Rating
Unit
20
mA
V
DC/ Average Forward current
IF
VR
Input
5
45
Reverse voltage
mW
mW
mA
V
Power dissipation
PD
60
PC
Power dissipation
Output current
50
IO
Output
Output voltage
7.0
VO
Supply voltage (max 1 minute)
7.0
V
VCC
PO
Output Power Dissipation
Isolation vo
80
mW
ms
C
Operating
C
Storage te
Soldering t
C
Notes:
*1 AC for 1 mined together.
*2 For 10 secon
2
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Electrical Characteristics (Ta=-40 to 85°C unless specified otherwise)
Input
Max.
Unit
Parameter
Symbol
Min.
Typ.
Condition
IF =10mA
Forward voltage
Reverse voltage
-
1.4
-
1.8
-
V
V
VF
5.0
VR
IR =10μA
Temperature
coefficient of forward
voltage
-
-
-1.8
60
-
-
mV/°C
pF
VF/TA
IF =10mA
Input capacitance
CIN
VF =0, f=1MHz
Output
Max.
Unit
Parameter
Symbol
Min
Typ.
Condition
High level
current
Low level s
current
=5.5V
C =5.5V
Transfer
Para
n
=5.5V,
A,
=5mA,
ICL =13mA
VCC =5.5V, VO =0.6V,
IOL =13mA
HIGH Leve
Current
-
-
5
IFT
LOW Leve
Current
Input Threshold
Current
mA
3
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Switching Characteristics (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise)
Max.
100
Unit
ns
Parameter
Symbol
tPHL
Min
-
Typ.
-
Condition
Propagation delay
time to output High
level*4
CL =15pF, RL=350Ω,
TA =25°C
(Fig.11)
Propagation delay
time to output Low
level*5
CL =15pF, RL=350Ω,
-
-
100
ns
tPLH
TA =25°C
(Fig.11)
|tPHL
tPLH
–
|
Pulse width distortion
-
-
-
-
35
-
ns
ns
ns
CL =15pF, RL =350Ω
CL =15pF, RL =350Ω
CL =15pF, RL =350Ω
Output rise time*6
(Fig.11)
40
10
tr
tf
Output fall time*7
(Fig.11)
-
Common
Mode
=2.0V,
5°C
12 )
=2.0V,
5°C
12 )
=0.8V,
5°C
12 )
Transient
Immunity
at Logic
High*8
Common
Mode
Transient
Immunity
at Logic
Low*9
=0.8V,
5°C
12 )
4
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Typical Electro-Optical Characteristics Curves
5
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
6
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Fig. 11 Test circuit and waveforms for tPHL, tPLH, tr, and tf
Peak
V
CM
0V
5V
Vo
CM
H
Switching Pos. (A), I =0
F
V (Min)
O
V (Max)
O
Switching Pos. (B), I =7.5mA
F
V
CM
CM
L
0.5V
7
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Notes
*3 The VCC supply must be bypassed by a 0.1μF capacitor or larger. This can be either a ceramic or solid tantalum
capacitor with good high frequency characteristic and should be connected as close as possible to the package
VCC and GND pins
*4. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
*5. tPHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
*6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
*7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
*8 CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
HIGH state (i.e., VOUT > 2.0V).
*9 CML – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
LOW output state (i.e., VOUT < 0.8V).
Order Information
Part Num
EL0
Note
X = Pa
Z = Ta
V = VD
Opti
None
ntity
be
100 units per tube
2000 units per reel
2000 units per reel
2000 units per reel
2000 units per reel
-V
Standard + VDE
TA tape & reel option
TB tape & reel option
(TA)
(TB)
(TA)-V
(TB)-V
TA tape & reel option + VDE
TB tape & reel option + VDE
8
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Package Dimension
(Dimensions in mm)
Recommend
9
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Device Marking
EL
0630
YWWV
Notes
0630
Y
WW
V
d
d
d
d
10
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Tape & Reel Packing Specifications
Option TA
Option TB
Direction of feed from reel
Direction of feed from reel
Tape dimens
Dimension No.
A0
A1
B0
D0
D1
E
F
Dimension(mm)
Dimension No.
6.2±0.1
4.1±0.1 5.28±0.1 1.5±0.1
1.5±0.3
1.75±0.1
5.5±0.1
Po
P1
P2
t
W
K0
K1
12.0+0.3/
-0.1
Dimension(mm)
4.0±0.1
8.0±0.1
2.0±0.1
0.4±0.1
3.7±0.1
0.3±0.1
11
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
Precautions for Use
1. Soldering Condition
1.1 (A) Maximum Body Case Temperature Profile for evaluation of Reflow Profile
Note:
Preheat
Temperature
Temperature
Time (Tsmin to
Average ram
Other
Liquidus Tem
Time above
Peak Temperature (TP)
260°C
Time within 5 °C of Actual Peak Temperature: TP - 5°C
Ramp- Down Rate from Peak Temperature
30 s
6°C /second max.
Time 25°C to peak temperature
Reflow times
8 minutes max.
3 times
.
12
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
ꢀ
DATASHEET
8 PIN SOP DUAL CHANNEL HIGH SPEED
10MBit/s LOGIC GATE PHOTOCOUPLER
EL063X Series
DISCLAIMER
1. Above specification may be changed without notice. EVERLIGHT will reserve authority on material change for
above specification.
2. When using this product, please observe the absolute maximum ratings and the instructions for using outlined in
these specification sheets. EVERLIGHT assumes no responsibility for any damage resulting from use of the
product which does not comply with the absolute maximum ratings and the instructions included in these
specification sheets.
3. These specification sheets include materials protected under copyright of EVERLIGHT Corporation. Please don’t
reproduce or cause anyone to reproduce them without EVERLIGHT’s consent.
13
Copyright © 2010, Everlight All Rights Reserved. Release Date :April 22, 2015. Issue No:DPC-0000175 Rev.6
www.everlight.com
Ver.:6 Release Date:05/05/2015 Confidential Level:一般 狀態:Approved(正式發行)
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