X324 [ETC]
X324完美替代LM324四运算放大器IC;X324
LINEAR INTEGRATED CIRCUIT
QUAD OPERATIONAL
AMPLIFIERS
DESCRIPTION
The X324 consists of four independent, high
gain internally frequency compensated operational
amplifiers which were designed specifically to operate
from a single power supply over a wide voltage range.
Operation from split power supplies is also possible
so long as the difference between the two supplies 3
Volts to 32 volts.
Application areas include transducer amplifier, DC
gain blocks and all the conventional OP amp circuits
which now can be easily implemented in single power
supply system.
FEATURES
*Internally frequency compensated for unity gain
*Large DC voltage gain :100dB
ORDERING INFORMATION
Device
X324D
X324E
Package
*Wide operating supply range(Vcc=3V~32V)
*Input common-mode voltage includes ground
*Large output voltage swing: From 0V to Vcc-1.5V
*Power drain suitable for battery operation
DIP-14-300-2.54
SOP-14-225-1.27
BLOCK DIAGRAM
Only one section
Vcc
IN (-)
IN (+)
Output
GND
ABSOLUTE MAXIMUM RATINGS(Ta=25°C)
Characteristic
Symbol
Value
Unit
Supply Voltage
Vcc
18 or 36
32
V
V
Differential input voltage
Input Voltage
Vi(diff)
VI
-0.3~32V
570
V
Power Dissipation
Operating Temperature
Pd
mW
°C
Topr
0 to +70
REV 1.2 2009.10.11
1
X324
LINEAR INTEGRATED CIRCUIT
Storage Temperature
Tstg
-65 to 150
°C
ELECTRICAL CHARACTERISTICS( Ta=25°C )
(Vcc=5.0V,All voltage referenced to GND unless otherwise specified)
Characteristic
Input offset voltage
Symbol
VIO
Test Condition
VCM=0 to Vcc-1.5
Vo(p)=1.4V,Rs=0
Min Typ. Max Unit
1.5
7.0
mV
Input offset current
Input Bias current
Input Common-mode voltage
range
IIO
3.0
40
50
nA
nA
V
Ib
250
VI(R)
Vcc=30V
0
Vcc-
1.5
1.0
0.7
100
Supply Current
Icc
RL=∞,Vcc=30V
Vcc=5V
3
mA
mA
1.2
Large signal Voltage Gain
Output voltage Swing
GV
Vcc=15V,RL>2kΩ
Vo(p)=1V to 11V
Vcc=30V,RL=2kΩ
Vcc=30V,RL=10kΩ
Vcc=5,RL>10kΩ
25
V/mV
V(OH)
26
27
V
28
5
V
V(OL)
CMRR
PSRR
CS
20
mV
dB
dB
mV
mA
mA
Common-mode rejection Ratio
Power supply rejection Ratio
Channel Separation
65
65
75
100
5
f=1kHz to 20kHz
20
60
Short circuit to GND
Isc
40
40
Isource
VI(+)=1V,VI(-)=0
Vcc=15V,Vo(p)=2V
VI(+)=0V,VI(-)=1V
Vcc=15V,Vo(p)=2V
VI(+)=1V,VI(-)=0
20
10
12
Output current
Isink
13
45
mA
µA
V
Vcc=15V,Vo(p)=200V
Differential input voltage
VI(diff)
Vcc
PIN CONFIGURATION
OUT
1
OUT
4
IN 4(-)
IN 4(+)
Vee
1
2
3
4
5
6
7
14
13
12
11
10
9
IN 1(-)
IN 1(+)
VCC
IN 2(+)
IN 2(-)
IN 3(+)
IN 3(-)
OUT
2
8
OUT 3
REV 1.2 2009.10.11
2
X324
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS PERFORMANCE
Fig.2 Input Current
Fig.1 Input Voltage Range
15
100
80
Positive
10
Vcc=+30V
Vcc=+15V
60
40
20
0
Negative
5
0
Vcc=+5V
0
5
10
15
-50
-25
0
25
50
(
75
100
Supply Voltage (±Vdc)
Temperature
)
Fig.3 Supply Current
Vcc
Fig.4 Voltage Gain
40
30
160
Ic
RL=20kΩ
RL=2kΩ
120
80
20
Ta= 0~+85
10
0
40
0
Ta= -40
0
10
20
Supply Voltage (V)
30
40
0
7.5
15
Supply Voltage (V)
22.5
30
Fig.5 Open Loop Frequency response
Fig.6 Common-mode rejection Ratio
120
120
Vcc
100
80
100MΩ
100
80
0.1µF
Vcc=+7.5V
Vee=-7.5V
Vin
Vcc/2
+7.5V
60
40
60
100kΩ
100Ω
40
20
0
100Ω
Vcc=30V
Vcc=15V
Vin
100kΩ
-7.5V
20
0
2
2
0
1
3
4
5
6
7
3
4
5
6
10
10
10
10
10
10
10
10
10
10
10
10
Frequency (Hz)
10
Frequency (Hz)
REV 1.2 2009.10.11
3
X324
LINEAR INTEGRATED CIRCUIT
Fig.8 voltage Follower pulse response
Fig.7
(small signal)
450
3
2
RL=2kΩ
Vcc=15V
400
350
1
0
3
2
300
275
1
0
0
10
20
30
Time (µs)
40
50
0
1
2
3
4
5
6
7
8
9
Time (µs)
Fig.10 Output Characteristics
current sourcing
Fig.9 Large signal Frequency Response
8
7
6
5
Ta=25
15
10
5
+15V
100k
1k
Vcc
Vo
Io
Vcc/2
Vi
+7V
2k
4
3
2
0
1
10-3
103
104
Frequency (Hz)
105
106
10
1
10
102
-2
10
-1
Output Source current (mA)
Fig.12 Current Limiting
Fig.11 Output Characteristics Current sinking
10
1
60
40
Vcc=+5V
Vcc=+15V
Vcc
10-1
Vcc/2
20
0
Vo
Vcc=+30V
Io
-2
10
-1
10
10-3
1
10
102
-50
-25
0
25
50
75
100
Temperature (
)
Output Sink Current (mA)
REV 1.2 2009.10.11
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X324
LINEAR INTEGRATED CIRCUIT
PACKAGE OUTLINE
DIP-14-300-2.54
Unit: mm
2.54
0.3
1.52
0
15 degree
19.55 0.3
0.5MIN
0.46 0.08
2.40MAX
SOP-14-225-1.27
UNIT: mm
REV 1.2 2009.10.11
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X324
LINEAR INTEGRATED CIRCUIT
Attach
Revision History
Data
REV
Description
Page
1.0
Original
Add “CHIP TOPOGRAPHY”
Add “PAD COORDINATES”
Add”SOP-14-225-1.27”
5
5
1
5
2003.10.15
2009.10.11
1.1
1.2
Add”DIP-14-300-2.54 SOP-14-225-1.27”Package out line
REV 1.2 2009.10.11
6
相关型号:
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X332-FREQ
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CONNOR-WINFIE
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