WS1M32-20HSCA [ETC]
1Mx32 SRAM MODULE; 1Mx32 SRAM模块
| 型号： | WS1M32-20HSCA |
| 厂家： | 
ETC |
| 描述： | 1Mx32 SRAM MODULE |
| 文件： | 总8页 (文件大小：147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WS1M32-XXX
White Electronic Designs
1Mx32 SRAM MODULE
FEATURES
■ Access Times of 17, 20, 25ns
■ Commercial, Industrial and Military Temperature
Ranges
■ Packaging
■ TTL Compatible Inputs and Outputs
■ 5 Volt Power Supply
84 lead, 28mm CQFP, (Package 511)
66 pin PGA Type, 1$385" sq$, Hermetic Ce-
ramic HIP
(Package 402)*
■ Low Power CMOS
■ Organized as two banks of 512Kx32, User
■ Built-in Decoupling Caps and Multiple Ground
Configurable as 2Mx16 or 4Mx8
Pins for Low Noise Operation
■ Weight
* Packagetobedevelopedꢀ
WS1M32-XH2X* - 13 grams (typical)
WS1M32-XG3X - 20 grams (typical)
PIN CONFIGURATION FOR WS1M32-XH2X*
TOP VIEW
PIN DESCRIPTION
1
12
23
34
45
56
I/O0-31 DataInputs/Outputs
I/O
I/O
8
9
WE
OE
2
I/O15
I/O14
I/O13
I/O12
I/O24
I/O25
I/O26
V
CC
I/O31
I/O30
I/O29
I/O28
A0-18
WE1-4
CS1-2
OE1-4
VCC
AddressInputs
WriteEnables
ChipSelects
OutputEnable
PowerSupply
Ground
2
OE
4
4
I/O10
GND
I/O11
WE
A
A
A
A
A
13
14
15
16
17
A
6
7
2
8
9
I/O27
GND
NC
A
A
A
V
10
11
12
CC
OE1
A
A
A
3
4
5
3
3
A
A
A
0
1
2
NotConnected
A
18
CS
A
WE
1
A
BLOCK DIAGRAM
I/O
I/O
I/O
I/O
7
A
WE
OE
I/O23
I/O22
I/O21
I/O20
WE
2
WE
3
OE4
WE
OE
1
OE
2
OE
3
4
WE
1
I/O
I/O
I/O
0
1
2
CS
NC
I/O
1
6
I/O16
I/O17
I/O18
CS
1
5
4
GND
I/O19
A
0-18
3
512K x 8
512K x 8
512K x 8
512K x 8
11
22
33
44
55
66
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
CS
2
I/O16-23
I/O24-31
I/O0-7
I/O8-15
NOTE: CS1& CS2 are used as bank select
1
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
July 2002 Revꢀ 4
WS1M32-XXX
White Electronic Designs
PIN CONFIGURATION FOR WS1M32-XG3X
TOP VIEW
PIN DESCRIPTION
I/O0-31 DataInputs/Outputs
A0-18
WE1-4
CS1-2
OE1-4
VCC
AddressInputs
WriteEnables
ChipSelects
OutputEnables
PowerSupply
Ground
11 10
9
8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77
76 75
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
V
CC
GND
NC
NC
NC
NC
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
A6
1
2
3
4
GND
NC
NotConnected
OE
OE
OE
OE
WE4
WE3
WE2
WE1
NC
NC
BLOCK DIAGRAM
NC
WE
2
WE
3
OE4
WE
OE
1
OE
2
OE
3
4
A7
A8
A9
WE
1
A
A
A
A
A
V
18
17
16
15
14
A
A
A
A
10
11
12
13
CS
1
A
0-18
512K x 8
GND
512K x 8
512K x 8
512K x 8
CC
512K x 8
512K x 8
512K x 8
512K x 8
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
8
8
8
8
CS
2
I/O16-23
I/O24-31
I/O0-7
I/O8-15
NOTE: CS1& CS2 are used as bank select
The WEDC 84 lead G3 CQFP fills
the same fit and function as the
JEDEC 84 lead CQFJ or 84
PLCC$ But the G3 has the TCE
and lead inspection advantage of
the CQFP form$
1.146"
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
2
WS1M32-XXX
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
(TA=+25°C)
Parameter
Symbol
TA
Min
-55
-65
-0+5
Max
ꢀ125
ꢀ150
Vccꢀ0+5
150
Unit
°C
°C
V
Parameter
Symbol
COE
Conditions
IN = 0 V, f = 1ꢀ0 MHz 30
IN = 0 V, f = 1ꢀ0 MHz 30
IN = 0 V, f = 1ꢀ0 MHz 30
Max Unit
OperatingTemperature
StorageTemperature
SignalVoltageRelativetoGND
JunctionTemperature
SupplyVoltage
TSTG
VG
OE1-4 capacitance
WE1-4 capacitance
CS1-2 capacitance
Data I/O capacitance
V
V
V
pF
pF
pF
pF
pF
CWE
TJ
°C
V
CCS
VCC
-0+5
7+0
CI/O
V
I/O = 0 V, f = 1ꢀ0 MHz 30
IN = 0 V, f = 1ꢀ0 MHz 75
Address input capacitance CAD
V
RECOMMENDED OPERATING CONDITIONS
This parameter is guaranteed by design but not tested+
Parameter
Symbol
VCC
VIH
Min
4+5
2+2
-0+5
-55
-40
Max
5+5
Unit
V
Supply Voltage
Input High Voltage
Input Low Voltage
OperatingTemp(Mil)
OperatingTemp(Ind+)
VCC ꢀ 0+3
ꢀ0+8
V
VIL
V
TA
ꢀ125
°C
°C
TA
ꢀ85
TRUTH TABLE
CS1
CS2
H
H
H
H
L
OE
X
WE
Mode
Standby
Read
Data I/O
High Z
Power
Standby
Active
Active
Active
Active
Active
Active
H
L
X
H
H
L
L
Data Out
High Z
L
H
X
Out Disable
Write
L
Data In
Data Out
High Z
H
H
H
L
L
H
H
L
Read
L
H
X
Out Disable
Write
L
Data In
L
X
X
Invalid State Invalid State Invalid State
DC CHARACTERISTICS
(VCC = 5$0V, GND = 0V, TA = -55°C to +125°C)
Parameter
Symbol
Conditions
Units
Min
Max
Input Leakage Current
ILI
ILO
VCC = 5+5, VIN = GND to VCC
10
µA
µA
mA
mA
V
Output Leakage Current
Operating Supply Current x 32 Mode
Standby Current
CS = VIH, OE = VIH, VOUT = GND to VCC
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5+5
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5+5
IOL = 8mA, Vcc = 4+5
10
720
120
0+4
ICC x 32
ISB
Output Low Voltage
VOL
VOH
Output High Voltage
IOH = -4+0mA, Vcc = 4+5
2+4
V
NOTE: DC test conditions: VIH = VCC -0+3V, VIL = 0+3V
3
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS1M32-XXX
White Electronic Designs
AC CHARACTERISTICS
(VCC=5$0V,GND=0V,TA=-55°Cto+125°C)
Parameter
Symbol
-17
-20
-25
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
tAA
17
20
25
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
17
20
25
Output Hold from Address Change
Chip Select Access Time
tOH
0
0
0
tACS
tOE
17
10
20
10
25
12
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tCLZ1
tOLZ1
tCHZ1
tOHZ1
2
0
2
0
2
0
12
12
12
12
12
12
1+ This parameter is guaranteed by design but not tested+
AC CHARACTERISTICS
(VCC=5$0V,GND=0V,TA=-55°Cto+125°C)
Parameter
Symbol
-17
-20
-25
Units
Write Cycle
Min
17
15
15
11
15
2
Max
Min
20
15
15
12
15
2
Max
Min
25
17
17
13
17
2
Max
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
tAH
0
0
0
Output Active from End of Write
tOW1
2
3
4
Write Enable to Output in High Z tWHZ1
Data Hold Time tDH
9
11
13
0
0
0
1+ This parameter is guaranteed by design but not tested+
AC TEST CIRCUIT
AC TEST CONDITIONS
IOL
Parameter
Typ
Unit
V
Current Source
InputPulseLevels
VIL = 0, VIH = 3+0
InputRiseandFall
5
ns
V
InputandOutputReferenceLevel
OutputTimingReferenceLevel
1+5
1+5
V
VZ 1.5V
D.U.T.
(Bipolar Supply)
Ceff = 50 pf
NOTES:
VZ is programmable from -2V to ꢀ7V+
IOL & IOH programmable from 0 to 16mA+
Tester Impedance Z0 = 75
+
VZ is typically the midpoint of VOH and VOL+
IOL & IOH are adjusted to simulate a typical resistive load circuit+
IOH
Current Source
ATE tester includes jig capacitance+
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
4
WS1M32-XXX
White Electronic Designs
TIMING WAVEFORM - READ CYCLE
tRC
ADDRESS
CS
tAA
tRC
tCHZ
tACS
tCLZ
ADDRESS
DATA I/O
tAA
OE
tOE
tOLZ
tOH
tOHZ
PREVIOUS DATA VALID
DATA VALID
DATA I/O
DATA VALID
HIGH IMPEDANCE
READ CYCLE 1 (CS = OE = V , WE = V
)
IL IH
READ CYCLE 2 (WE = V
)
IH
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS
WE
tAS
tWP
tOW
tDH
tWHZ
tDW
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
WRITE CYCLE - CS CONTROLLED
tWC
ADDRESS
WS32K32-XHX
tAW
tAH
tAS
tCW
CS
tWP
WE
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
5
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS1M32-XXX
White Electronic Designs
PACKAGE402: 66PIN,PGATYPE,CERAMICHEX-IN-LINEPACKAGE,HIP(H2)
35.2 (1.385) ꢀ.38 (ꢀ.ꢀ15) ꢁS
PIN 1 IDENTIFIER
ꢁSUARE PAD
ON BOTTOM
25.4 (1.ꢀ) TYP
5.7 (ꢀ.223)
MAX
3.81 (ꢀ.15ꢀ)
ꢀ.1 (ꢀ.ꢀꢀ5)
1.27 (ꢀ.ꢀ5ꢀ) ꢀ.1 (ꢀ.ꢀꢀ5)
ꢀ.76 (ꢀ.ꢀ3ꢀ) ꢀ.1 (ꢀ.ꢀꢀ5)
2.54 (ꢀ.1ꢀꢀ)
TYP
1.27 (ꢀ.ꢀ5ꢀ) TYP DIA
15.24 (ꢀ.6ꢀꢀ) TYP
25.4 (1.ꢀ) TYP
ꢀ.46 (ꢀ.ꢀ18) ꢀ.ꢀ5 (ꢀ.ꢀꢀ2) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
6
WS1M32-XXX
White Electronic Designs
PACKAGE 511: 84 LEAD, CERAMIC QUAD FLAT PACK (G3)
30.23 (1.190) ± 0.25 (0.010) SQ
4.29 (0.169)
± 0.28 (0.011)
27.18 (1.070) ± 0.25 (0.010) SQ
4.12 (0.162) ± 0.20 (0.008)
0.25 (0.010)
± 0.03 (0.002)
R 0.127
(0.005) MIN
29.11 (1.146)
± 0.25 (0.010)
0.19 (0.008)
± 0.06 (0.003)
+
1
/ 7
1.02 (0.040)
± 0.12 (0.005)
DETAIL A
SEE DETAIL "A"
0.38 (0.015)
1.27 (0.050) TYP
± 0.05 (0.002)
0.27 (0.011)
± 0.04 (0.001)
25.40 (1.000) TYP
The WEDC 84 lead G3
CQFP fills the same fit
and function as the
JEDEC 84 lead CQFJ or
84 PLCC$ But the G3 has
the TCE and lead inspec-
tion advantage of the
CQFP form$
1.146"
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
7
White Electronic Designs Corporation (602) 437-1520 wwwꢀwhiteedcꢀcom
WS1M32-XXX
White Electronic Designs
ORDERING INFORMATION
W S 1M32 - XX X X X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M = Military Screened
I = Industrial
-55°C to ꢀ125°C
-40°C to ꢀ85°C
0°C to ꢀ70°C
C = Commercial
PACKAGE TYPE:
H2 = Ceramic Hex-In-line Package, HIP (Package 402)*
G3 = 28 mm Ceramic Quad Flatpack, CQFP (Package 511)
ACCESS TIME (ns)
ORGANIZATION, two banks of 512Kx32
User configurable as 2Mx16 or 4Mx8
SRAM
WHITE ELECTRONIC DESIGNS CORPꢀ
* Packagetobedevelopedꢀ
White Electronic Designs Corporation Phoenix AZ (602) 437-1520
8
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