NSL35TT1 [ETC]
TRANSISTOR | BJT | PNP | 35V V(BR)CEO | 1A I(C) | SOT-416 ; 晶体管| BJT | PNP | 35V V( BR ) CEO | 1A I(C ) | SOT- 416\n型号: | NSL35TT1 |
厂家: | ETC |
描述: | TRANSISTOR | BJT | PNP | 35V V(BR)CEO | 1A I(C) | SOT-416
|
文件: | 总8页 (文件大小:70K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NSL35TT1
High Current Surface
Mount PNP Silicon
Low VCE(sat) Transistor
for Battery Operated
Applications
http://onsemi.com
35 VOLTS
1.0 AMPS
PNP TRANSISTOR
MAXIMUM RATINGS (T = 25°C)
A
Rating
Symbol
Max
–35
–50
–5.0
Unit
Vdc
Vdc
Vdc
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
V
CEO
V
CBO
V
EBO
COLLECTOR
3
1
Collector Current – Peak
I
C
–1.0
Adc
BASE
Collector Current – Continuous
–500
mAdc
Electrostatic Discharge
ESD
HBM Class 3B
MM Class C
2
EMITTER
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T = 25°C
A
P
D
(Note 1)
210
mW
3
Derate above 25°C
1.7
mW/°C
°C/W
2
1
Thermal Resistance,
Junction to Ambient
R
(Note 1)
595
θ
JA
CASE 463
SOT–416/SC–75
STYLE 1
Total Device Dissipation
P
(Note 2)
365
mW
D
T = 25°C
A
Derate above 25°C
2.9
mW/°C
°C/W
Thermal Resistance,
Junction to Ambient
R
(Note 2)
340
θ
JA
DEVICE MARKING
Thermal Resistance,
Junction to Lead #3
R
205
°C/W
°C
θ
JL
Junction and Storage
Temperature Range
T , T
J
–55 to
+150
stg
L1
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 X 1.0 inch Pad
L1 = Specific Device Code
ORDERING INFORMATION
Device
NSL35TT1
Package
Shipping
3000/Tape & Reel
SOT–416
Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
February, 2002 – Rev. 2
NSL35TT1/D
NSL35TT1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typical
Max
Unit
Collector–Emitter Breakdown Voltage
V
Vdc
Vdc
(BR)CEO
(BR)CBO
(BR)EBO
(I = –10 mAdc, I = 0)
–35
–50
–5.0
–
–45
–65
–
–
C
B
Collector–Base Breakdown Voltage
(I = –0.1 mAdc, I = 0)
V
V
C
E
Emitter–Base Breakdown Voltage
(I = –0.1 mAdc, I = 0)
Vdc
–7.0
–
E
C
Collector Cutoff Current
(V = –35 Vdc, I = 0)
I
mAdc
mAdc
mAdc
CBO
–0.03
–0.03
–0.01
–0.1
–0.1
–0.1
CB
E
Collector–Emitter Cutoff Current
(V = –30 Vdc)
I
CES
–
CES
Emitter Cutoff Current
(V = –4.0 Vdc)
EB
I
EBO
–
ON CHARACTERISTICS
DC Current Gain (Note 3)
h
FE
(I = –100 mA, V = –1.0 V)
100
100
100
180
180
150
–
–
–
C
CE
(I = –100 mA, V = –2.0 V)
C
CE
(I = –250 mA, V = –2.0 V)
C
CE
Collector–Emitter Saturation Voltage (Note 3)
(I = –50 mA, I = –0.5 mA)
V
V
CE(sat)
–
–
–
–
–
–0.090
–0.200
–0.320
–0.170
–0.270
–0.130
–0.350
–0.450
–
C
B
(I = –100 mA, I = –1.0 mA)
C
B
(I = –250 mA, I = –2.5 mA)
C
B
(I = –250 mA, I = –5.0 mA)
C
B
(I = –500 mA, I = –50 mA)
–0.350
C
B
Base–Emitter Saturation Voltage (Note 3)
(I = –150 mA, I = –20 mA)
V
V
V
BE(sat)
–
–
–
–
–
–
–0.81
–0.81
45
–0.9
C
B
Base–Emitter Turn–on Voltage (Note 3)
V
BE(on)
(I = –150 mA, V = –3.0 V)
–0.875
C
CE
Input Capacitance
(V = 0 V, f = 1.0 MHz)
EB
C
pF
pF
ns
ns
ibo
obo
on
–
–
–
–
Output Capacitance
(V = 0 V, f = 1.0 MHz)
CB
C
t
18
Turn–On Time
(I = –50 mA, I = –500 mA, R = 3.0 Ω)
40
BI
C
L
Turn–Off Time
t
off
(I = I = –50 mA, I = –500 mA, R = 3.0 Ω)
70
B1
B2
C
L
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
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2
NSL35TT1
1
0.1
1
I /I = 100
C
B
25°C
100
I /I = 200
C
B
T = –55°C
A
125°C
0.1
10
50
0.01
0.001
T = 25°C
A
0.01
0.001
0.01
0.1
1
0.001
0.01
0.1
1
1
1
I , COLLECTOR CURRENT (AMPS)
I , COLLECTOR CURRENT (AMPS)
C
C
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 2. Collector Emitter Saturation Voltage
vs. Collector Current
500
400
300
200
1
I /I = 50
C
125°C
25°C
B
T = –55°C
A
0.1
25°C
T = –55°C
A
125°C
100
0
V
CE
= 5 V
0.01
0.001
0.001
0.01
0.1
1
0.01
0.1
I , COLLECTOR CURRENT (AMPS)
I , COLLECTOR CURRENT (AMPS)
C
C
Figure 3. DC Current Gain
Figure 4. Collector Emitter Saturation Voltage
vs. Collector Current
1
1.2
1
T = 25°C
A
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
–55°C
25°C
I
C
= 1.0 A
0.8
0.6
0.4
T = 125°C
A
50 mA
5.0 mA
500 mA
250 mA
100 mA
0.2
0
0.1
0
10 mA
0.00001 0.0001
0.001
0.01
0.1
1
0.001
0.01
0.1
I , BASE CURRENT (AMPS)
B
I , COLLECTOR CURRENT (AMPS)
C
Figure 5. Collector Emitter Saturation Voltage
vs. Base Current
Figure 6. Base Emitter Saturation Voltage vs.
Collector Current
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3
NSL35TT1
1.2
50
f = 1 MHz
= 0 A
T = 25°C
A
V
CE
= 3.0 V
45
40
35
30
25
20
15
10
5
I
C
1
0.8
0.6
0.4
0.2
0
–55°C
25°C
T = 125°C
A
0
0.001
0.01
0.1
1
0
1
2
3
4
5
6
I , COLLECTOR CURRENT (AMPS)
C
V
EB
, EMITTER BASE VOLTAGE (V)
Figure 7. Base Emitter Turn–On Voltage vs.
Collector Current
Figure 8. Input Capacitance
20
18
16
14
12
10
8
f = 1 MHz
= 0 A
T = 25°C
A
I
E
6
4
2
0
0
5
10
15
20
25
30
35
40
V
CB
, COLLECTOR BASE VOLTAGE (V)
Figure 9. Output Capacitance
1
D = 0.50
D = 0.20
P
(pk)
D = 0.10
D = 0.05
0.1
t
1
t
2
D = 0.01
DUTY CYCLE, D = t /t
1
2
Copper Area = 0.048 square inches
= 505.7 °C/W
SINGLE PULSE
R
θ
JA
0.01
0.0001
0.001
0.01
0.1
t , TIME (s)
1
10
100
1000
1
Figure 10. Normalized Thermal Response
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4
NSL35TT1
INFORMATION FOR USING THE SOT–416 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.5 min. (3x)
TYPICAL
SOLDERING PATTERN
Unit: mm
1.4
SOT–416/SC–90 POWER DISSIPATION
The power dissipation of the SOT–416/SC–90 is a func-
tion of the pad size. This can vary from the minimum pad
size for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device
the equation for an ambient temperature T of 25°C, one
can calculate the power dissipation of the device which in
this case is 125 milliwatts.
A
150°C – 25°C
833°C/W
is determined by T
perature of the die, Rθ , the thermal resistance from the
, the maximum rated junction tem-
J(max)
PD =
= 150 milliwatts
JA
device junction to ambient; and the operating temperature,
The 833°C/W assumes the use of the recommended foot-
print on a glass epoxy printed circuit board to achieve a
power dissipation of 150 milliwatts. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad . Using a board material such
as Thermal Clad, a higher power dissipation can be
achieved using the same footprint.
T . Using the values provided on the data sheet, P can be
A
D
calculated as follows.
TJ(max) – TA
Rθ
PD =
JA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied dur-
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
ing cooling
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
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5
NSL35TT1
SOLDER STENCIL GUIDELINES
Prior to placing surface mount components onto a printed
The stencil opening size for the surface mounted package
should be the same as the pad size on the printed circuit
board, i.e., a 1:1 registration.
circuit board, solder paste must be applied to the pads. A
solder stencil is required to screen the optimum amount of
solder paste onto the footprint. The stencil is made of brass
or stainless steel with a typical thickness of 0.008 inches.
TYPICAL SOLDER HEATING PROFILE
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones,
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 11 shows a typical heating
profile for use when soldering a surface mount device to a
printed circuit board. This profile will vary among
soldering systems but it is a good starting point. Factors that
can affect the profile include the type of soldering system
in use, density and types of components on the board, type
of solder used, and the type of board or substrate material
being used. This profile shows temperature versus time.
The line on the graph shows the actual temperature that
might be experienced on the surface of a test board at or
near a central solder joint. The two profiles are based on a
high density and a low density board. The Vitronics
SMD310 convection/infrared reflow soldering system was
used to generate this profile. The type of solder used was
62/36/2 Tin Lead Silver with a melting point between
177–189°C. When this type of furnace is used for solder
reflow work, the circuit boards and solder joints tend to
heat first. The components on the board are then heated by
conduction. The circuit board, because it has a large surface
area, absorbs the thermal energy more efficiently, then
distributes this energy to the components. Because of this
effect, the main body of a component may be up to 30
degrees cooler than the adjacent solder joints.
STEP 5
HEATING
ZONES 4 & 7
SPIKE"
STEP 6 STEP 7
VENT COOLING
STEP 1
PREHEAT
ZONE 1
RAMP"
STEP 2
VENT
STEP 3
HEATING
STEP 4
HEATING
ZONES 3 & 6
SOAK"
SOAK" ZONES 2 & 5
RAMP"
205° TO 219°C
PEAK AT
SOLDER JOINT
200°C
150°C
170°C
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
160°C
150°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
140°C
100°C
MASS OF ASSEMBLY)
100°C
50°C
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
TIME (3 TO 7 MINUTES TOTAL)
T
MAX
Figure 11. Typical Solder Heating Profile
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6
NSL35TT1
PACKAGE DIMENSIONS
SC–75/SOT–416
CASE 463–01
ISSUE B
–A–
S
NOTES:
2
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3
G
–B–
MILLIMETERS
INCHES
1
DIM MIN
MAX
0.80
1.80
0.90
0.30
MIN
MAX
0.031
0.071
0.035
0.012
D 3 PL
0.20 (0.008)
A
B
C
D
G
H
J
0.70
1.40
0.60
0.15
0.028
0.055
0.024
0.006
M
B
0.20 (0.008) A
K
1.00 BSC
0.039 BSC
---
0.10
1.45
0.10
0.10
0.25
1.75
0.20
---
0.004
0.057
0.004
0.004
0.010
0.069
0.008
K
L
J
C
S
0.50 BSC
0.020 BSC
STYLE 1:
L
PIN 1. BASE
2. EMITTER
3. COLLECTOR
H
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7
NSL35TT1
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
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Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
NSL35TT1/D
相关型号:
NSL35TT1/D
High Current Surface Mount PNP Silicon Switching Transistor for Load Management in Portable Applications
ETC
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