MP1015EM [ETC]

Full System Precision CCFL Driver; 全系统精度CCFL驱动器


型号：	MP1015EM
厂家：	ETC
描述：	Full System Precision CCFL Driver 全系统精度CCFL驱动器驱动器
文件：	总8页 (文件大小：493K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

General Description

Features

The MP1015 is a Power IC that offers a true

complete solution for driving a Cold Cathode

ꢀ

Built-in Burst Mode Oscillator and Modulator

Built-in Analog and Burst Mode Dimming

Built-in Current and Voltage Feedback Control

Built-in Open/Short Lamp Protection

Built-in Dual Mode Fault Timer

Fluorescent Lamps (CCFL).

This Power IC

converts unregulated DC voltage to a nearly pure

sine wave required to ignite and operate the CCFL.

Based on proprietary power topology and control

techniques (patented), it greatly increases the

power conversion efficiency. The MP1015 can be

used with analog or burst mode dimming without

any additional external components. The MP1015

offers four distinct performance advantages:

Built-in Soft-on/Soft-off Burst Mode

Automatic Recovery from ESD Event

Wide Range 6 to 22V Battery Voltage with

Regulated Lamp Current

ꢀ

Startup at all voltages and temp without

additional components

ꢀ

Integrated 0.10Ω Power Switches

Output Short Circuit Protected

1. More light for less power

2. Smallest board implementation possible

3. Low EMI emission

No High Voltage Ballast Capacitor

Evaluation Board Available

4. Low cost off the shelf components

Ordering Information

Applications

ꢀ

LCD Backlight inverter for notebook computers,

Web Pads, GPS, or desktop display

Package

TSSOP20

TSSOP20F

Temperature

-20°C to +85°C

Part Number∗

MP1015EM

MP1015EF

EV0001

MP1015EM Evaluation Board

∗ For Tape & Reel use suffix - Z (e.g. MP1015EM-Z)

Figure 1: Typical Circuit for PWM or Analog Mode Operation (includes all protection requirements)

Cisb

Risb

CbaR

Cref

Cft

Ccomp

Cs2

Cs1

Csfb

Rsfb

Rlfb

CbtR

Rdamp

Rbosc

Lamp

MP 1015

CbtL

ABrt

DBrt

Cdrv

CbaL

Cbosc

Rdbr

Rbleed

Cdbr

Gnd

Cba

Batt

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Absolute Maximum Ratings

Recommended Operating Conditions

Input Voltage (V_Batt

)

25V

+/-6V

Input Voltage (V_Batt

)

6 to 22V

0 to 1.9V

IL, ISFB Input Voltages (V_IL, V_ISFB

)

Analog Brightness Voltage (V_ABrt)

VLFB Input Voltage (V_VLFB

Logic Input Voltages

Power Dissipation

)

-0.3 to 12V

-0.3 to 6.8V

1.0W

Digital Brightness Voltage (V_DBrt

)

0 to 1.8V

Enable (V_En)

0 to 5V

Operating Frequency (Typical)

60KHz

Operating Frequency

Junction Temperature

150KHz

Ambient Operating Temperature

-20°C to +85°C

150°C

Thermal Characteristics

Lead Temperature (Solder)

Storage Temperature

260°C

Thermal resistance θ_JA(TSSOP)

Thermal resistance θ_JA(TSSOPF)

140°C/W

110°C/W

–55°C to 150°C

Electrical Characteristics (Unless otherwise specified V_Batt=12V, T_A=25°C)

Parameters

Symbol

Condition

Min

Typ Max Units

Reference Voltage

Output Voltage

Reference Current

Line Regulation

Load Regulation

V_Ref

I_Ref

I_Ref= 3mA

4.75

5.0

5.25

3.0

6.5V < V_Batt< 22V

0 < I_Ref< 3.0mA

Battery Supply

Supply Current (disabled)

I_Batt

µA

Supply Current (enabled)

6.0V < V_Batt< 22V

1.6

2.5

Shutdown Logic

Fault Timer Threshold

Fault Timer Sink Current

Fault Timer Source Current

Open Lamp

V_(TH)FT

1.1

2.0

1.2

1.3

V_VLFB>0, V_ISFB<1.2V

µA

V_VLFB<0, V_ISFB<1.2V

V_ISFB>1.2V

µA

Secondary Overload

Enable Voltage Low

Enable Voltage High

120

V_(L)En

V_(H)En

0.5

Output Drivers

Switch On Resistance

Short Circuit Current

Ton(min)

R_{(ON)OutL,OutR}

I_SC

(Note 1)

0.085 0.12

0.15

550

Ω

V_Comp=0V, V_Batt=22V

V_Comp=0V, V_Batt=6V

435

Ton(min)

1750 2100

Brightness Control

Sense full Brightness

V_IL

V_ABrt= 2.0V

V_ABrt= 0V

360

105

379

117

400

130

Sense full Dim

Lamp Current regulation

Burst Oscillator Sink Current

Burst Oscillator Peak Voltage

7V < V_Batt< 22V

I_Bosc

V_Bosc

380

1.8

µA

1.7

-50

1.9

Digital Brightness Offset Voltage V_{(OS) DBrt}

Fault Loop Control

Open Lamp Threshold

V_(TH)VLFB

V_(TH)ISFB

I_Comp

µA

Secondary Current Threshold

Fault Mode Comp Current

1.2

475

V_VLFB<0V, V_ISFB>1.2V

Note 1: This parameter is guaranteed by design.

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Pin Description

ABrt

20 AGnd

19 ISFB

18 VLFB

17 FT

Bosc

DBrt

16 Comp

15 Ref

Drv

Batt

OutL

PGnd

14 Batt

13 OutR

12 PGnd

11 BtR

BtL 10

Table 1: Pin Designators

Pin Number

Pin Name

ABrt

Bosc

DBrt

Pin Function

Analog Dimming

Lamp Current Feedback Sense Input

Burst Oscillator Timing

Burst Mode Dimming

Chip Enable. Do not float this pin.

Internally Generated MOSFET Gate Drive Supply Voltage (6V)

Power Supply Input

Output to Load (tank circuit)

Power Ground

Regulated Output Voltage for Bootstrap Capacitor on Phase L

Regulated Output Voltage for Bootstrap Capacitor on Phase R

Power Ground

Output to Load (tank circuit)

Power Supply Input

Internally Generated Reference Voltage Output (5V)

Loop Compensation Capacitor

Fault Timer

Open Lamp Detect (Lamp Voltage Feedback.)

Shorted Lamp Detect (Secondary Current Feedback)

Small Signal Ground (Note 1)

Drv

Batt

OutL

PGnd

BtL

BtR

PGnd

OutR

Batt

Ref

Comp

VLFB

ISFB

AGnd

Note 1: For the MP1015EF, connect the exposed paddle to AGND (Pin 20).

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Figure 2: Functional Block Diagram

Batt

Ref 5V

OutL

OutR

Drv 6V

Ref 5V

Internal

Comp

Regulators

ABrt

2.5V

MUX

75mV

Control

Logic

ISFB

TSD

1.2V

DBrt

VLFB

Bosc

Feature Description

Brightness Control

Fault Protection

The MP1015 can operate in three modes: Analog

Mode, Burst Mode with a DC input, or Burst Mode

with an external PWM. The three modes are

dependent on the pin connections as per Table 1.

Choosing the required burst repetition frequency

can be achieved by an RC combination, as defined

in component selection. The MP1015 has a soft on

and soft off feature to reduce noise, when using

burst mode dimming.

Open Lamp: The VLFB pin (#18) is used to detect

whether an open lamp condition has occurred.

During normal operation the VLFB pin is typically at

5V DC with an AC swing of +/- 2V. If an open lamp

condition exists then the AC voltage on the VLFB

line will swing below zero volts. When that occurs,

the IC regulates the VLFB voltage to 10V p-p and a

1µA current source will inject into the FT pin. If the

voltage at the FT pin exceeds 1.2V, then the chip

will shut down.

Table 2: Function Mode

Function

Pin Connection

Excessive Secondary Current (Shorted Lamp and

UL safety specs): The ISFB pin (#19) is used to

detect whether excessive secondary current has

occurred. During normal operation the ISFB voltage

is a 1V p-p AC signal centered at zero volts D.C. If

Pin 1

Pin 4

DBrt

V_Ref

Pin 3

Bosc

AGnd

Rbosc

Cbosc

ABrt

Analog Mode

0 – 1.9V

Burst Mode with

DC input voltage

Burst Mode from

external source

V_Ref

0 – 1.8V

fault condition occurs that increases the

secondary current, then the voltage at ISFB will be

greater than 1.2V. When that occurs, the IC

regulates the ISFB voltage to 2.4V p-p and a 120µA

current source will inject into the FT pin. If the

voltage at the FT pin exceeds 1.2V, then the chip

will shut down.

V_Ref

PWM

1.5V

Brightness Polarity:

Burst: 100% duty cycle is at 1.8V

Analog: 1.9V is maximum brightness

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Feature Description (continued)

Fault Timer: The timing for the fault timer will

depend on the sourcing current, as described

above, and the capacitor on the FT pin. The user

can program the time for the voltage to rise before

the chip detects a “real“ fault. When a fault is

triggered, then the internal drive voltage (V_Drv) will

collapse from 6.2V to 0V. The reference voltage will

stay high at 5.0V.

Customer to achieve the required open lamp

voltage detection value, typically 4nF.

Cs2=Cs1 * V(max)rms/ 3.5Vrms)

The value of Rs is typically 300KΩ (not critical).

Pin 17 (FT): Cft

The Cft cap is used to set the fault timer. This

capacitor will determine when the chip will reach

the fault threshold value. The user can choose the

cap value to set the time out value.

Lamp Startup

The strike voltage of the lamp will always be

guaranteed at any temperature because the

MP1015 uses a resonant topology for switching the

outputs. The device will continue to switch at the

resonant frequency of the tank until the strike

voltage is achieved. This eliminates the need for

external ramp timing circuits to ensure startup.

Open Lamp Time

Cft (nF) = T(open lamp) (1µA)/ 1.2 V

For a Cft= 820nF, then the time out for open lamp

will be 0.98 sec.

Secondary Short Turn Off time

Chip Enable

Because the sourcing current for a secondary short

is approx. 120µA, then the off time when a resistive

short occurs across the lamp will be approx 100

times faster than the open lamp time.

The chip has an on / off function, which is

controlled by the En pin (#5). The enable signal

goes directly to a Schmitt trigger. The chip will turn

ON with an En = High and OFF with an En = Low.

To reduce the turn off time even further, then by

modifying the connection at the FT node to:

Application Information

100K

Pin 19 (ISFB) : Rsfb, Csfb , Risb and Cisb

Cft

(Secondary Short Protection)

10nf

The Rsfb and Csfb combination is used for

feedback to the IS pin to detect excessive

secondary current. These resistors have to be +/-

5% tolerance components. The value for Rsfb is

approximately 1.7KΩ and Csfb is approximately

82nF. This will ensure that the voltage at the ISFB

pin is typically 1.0V during steady state operation.

The maximum value for Csfb is 93nF to ensure that

the chip will meet the UL1950 specification. Risb

and Cisb components are used as a high pass

filter.

Figure 3: Turn Off Time Adjustment

For a Cap=10nF, then the time out for secondary

short will be 0.11ms. The turn off time for the

secondary short will be reduced by an additional

100 times.

Note: The open lamp time will remain the same

value as defined by Cft.

Pin 16 (Comp): Ccomp

Pin 18 (VLFB): Cs1, Cs2 and Rs

(Open Lamp protection)

The regulated open lamp voltage is proportional to

the Cs1 and Cs2 ratio. Cs1 has to be rated at 3KV

and is typically between 5 to 22pF. The value of

Cs1 is typically 15pF and is chosen for a specified

maximum frequency. The value of Cs2 is set by the

This cap is the system compensation cap that

connects between comp and AGnd. A 1.5nf or

2.2nF cap is recommended. This cap should be

X7R ceramic with a voltage rating sufficient for 5V

biasing. The value of Ccomp affects the soft-on rise

time

and

soft-off

fall

time.

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Application Information (Continued)

Pin 15 (Cref):

Pin 4 (DBrt) : Rdbr, Cdbr

Cref is the bypass cap for the internal 5.0V supply.

This capacitor must be placed as close as possible

to the pin. A maximum of 100 mils is recommended

between the cap and the IC. The value of the cap

is typically 0.47µF

This pin is used for burst brightness control. The

DC voltage on this pin will control the burst

percentage on the output. The signal is filtered for

optimal

operation.

The

active

range

approximately 0.1V to 1.8V. The value of Rdbr and

Cdbr is not critical.

Pin 14, Pin 7 & Pin 9 (Batt & PGnd): CbaR/L, Cba

Pin 3 (Bosc): Cbosc, Rbosc

These caps are used as the bypass caps for the

battery voltage supply line. These capacitors will

absorb most of the input switching current of the

inverter and will require adequate ripple rating. The

typical current rating for Cba is > 500mArms.

Typically CbaR and CbaL are 1µF and Cba is equal

to 2 caps of 2.2µF.

The Cbosc and Rbosc will set the burst repetition

rate and the minimum Ton. Set T_minto achieve the

minimum required system brightness. Ensure that

T_minis long enough that the lamp does not

extinguish. These values are determined by the

following steps:

1) Select a Minimum Duty Cycle (D_MIN). This is the

ratio T_FALL/ (T_FALL+ T_RISE) for the burst oscillator.

For example: 10%

Pin 13 & Pin 8 (OutL & OutR): Cp1, Rdamp,

Rbleed

The primary transformer current flows through this

capacitor. Its value is typically 1µF and its voltage

rating is sufficient for a 5V bias. The capacitor

should be ceramic and have a ripple current rating

greater than the primary current (typically 0.8Arms).

It is more optimal to use two parallel 0.47µF

ceramic caps for minimal ESR losses.

2) Determine Rbosc by the formula:

1.68 * [(1 / D_MIN) – 1]

0.42

+ 4

Rbosc =

350 * 10

^-6

Rdamp and Rbleed are used to ensure that the

bridge outputs are at 0V prior to startup. Typically

Rbleed = 4.3KΩ and Rdamp = 1KΩ.

3) Select a burst frequency and find T_TOTALwhere

T_TOTAL= 1/burst frequency. Then determine Cbosc

by the formula:

Pin 11 and Pin 10 (BtL and BtR): Cbtl and Cbtr

(1-D_MIN

)

Cbosc =

These are the reservoir caps for the upper

switches’ gate drive. They should be 10nF and

made of X7R ceramic material and have a voltage

rating for 6.6V

0.42 * Rbosc * f_bosc

Where:

f_bosc= burst frequency rate in Hz

T_min= Minimum burst time in sec

biasing.

Pin 6 (Drv): Cdrv

This bypasses the 6.2V gate supply for the lower

switches. The value should be 100nF ceramic Y5V

or X7R material.

Pin 5: (En)

This pin will enable and disable the chip. Do not

float this pin.

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Figure 4: Open_Lamp Voltage Setup and UL Test Protection Application Information

MP1015 Rev 2.7_03/25/03

www.monolithicpower.com

MP1015

Full System

Precision CCFL Driver

Monolithic Power Systems

Figure 5: Burst Oscillator Waveform versus Output Lamp Current

Packaging Information

TSSOP20 or TSSOP20F (Exposed Paddle **)

0.0256(0.650)TYP

0.004(0.090)

0.010(0.250)

GATE PLANE

0.150(3.80)

0.165(4.19)

PIN 1

IDENT.

0.004(0.090)

0.169

0.177

0.244

0.260

0^o-8^o

0.105 (2.67)

0.118 (3.00)

0.018(0.450)

0.030(0.750)

DETAIL "A"

(4.300)

(4.500)

(6.200)

(6.600)

0.030(0.750)

0.039(1.000)REF

SEE DETAIL "B"

0.030(0.750)

** EXPOSED PADDLE VERSION ONLY

SEE DETAIL "A"

0.252 (6.400)

0.260 (6.600)

0.075(0.190)

0.012(0.300)

0.032(0.800)

0.041(1.050)

0.033(0.850)

0.047(1.200)

SEATING PLANE

0.004(0.090)

0.008(0.200)

0.004(0.090)

0.006(0.160)

0.007(0.190)

0.012(0.300)

0.002(0.050)

0.006(0.150)

0.007(0.190)

0.010(0.250)

NOTE:

1) Control dimension is in inches. Dimension in bracket is millimeters.

DETAIL "B"

NOTICE: MPS believes the information in this document to be accurate and reliable. However, it is subject to change

without notice. Please contact the factory for current specifications. No responsibility is assumed by MPS for its use or fit

to any application, nor for infringement of patent or other rights of third parties.

MP1015 Rev 2.7

03/25/03

Monolithic Power Systems, Inc.

983 University Ave, Building D, Los Gatos, CA 95032 USA

Tel: 408-395-2802 ♦ Fax: 408-395-2812 ♦ Web: www.monolithicpower.com

MP1015EM [ETC]

相关型号：

MP101INS

MP101M

MP101SLV

MP101SM

MP101TW

MP102

MP102

MP102

MP1021

MP102101

MP102102

MP102103