MK9A35P [ETC]
液晶驱动控制芯片.,具有189个点. ;
ETC 
MK9A35P User’s Manual
1. Product Overview
1.1 Feature
ROM size: 3.5K * 16 bits
RAM size: 96 * 8 bits
Stack: 8 layers
LCD Driver: 7com * 27seg
- Duty: 1/4,1/5,1/6 ,1/7 can be selected by register
- COM5~7 can be selected as I/O Port.
I/O port: 20 bi-direction I/O port, 1 input port.
System Clock: Dual clock operation
-Low speed -> External 32KHz crystal, external R oscillator or internal 32Khz RC oscillator,
-High speed -> External 4MHz crystal, external R oscillator or 500KHz internal RC oscillator by
configuration option
Timer: there are several timers:
- Two 8 bit timer/capture with latch for general and capture function which can cascade to one 16 bit
timer/capture.
- One 8 bit general purpose timer – TM0
- One 16 bit pre-divider
- Watchdog timer
Built-in one RFC channel
Hardware key scan function.
One external interrupt pin which can be set to pull-up, pull-down or high-Z
Built-in two capture input
Built-in EL driver circuit
Built-in programmable FREQ, Tone & REM output.
Built-in Low Voltage Reset (LVR)
Built-in Low Battery Detect
Built-in fast reset circuit
I/O port can be set to pull-up, pull-down or open-drain.
HALT and SLEEP operation mode
Fast instruction cycle time: 61us@32KHz operating
Low power consumption: 3uA (@ 32KHz ON, Halt mode , LCD on, No load )
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1.2 Block Diagram
CPU
CORE
ROM
3.5K x 16 bit
RESET/PA[7]
RESET
OSC
OSCIN
OSCOUT
XIN
RAM
96 Bytes
XOUT
COM1~7
SEG1~27
LCD Driver
7c x 27 s
PA[0~7]
Interrrupt
VDD1
VDD
Clock &
Timer
VDD3
Power
Controller
CUP1~2
GND
CAP
RFC
counter
RREF
SEN0
SEN1
ELP
ELC
EL Driver
Watchdog
Timer
BZP
Melody
Generator
BZM
REM
CAPT1A
CAPT1B
Capture
PA[0~7]
PC[0~4]
PD[0~7]
I/O Port
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1.3 Pin Assignment
No
Name
No
Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
COM7/PC[0]
COM6/PC[1]
COM5/PC[2]
COM4
26
27
28
29
30
31
32
33
34
35
36
37
SEG19
SEG20/PD[0]
SEG21/PD[1]
SEG22/PD[2]
SEG23/PD[3]
SEG24/PD[4]
SEG25/PD[5]+INT
SEG26/PD[6]/ELP
SEG27/PD[7]/ELC
PA[0]/CAP
COM3
COM2
COM1
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
PA[1]/RREF
PA[2]/SEN0
38 PA[3]+CAPT1A/SEN1/REM/PWM1
39
40
41
42
43
44
45
46
47
48
49
50
PA[4]/BZ/PWM2
PA[5]/OSCOUT/BZM
OSCIN /PA[6]+CAPT1B
RESETB/PA[7]
XIN/PC[4]
XOUT/PC[3]
GND
VDD1
VDD
VDD3
CUP1/VLCD2
CUP2/VLCD1
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1.4 Pin Description
Description
Pin name
I/O
1. Input port with pull up, pull down or pin wake up
2. Output port (Normal output, P open drain or N open drain)
3. CAP input
PA[0]/CAP
I,I/O
1. Input port with pull up, pull down or pin wake up
2. Output port (Normal output, P open drain or N open drain)
3. REF output
1. Input port with pull up, pull down or pin wake up
2. Output port (Normal output, P open drain or N open drain)
3. SEN0 output
PA[1]/REF
I,I/O
I,I/O
PA[2]/SEN0
1. Input port with pull up, pull down or pin wake up
2. Output port (Normal output, P open drain or N open drain)
3. CAPT1A input
4. REM output
5. PWM1 output
PA[3]+CAPT1A/SEN1/
REM/PWM1
I,I/O
6. SEN1 output
1. Input port with pull up, pull down or pin wake up
2. Output port (Normal output, P open drain or N open drain)
3. BZM output
PA[4]/BZ
I,I/O
I,I/O
1. Crystal out
OSCOUT/PA[5]/BZM
2. I/O port (pull-high, pull-down, open-drain, pin wake up)
3. BZM output
1. Crystal in
2. External RC input
3. I/O port (pull-high, pull-down, open-drain, pin wake up)
4. CAPT1B input
1.System reset input ( with pull-high )
2. Input port (pull-high, pull-low)
3. Wake -up on pin change
1. Crystal input (32K)
2. External RC input
3. Input port with pull-down
OSCIN/PA[6]+CAPT1B
RESETB/PA[7]
XIN/PC[4]
O,I/O
I,I
I,O
4. PC output port (Normal output or PMOS open-drain)
1. Crystal out
XOUT/PC[3]
O,O
2. Input port with pull-down
3. PC output port (Normal output or PMOS open-drain)
GND
VDD1,3
VDD2
P
P
P
System Ground
LCD power supply
System power supply
1. Voltage step up capacitor
2. VLCD2 voltage input (RIN mode & REX mode)
1. Voltage step up capacitor
CUP1/VLCD2
P
CUP2/VLCD1
COM1~4
P
2. VLCD1 voltage input (RIN mode & REX mode)
O
LCD COM output
1. LCD COM output
2. Input port (pull-down)
3. PC output port (Normal output or PMOS open-drain)
4. KI input
1. LCD COM output
2. Input port (pull-down)
COM7/PC[0]
COM6/PC[1]
O,I
O,I
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3. PC output port (Normal output or PMOS open-drain)
4. KI input
1. LCD COM output
COM5/PC[2]
SEG1~19
O,I
O, O
O,O
2. Input port (pull-down)
3. PC output port (Normal output or PMOS open-drain)
LCD segment output
1. LCD segment output
SEG20/PD[0]
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
1. LCD segment output
SEG21/PD[1]
SEG22/PD[2]
O,O
O,O
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
1. LCD segment output
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
1. LCD segment output
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
4. KI input
SEG23/PD[3]
SEG24/PD[4]
O,O
O,O
O,O
O,O
O,O
1. LCD segment output
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
4. KI input
1. LCD segment output
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
4. Pin interrupt
SEG25/PD[5]
1. LCD segment output
2. PD input port with pull-down
3. PD output port (Normal output or PMOS open-drain)
4. ELP output
SEG26/PD[6]/ELP
SEG27/PD[7]/ELC
1. LCD segment output
2. PD input port with pull-down.
3. PD output port (Normal output or PMOS open-drain)
4. ELC output
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