LUCL8560CAU-D_技术文档

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Features

Description

■ Full-feature set for central office applications

The L8560 full-feature, low-power subscriber line

interface circuit (SLIC) is optimized for low power

consumption while providing an extensive set of fea-

tures. This part is ideal for ISDN terminal adapter

applications and short-loop, power-sensitive applica-

■ Also ideal for ISDN terminal adapters, pair gain,

and cable telephony applications

■ Auxiliary input for second battery, and internal

switch to enable its use to save power in short tele-

phone loops

tions such as pair gain and cable telephony. This part

is also designed for PBX, DLC, or CO applications.

■ 5 V only operation or optional ±5 V operation for

reduced power consumption

The SLIC includes an auxiliary battery input and a

battery switch. In short-loop applications, SLICs can

be used in high battery to present a high on-hook

voltage, and then switched to low battery to reduce

off-hook power.

■ Low active power (85 mW typical) and scan power

(61 mW typical) with 5 V only operation

■ Low active power (68 mW typical with auxiliary bat-

tery) and scan power (45 mW typical) with ±5 V

operation

To help minimize the required auxiliary battery volt-

age, the dc feed resistance and overhead voltage are

set at 55 Ω and 6.7 V, respectively. This allows an

undistorted on-hook transmission of a 3.14 dBm sig-

nal into a 900 Ω loop impedance.

■ Quiet tip/ring polarity reversal

■ Per-line ringing available for short loops

■ Reduced overhead and increased current limit dur-

ing ring mode for lower-battery operation or

increased ring loop length

The device offers the reverse battery function. Using

the reverse battery, the device can provide a bal-

anced power ring signal to tip and ring. In this

mode of operation, the battery switch is used to

apply a high-voltage battery during ringing and a

lower-voltage battery during the talk and idle states.

Also included in the L8560 is a dc current-limit

switch, which increases the dc current limit during

power ringing. In addition, dc overhead voltage is

reduced during the ring state. With the battery and

current-limit switches, and overhead reduction, the

L8560 can provide sufficient power to ring a true

North American 5 REN load of 1386 Ω + 40 µF.

■ Supports meter pulse injection

■ Distortion-free full duplex from 0 mA dc loop cur-

rent on-hook transmission

■ Convenient operating states:

— Forward powerup

— Polarity reversal powerup

— Forward sleep

— Ground start

— Disconnect

■ Adjustable supervision functions:

— Off-hook detector with longitudinal rejection

— Ground key detector with longitudinal rejection

— Ring trip detector

The device offers ring trip and loop closure supervi-

sion with 0.3 V and 2 mA hysteresis, respectively. It

also includes the ground start state and ring ground

detection. A summing node for meter pulse injection

to 2.2 Vrms is also included. The 44-pin PLCC ver-

sion also has a spare uncommitted op amp, which

may be used for ac gain setting or meter pulse filter-

ing.

■ Independent, adjustable dc and ac parameters:

— dc feed resistance (44-pin PLCC version)

— Loop current limit

— Termination impedance

■ Thermal protection

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Table of Contents

Contents

Page

Contents

Page

Features .................................................................... 1

Description ................................................................. 1

Pin Information ........................................................... 6

Functional Description................................................ 9

Absolute Maximum Ratings ..................................... 10

Recommended Operating Conditions ...................... 11

Electrical Characteristics .......................................... 11

Ring Trip Requirements......................................... 16

Test Configurations .................................................. 17

Applications ............................................................. 19

Characteristic Curves............................................. 19

dc Applications ...................................................... 21

Battery Feed...................................................... 21

Overhead Voltage ............................................ 22

Adjusting Overhead Voltage ............................. 23

Adjusting dc Feed Resistance........................... 23

Adjusting Overhead Voltage and dc Feed

Resistance Simultaneously.............................. 24

Loop Range....................................................... 24

Off-Hook Detection ........................................... 24

Ring Ground Detection...................................... 25

Longitudinal Balance.............................................. 25

Power Derating ..................................................... 25

Battery Switch ....................................................... 26

V^CC/VEE Supplies ................................................... 27

Power Ringing ....................................................... 27

Ringing SLIC Balanced Ring Signal

Power Ringing Load.......................................... 28

Crest Factor....................................................... 28

Current-Limit Switch.......................................... 29

Ring Trip............................................................ 29

Reference Designs for ISDN TA Applications... 31

Design Considerations .......................................... 33

Unbalanced Bused Ring Signal Application...... 33

Ring Trip Detection............................................ 33

ac Design .............................................................. 37

First-Generation Codecs ................................... 37

Second-Generation Codecs.............................. 37

Third-Generation Codecs.................................. 37

Design Examples................................................... 39

Example 1, Real Termination............................ 39

Example 2, Complex Termination ..................... 39

Example 3, Complex Termination Without

Spare Op Amp ................................................. 39

Complex Termination Impedance Design

Example Using L8560 Without Spare

Op Amp............................................................ 40

ac Interface Using First-Generation Codec....... 40

Transmit Gain.................................................... 41

Receive Gain..................................................... 42

Hybrid Balance.................................................. 42

Blocking Capacitors........................................... 43

Outline Diagrams...................................................... 44

32-Pin PLCC......................................................... 44

44-Pin PLCC......................................................... 45

Ordering Information................................................. 46

Generation ....................................................... 27

POTS for ISDN Terminal Adapters ................... 27

2

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Table of Contents (continued)

Figure 32. Thevenin Equivalent Ring Trip Circuit

for Balanced Ringing SLIC..................... 29

Figure 33. POTS Interface with Balanced Ringing

Using L8560 SLIC and T8503 Codec .... 31

Figure 34. Ring Trip Equivalent Circuit and

Equivalent Application ........................... 33

Figure 35. Basic Loop Start Application Circuit

Using T7504 Codec and Bused

Ringing................................................... 34

Figure 36. Ground Start Application Circuit .............. 35

Figure 37. ac Equivalent Circuit Not Including

Spare Op Amp ....................................... 38

Figure 38. ac Equivalent Circuit Including Spare

Op Amp.................................................. 38

Figure 39. Interface Circuit Using First-Generation

Codec (Blocking Capacitors Not

Figures

Page

Figure 1. Functional Diagram ..................................... 5

Figure 2. 32-Pin Diagram (PLCC Chip)...................... 6

Figure 3. 44-Pin Diagram (PLCC Chip)...................... 6

Figure 4. Ring Trip Circuits....................................... 16

Figure 5. Basic Test Circuit ...................................... 17

Figure 6. Metallic PSRR ........................................... 17

Figure 7. Longitudinal PSRR.................................... 17

Figure 8. Longitudinal Balance................................. 18

Figure 9. RFI Rejection............................................. 18

Figure 10. Longitudinal Impedance .......................... 18

Figure 11. ac Gains .................................................. 18

Figure 12. L8560 Receive Gain and Hybrid

Balance vs. Frequency .......................... 19

Figure 13. L8560 Transmit Gain and Return Loss

vs. Frequency ........................................ 19

Figure 14. L8560 Typical V^CCPower Supply

Shown)................................................... 41

Figure 40. ac Interface Using First-Generation

Codec (Including Blocking Capacitors)

Rejection................................................ 19

for Complex Termination Impedance..... 43

Figure 15. L8560 Typical V^BATPower Supply

Rejection................................................ 19

Figure 16. Loop Closure Program Resistor

Tables

Page

Selection ................................................ 20

Figure 17. Ring Ground Detection Programming ..... 20

Figure 18. Loop Current vs. Loop Voltage................ 20

Figure 19. Loop Current vs. Loop Resistance.......... 20

Figure 20. L8560 Typical SLIC Power Dissipation

vs. Loop Resistance............................... 21

Figure 21. Power Derating........................................ 21

Figure 22. Loop Current vs. Loop Voltage................ 21

Figure 23. SLIC 2-Wire Output Stage....................... 23

Figure 24. Equivalent Circuit for Adjusting the

Overhead Voltage.................................. 23

Table 1. L8560 Product Family Feature Summary..... 4

Table 2. Pin Descriptions............................................ 7

Table 3. Input State Coding........................................ 9

Table 4. Supervision Coding ...................................... 9

Table 5. Power Supply ............................................. 12

Table 6. 2-Wire Port ................................................. 13

Table 7. Analog Pin Characteristics ......................... 14

Table 8. Uncommitted Op Amp

Characteristics (44-Pin PLCC Only).......... 14

Table 9. ac Feed Characteristics.............................. 15

Table 10. Logic Inputs and Outputs.......................... 16

Table 11. Parts List for Balanced Ringing Using

T8503 Codec.......................................... 32

Table 12. Parts List for Loop Start with Bused

Ringing and Ground Start Applications .. 35

Table 13. 600 Ω Design Parameters........................ 37

Figure 25. Equivalent Circuit for Adjusting the

dc Feed Resistance ............................... 23

Figure 26. Adjusting Both Overhead Voltage and

dc Feed Resistance ............................... 24

Figure 27. Off-Hook Detection Circuit....................... 24

Figure 28. POTS Controlled from an ISDN

Terminal Adapter ................................... 28

Figure 29. Ringing Waveform Crest Factor = 1.6..... 28

Figure 30. Ringing Waveform Crest Factor = 1.2..... 28

Figure 31. Equivalent Ring Trip Circuit for

Balanced Ringing SLIC ......................... 29

Lucent Technologies Inc.

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Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

The L8560DAU and L8560EP are available in the

Description (continued)

32-pin and 44-pin PLCC packages and have feature

sets identical to the L8560AAU and L8560AP, respec-

tively, with the following modifications. These parts are

graded as high longitudinal balance (63 dB), and have

an additional logic state (scan with low battery) which

allows for low on-hook power dissipation.

The L8560 product family is graded by different fea-

tures, specifications, and package options. The

L8560Axx is the basic full-feature SLIC that operates

with 5 V and a battery supply, and is available in the

32-pin PLCC (AAU) package and the 44-pin PLCC

package (AP). This part is graded as the 54 dB longitu-

dinal balance part. Additional features (spare op amp

and overhead voltage programming) are available in

the 44-pin PLCC package.

The L8560FAU and L8560GP are available in the

32-pin and 44-pin PLCC packages and have feature

sets identical to the L8560AAU and L8560AP, respec-

tively, with the following modifications. These parts are

graded for lower longitudinal balance (50 dB), and

have an additional logic state (scan with battery) which

allows for low on-hook power dissipation.

The L8560CAU is available only in the 32-pin PLCC

package and has a feature set similar to the AAU ver-

sion, except the CAU version requires +5 V, –5 V, and

battery power supplies. With this option, power con-

sumption is greatly reduced.

Table 1 below summarizes the features in the L8560

product family.

Table 1. L8560 Product Family Feature Summary

Feature

L8560

AAU

AP

CAU

DAU

EP

FAU

GP

32-Pin PLCC

X

NA

X

NA

X

NA

X

NA

X

NA

X

NA

X

NA

X

44-Pin PLCC

5 V Operation

X

±5 V Operation (reduced power consumption)

Operational V^BAT1(V)

Battery Switch

NA

–70

X

NA

–70

X

NA

–70

X

NA

–70

X

NA

–70

X

NA

–70

X

–70

X

Balanced Ring Mode

Adjustable Overhead

Spare Op Amp

X

NA

X

NA

X

NA

X

NA

X

Reverse Battery

X

Scan Mode

X

Scan Mode with Low Battery

Longitudinal Balance (dB)*

On-hook Transmission

Ground Start

NA

54

X

NA

54

X

NA

54

X

63

X

63

X

50

X

50

X

Loop Start

X

Ring Trip Detector

Programmable Current Limit

Thermal Protection

X

* More information is provided in the Applications section of this document.

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Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Description (continued)

SEE ENLARGED DETAIL

BATTERY SWITCH

CF1

POWER CONDITIONING

VBAT1

& REFERENCE

INTERNAL SWITCH

CF2

BATTERY

SWITCH

DECISION

VREG

TG

2

DCOUT

RECTIFIER

–

+

VTX

ENLARGED DETAIL

TXI

AX

VITR

SN

19.2

0.1 µF

CEXTERNAL

44-PIN

PLCC

ONLY

–

SPARE

OP AMP

PT

A = 4

XMT

+

–

+

RCVN

RCVP

A = –4

PR

1

44-PIN

PLCC

ONLY

dc RESISTANCE

ADJUST

DCR

B0

B1

B2

BR

BATTERY FEED

STATE CONTROL

CURRENT-LIMIT

ADJUST

IPROG

LOOP CLOSURE DETECTOR

+

LCTH

NSTAT

–

+

–

RTSP

RTSN

RING TRIP DETECTOR

RING GROUND

DETECTOR

ICM

RGDET

12-2569.c (F)

Figure 1. Functional Diagram

Lucent Technologies Inc.

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Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Pin Information

4

3

2

1

32 31 30

29 BR

RCVN

FB2

5

6

7

8

9

28 B0

27 B1

26 B2

25 PR

24 PT

23 BS1

22 BS2

21 ICM

FB1

LCTH

DCOUT

32-PIN PLCC

IPROG 10

CF2 11

CF1 12

RTSN 13

14 15 16 17 18 19 20

12-2548.L (F)

Figure 2. 32-Pin Diagram (PLCC Chip)

6

5

4

3

2

1

44 43 42 41 40

39

RTSN

RTSP

NC

7

RCVN

RCVP

VITR

NC

8

38

37

36

35

34

33

32

31

30

29

9

AGND

NC

10

11

12

13

14

15

16

17

NSTAT

TXI

VCC

44-PIN PLCC

VBAT1

VBAT2

BGND

RGDET

ICM

VTX

TG

NC

NC-NTP

NC

18 19 20 21 22 23 24 25 26 27 28

12-2548.f (F)

Figure 3. 44-Pin Diagram (PLCC Chip)

6

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Pin Information (continued)

Table 2. Pin Descriptions

32-Pin 44-Pin Symbol Type

Description

DCOUT

O

dc Output Voltage. This output is a voltage that is directly proportional to the

9

1

absolute value of the differential tip/ring current.

IPROG

I

Current-Limit Program Input. A resistor to DCOUT sets the dc current limit of

10

2

the device.

11

12

—

3

4

5

CF2

CF1

SN

—

I

Filter Capacitor 2. Connect a 0.1 µF capacitor from this pin to AGND.

Filter Capacitor 1. Connect a 0.47 µF capacitor from this pin to pin CF2.

Summing Node. The inverting input of the uncommitted operational amplifier.

A resistor or network to XMT sets the gain (44-pin PLCC only).

XMT

RTSN

RTSP

O

I

Transmit ac Output Voltage. The output of the uncommitted operational

amplifier (44-pin PLCC only).

—

13

14

6

7

8

Ring Trip Sense Negative. Connect this pin to the ringing generator signal

through a high-value resistor.

I

Ring Trip Sense Positive. Connect this pin to the ring relay and the ringer

series resistor through a high-value resistor.

—

15

—

16

17

9

NC

AGND

NC

—

No Connection. May be used as a tie point.

Analog Signal Ground.

10

11

12

13

No Connection. May be used as a tie point.

5 V Power Supply.

VCC

VBAT1

Battery Supply. Negative high-voltage battery, higher in magnitude than VBAT2.

18

14

VBAT2

—

Auxiliary Battery Supply. Negative high-voltage battery, lower in magnitude

than V^BAT1, used to reduce power dissipation on short loops.

BGND

—

O

Battery Ground. Ground return for the battery supply.

19

20

15

16

RGDET

Ring Ground Detect. When high, this open-collector output indicates the pres-

ence of a ring ground. To use, connect a 100 kΩ resistor to V^CC.

ICM

I

Common-Mode Current Sense. To program ring ground sense threshold,

connect a resistor to V^CCand connect a capacitor to AGND to filter 50/60 Hz. If

unused, the pin should be connected to ground.

21

17

22

23

18

19

—

BS2

BS1

Battery Switch Slowdown. Connect a 0.22 µF capacitor to pin BS1.

Battery Switch Slowdown. Connect a 0.22 µF capacitor to pin BS2. Also, con-

nect a 0.1 µF capacitor in series with a 100 Ω resistor from BS1 to V^BAT1for sta-

bility.

—

24

20

21

22

—

NC

PT

No Connection. May be used as a tie point.

I/O Protected Tip. The output of the tip driver amplifier and input to loop sensing.

Connect to loop through overvoltage protection.

25

23

PR

I/O Protected Ring. The output of the ring driver amplifier and input to loop sens-

ing circuitry. Connect to loop through overvoltage protection.

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Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Pin Information (continued)

Table 2. Pin Descriptions (continued)

32-Pin 44-Pin Symbol Type

Description

No Connection. May be used as a tie point.

State Control Input. B0, B1, B2, and BR determine the state of the SLIC.

See Table 3. Pin B2 has a 40 pull-up.

—

24

25

NC

B2

—

I

26

kΩ

State Control Input. B0, B1, B2, and BR determine the state of the SLIC.

See Table 3. Pin B1 has a 40 pull-up.

26

27

B1

B0

I

27

28

kΩ

State Control Input. B0, B1, B2, and BR determine the state of the SLIC.

See Table 3. Pin B0 has a 40 pull-up.

kΩ

State Control Input. B0, B1, B2, and BR determine the state of the SLIC.

See Table 3. Pin BR has a 40 pull-up.

28

29

BR

I

kΩ

29

30

31

—

30

NC

NC-NTP

NC

—

No Connection. May be used as a tie point.

No Connection. May not be used as a tie point.

No Connection. May be used as a tie point.

32

33

34

35

TG

VTX

—

O

Transmit Gain. Connect a 4.32 kΩ resistor from this pin to VTX.

The voltage at this pin is directly proportional to the differential tip/ring current.

ac/dc Separation. Connect a 0.1 µF capacitor from this pin to VTX.

31

32

1

TXI

—

O

NSTAT

Loop Detector Output/Ring Trip Detector Output. This output is a wired-

OR of the NLC/NRDET outputs. When low, this logic output indicates that an

off-hook condition exists or that ringing has been tripped.

2

—

36

37

VEE

NC

—

O

–5 V Power Supply L8560C.

No Connection L8560A/D/F. May be used as a tie point.

No Connection. May be used as a tie point.

—

3

NC

VITR

ac Output Voltage. This output is a voltage that is directly proportional to the

differential ac tip/ring current.

4

5

38

39

RCVP

RCVN

I

Receive ac Signal Input (Noninverting). This high-impedance input con-

trols the ac differential voltage on tip and ring.

Receive ac Signal Input (Inverting). This high-impedance input controls the

ac differential voltage on tip and ring.

—

6

40

41

NC

FB2

—

I

No Connection. May be used as a tie point.

Polarity Reversal Slowdown. Connect a capacitor to ground.

42

43

7

8

FB1

LCTH

Loop Closure Threshold Input. Connect a resistor to DCOUT to set off-

hook threshold.

—

44

DCR

I

dc Resistance. Short to analog ground for dc feed resistance of 55 Ω. The dc

feed resistance can be increased to a nominal 760 Ω by shorting DCR to

DCOUT. Intermediate values can be set by a simple resistor divider from

DCOUT to ground with the trip at DCR (44-pin PLCC only).

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Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Functional Description

Table 3. Input State Coding

B0 B1 B2 BR

State/Definition

1

0

1

0

1

0

1

0

1

0

1

0

1

Powerup, Forward Battery VBAT2. Pin PT is positive with respect to pin PR. VBAT2 is applied

to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active—an

off-hook condition or a ring trip causes output NSTAT to go low.

Powerup, Reverse Battery VBAT2. Pin PR is positive with respect to pin PT. VBAT2 is applied

to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active—an

off-hook condition or a ring trip causes output NSTAT to go low.

Powerup, Forward Battery VBAT1. Pin PT is positive with respect to pin PR. VBAT1 is applied

to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active—an

off-hook condition or a ring trip causes output NSTAT to go low.

Powerup, Reverse Battery VBAT1. Pin PR is positive with respect to pin PT. VBAT1 is applied

to the tip/ring drive amplifiers. On-hook transmission capability. All supervision active—an

off-hook condition or a ring trip causes output NSTAT to go low.

Ground Start. Tip drive amplifier is turned off. The device presents a high impedance

(>100 kΩ) to pin PT and a current-limited battery (V^BAT1) to pin PR. Output pin RGDET indi-

cates current flowing in the ring lead.

Low-Power Scan. Except for off-hook supervision, all circuits are shut down to conserve

power. Only the off-hook detector affects output pin NSTAT. V^BAT1is applied to the tip/ring

drive amplifiers. Pin PT is positive with respect to pin PR. On-hook transmission is disabled.

Low-Power Scan (L8560D/E/F/G Only). Except for off-hook supervision, all circuits are shut

down to conserve power. Only the off-hook detector affects output pin NSTAT. V^BAT2is ap-

plied to the tip/ring drive amplifiers. Pin PT is positive with respect to pin PR. On-hook trans-

mission is disabled.

0

1

0

1

0

Forward Disconnect. The tip and ring amplifiers are turned off and the SLIC goes into a

high-impedance state (>100 kΩ). V^BAT2is applied to the SLIC.

1/0

Ring State. SLIC is powered up. VBAT1 is applied to the tip and ring amplifiers. Current limit

is increased by a factor of 2.8. Overhead voltage is reduced to approximately 2.4 V. These

conditions are necessary to supply sufficient power to drive a true North American 5 REN

ringing load (1386 Ω + 40 µF). Loop closure detector is disabled—only the ring trip detector

affects output pin NSTAT. To apply a balanced ring signal to pins PR and PT, apply a 0 V to

5 V square wave to input pin B1. Ringing frequency is the frequency of the input wave at B1.

To shape the ring signal at pins PR and PT, connect a capacitor from pin FB1 to ground and

from pin FB2 to ground.

Table 4. Supervision Coding

Pin NSTAT

Pin RGDET

1 = ring ground

0 = no ring ground

0 = off-hook or ring trip

1 = on-hook and no ring trip

Lucent Technologies Inc.

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Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Absolute Maximum Ratings (TA = 25 °C)

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-

lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess

of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended

periods can adversely affect device reliability.

Parameter

Symbol

VCC

Value

7.0

Unit

V

5 V Power Supply

–5 V Power Supply (L8560C)

Battery (talking) Supplies

VEE

–7.0

V

VBAT1, VBAT2

IVBAT2I

—

–75

V

VBAT2 Magnitude

IVBAT1I + 0.4

–0.5 to +7.0

–7.0 to +7.0

165

V

Logic Input Voltage

V

Analog Input Voltage

—

V

Maximum Junction Temperature

Storage Temperature Range

Relative Humidity Range

TJ

°C

%

V

Tstg

–40 to +125

5 to 95

RH

Ground Potential Difference (BGND to AGND)

PT or PR Fault Voltage (dc)

PT or PR Fault Voltage (10 x 1000 µs)

Current into Ring Trip Inputs

—

±3

VPT, VPR

IRTSP, IRTSN

(VBAT1 – 5) to +3

(VBAT1 – 15) to +15

±240

V

µA

Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when

powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the

device ratings. Some of the known examples of conditions that cause such potentials during powerup are 1) an inductor connected to tip

and ring can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters, and 2) inductance in the VBAT

lead could resonate with the VBAT filter capacitor to cause a destructive overvoltage.

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Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Recommended Operating Conditions

Parameter

Min

–40

5

Typ

—

Max

85

Unit

°C

mA

Vrms

Ω

Ambient Temperature

Loop Closure Threshold-detection Programming Range

10

ILIM

dc Loop Current-limit Programming Range

5

40

50

On- and Off-hook 2-wire Signal Level (@ ZLOOP = 200 Ω)

—

2.2

ac Termination Impedance Programming Range

150

–24

–16

4.5

–4.75

55

600

–48

—

1300

–70

VBAT1

5.5

VBAT1

V

VBAT2

V

VCC

5.0

–5.0

55

V

VEE (L8560C)

–5.5

760

V

dc Feed Resistance Programming Range (excl. RP)

Ω

Electrical Characteristics

Minimum and maximum values are testing requirements in the temperature range of 25 °C to 85 °C and battery

range of –24 V to –70 V. These minimum and maximum values are guaranteed to –40 °C based on component

simulations and design verification of samples, but devices are not tested to –40 °C in production. The test circuit

shown in Figure 5 is used, unless otherwise noted. Positive currents flow into the device.

Typical values are characteristics of the device design at 25 °C based on engineering evaluations and are not part

of the test requirements. Supply values used for typical characterization are V^CC= 5.0 V, VEE = –5.0 V, VBAT1 =

–48 V, V^BAT2= –25.5 V, unless otherwise noted.

Lucent Technologies Inc.

11

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Electrical Characteristics (continued)

Table 5. Power Supply

V^CC= 5.0 V, VEE = –5.0 V, VBAT1 = –48 V, VBAT2 = –19 V, unless otherwise noted.

Parameter

Min

Typ

Max

Unit

Power Supply Rejection 500 Hz to 3 kHz

(See Figures 6, 7, 14, and 15.)¹:

V^CC(1 kHz), VEE (1 kHz)²

35

45

—

dB

VBAT1, VBAT2 (500 Hz—3 kHz)

Thermal Protection Shutdown (Tjc)

—

165

—

°C

Thermal Resistance, Junction to Ambient (θJA), Still Air, 44-pin PLCC

Thermal Resistance, Junction to Ambient (θ^JA), Still Air, 32-pin PLCC

—

47

60

—

°C/W

Power Supply—Powerup, No Loop Current, VBAT2 Applied

L8560A/D/E/F/G:

I^CC

IBAT1

IBAT2

—

6.0

120

2.6

7.2

200

3.2

mA

µA

mA

Power Supply—Powerup, No Loop Current, VBAT1 Applied:

I^CC(L8560A/D/E/F/G)

—

6.0

2.8

1.65

1.0

7.2

3.3

2.0

1.3

mA

I^BAT1(L8560A)

I^BAT1(L8560D/E/F/G)

I^BAT2(L8560D/E/F/G)

Power Supply—Scan Mode, Forward Battery, No Loop Current,

V^BAT1Applied:

I^CC(L8560A/D/E/F/G)

I^BAT1(L8560A)

I^BAT1(L8560D/E/F/G)

I^BAT2(L8560D/E/F/G)

—

4.0

1.3

0.5

0.9

5.2

1.6

0.75

1.2

mA

Power Supply—Scan Mode, Forward Battery, No Loop Current,

V^BAT2Applied:

I^CC

—

4.1

200

1.2

—

mA

µA

mA

I^BAT1(VBAT1 = –65 V)

I^BAT2(VBAT2 = –30 V)

Power Supply—Powerup, No Loop Current, L8560C Only:

I^CC

IEE

—

5.8

0.9

1.65

1.50

120

7.2

1.26

2.2

1.96

200

mA

µA

IBAT1 (VBAT1 applied)

I^BAT2(VBAT2 applied)

I^BAT1(VBAT2 applied)

Power Supply—Scan, Forward Battery, No Loop Current, VBAT1

Applied, L8560C Only:

I^CC

IEE

—

4.1

0.81

0.43

5.5

1.1

0.56

mA

IBAT (VBAT1 applied)

Power Supply—Ring Mode, No Loop Current:

I^CC

IBAT1

—

6.45

2.2

—

mA

1. This parameter is not tested in production. It is guaranteed by design and device characterization.

2. VEE used for L8560C version only.

12

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Electrical Characteristics (continued)

Table 6. 2-Wire Port

Parameter

Tip or Ring Drive Current = dc + Longitudinal + Signal Currents

Signal Current

Longitudinal Current Capability per Wire¹

dc Loop Current Limit²:

Programmability Range³

Min

65

Typ

—

Max

—

Unit

mA

—

15

mArms

8.5

15

—

5

—

50

±5

mA

%

Accuracy (B0 = BR = 5 V, RLOOP = 100 Ω, VBAT1 = –48 V

or V^BAT2= –25.5 V active)

Powerup Open Loop Voltage Levels:

Differential Voltage – V^BAT2(VBAT2 = –25.5 V)

Differential Voltage – V^BAT1(VBAT1 = –48 V)⁴

Differential Voltage – VBAT1 (ring mode)

V

|V^BAT1+ 5.5| |V^BAT1+ 2.4|

—

Ground Start State:

PT Resistance

—

100

—

kΩ

dc Feed Resistance (for ILOOP below current limit)

55

80

Ω

Loop Resistance Range (3.17 dBm overload into 600 Ω; not in-

cluding protection):

—

I^LOOP= 20 mA at VBAT1 = –48 V

I^LOOP= 20 mA at VBAT2 = –24 V

1940

760

Ω

Longitudinal to Metallic Balance—IEEE⁵Std. 455 (See Figure

8.)^{6, 7}

:

L8560A/C:

200 Hz to 2999 Hz Forward/Reverse Battery

3000 Hz to 3400 Hz Forward/Reverse Battery

L8560D/E:

200 Hz to 2999 Hz Forward Battery

3000 Hz to 3400 Hz Forward Battery

200 Hz to 2999 Hz Reverse Battery

3000 Hz to 3400 Hz Reverse Battery

L8560F/G:

54

49

59

54

—

dB

63

58

54

68

63

59

—

dB

50

45

55

50

—

dB

200 Hz to 2999 Hz Forward/Reverse Battery

3000 Hz to 3400 Hz Forward/Reverse Battery

Metallic to Longitudinal Balance:

200 Hz to 4 kHz

RFI Rejection (See Figure 9.)³:

0.5 Vrms, 50 Ω Source, 30% AM Mod. 1 kHz

500 kHz to 100 MHz

—

46

—

dB

–55

–45

dBV

1. The longitudinal current is independent of dc loop current.

2. Current-limit ILIM is programmed by a resistor, RPROG, from pin IPROG to DCOUT. ILIM is specified at the loop resistance where current limiting

begins (see Figure 22). Select RPROG (kΩ) = 0.616 x ILIM (mA) – onset of current limit with input BR high. When input BR is low, the current

will be increased by a factor of 2.8.

3. This parameter is not tested in production. It is guaranteed by design and device characterization.

4. Specification is reduced to |VBAT1 + 10.5 V| minimum when VBAT1 = –70 V at 85 °C.

5. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.

6. Longitudinal balance of circuit card will depend on loop series protection resistor matching and magnitude.

7. Tested at 1000 Hz only. Full frequency specifications guaranteed by design and device characterization.

Lucent Technologies Inc.

13

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Electrical Characteristics (continued)

Table 7. Analog Pin Characteristics

Parameter

Min

Typ

Max

Unit

Differential PT/PR Current Sense (DCOUT):

Gain (PT/PR to DCOUT)

Offset Voltage @ I^LOOP= 0

—

–200

–41.7

—

200

V/A

mV

Loop Closure Detector Threshold¹:

Programming Accuracy at 10 mA

—

±20

%

Ring Ground Detector Threshold²:

R^ICM= 83 kΩ

Programming Accuracy

3

—

6

—

10

±25

kΩ

%

Ring Trip Comparator:

Input Offset Voltage³

—

–8.6

–6.1

±10

–8.2

–5.7

I^N

—

–7.6

–5.1

mV

V

Internal Voltage Source (L8560A/D/E/F)

Internal Voltage Source (L8560C)

Current at Input RTSP⁴

I^N– 0.5

I^N+ 0.5

µA

RCVN, RCVP:

Input Bias Current

—

–0.2

–1

µA

Loop Closure Detector Hysteresis

Variation

—

2

15

—

mA

%

THD³at VPT/PR = 2.2 Vrms, VOH = 12 V, ZT = 200 Ω

—

–35

dB

VITR Output Impedance

—

5

—

Ω

VITR Output Offset Voltage

20

29

mV

µA

Average/dc Current to FB1 and FB2

Tested as:

(|FB1 (FB) (–5 V)| + |FB1 (FB) (–63 V)| + 2|FB1 (FB) (–35 V)| +

|FB2 (FB) (–5 V)| + |FB2 (FB) (–63 V)| + 2|FB2 (FB) (–35 V)| +

|FB1 (RB) (–5 V)| + |FB1 (RB) (–63 V)| + 2|FB1 (RB) (–35 V)| +

|FB2 (RB) (–5 V)| + |FB2 (RB) (–63 V)| + 2|FB2 (RB) (–35 V)|)/16

Accuracy

—

±8

%

1. Loop closure threshold is programmed by resistor RLCTH from pin LCTH to pin DCOUT.

2. Ring ground threshold is programmed by resistor RICM2 from pin ICM to VCC.

3. This parameter is not tested in production. It is guaranteed by design and device characterization.

4. IN is the sourcing current at RTSN. Guaranteed if IN is within 5 µA to 30 µA.

Table 8. Uncommitted Op Amp Characteristics (44-Pin PLCC Only)

Parameter

Min

Typ

Max

Unit

Input Offset Voltage

Input Offset Current

Input Bias Current

—

±5

±10

200

1.5

—

mV

nA

Differential Input Resistance

MΩ

Output Voltage Swing (RL = 10 kΩ)

Output Resistance (A^VCL= 1)

—

±3.5

2.0

—

Vpk

Ω

Small-signal GBW

—

700

—

kHz

14

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Electrical Characteristics (continued)

Table 9. ac Feed Characteristics

Parameter

Min

Typ

Max

Unit

ac Termination Impedance¹

150

—

1300

Ω

Longitudinal Impedance

—

0

—

Ω

Total Harmonic Distortion—200 Hz to 4 kHz²:

Off-hook

On-hook

—

0.3

1.0

%

Transmit Gain, f = 1 kHz (PT/PR to VITR; see Figure 11.)

–392

–400

–408

V/A

Receive + Gain, f = 1 kHz (RCVP to PT/PR)

Receive – Gain, f = 1 kHz (RCVN to PT/PR)

7.76

–7.76

8.00

–8.00

8.24

–8.24

—

Group Delay²:

Transmit, Powerup

Receive

—

1

0.5

—

µs

Gain vs. Frequency (transmit and receive)

(600 Ω termination; reference 1 kHz, 1 Vrms)²:

200 Hz to 300 Hz

300 Hz to 3.4 kHz

3.4 kHz to 16 kHz

–1.00

–0.3

–3.0

—

0.0

–0.1

—

0.05

0.3

dB

2.5

16 kHz to 266 kHz

Gain vs. Level (transmit and receive)(reference 0 dBV)²:

–55 dB to +3 dB

–0.05

0

0.05

dB

Return Loss^{2, 3}

200 Hz to 500 Hz

500 Hz to 3400 Hz

:

—

30

36

—

dB

2-wire Idle-channel Noise (600 Ω termination):

Psophometric²

C-message

3 kHz Flat²

—

–87

2

10

–77

12

20

dBmp

dBrnC

dBrn

4-wire Idle-channel Noise:

Psophometric²

C-message

—

–82

7

15

–77

12

20

dBmp

dBrnC

dBrn

3 kHz Flat²

Transhybrid Loss³:

200 Hz to 500 Hz

500 Hz to 3400 Hz

—

30

36

—

dB

1. Set by external components. Any complex impedance R1 + R2 || C between 150 Ω and 1300 Ω can be synthesized.

2. This parameter is not tested in production. It is guaranteed by design and device characterization.

3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes

1% tolerance external components. Not tested in production.

Lucent Technologies Inc.

15

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Electrical Characteristics (continued)

Table 10. Logic Inputs and Outputs

Parameter

Symbol

Min

Typ

Max

Unit

Input Voltages:

Low Level (permissible range)

High Level (permissible range)

VIL

VIH

–0.5

2.0

0.4

2.4

0.7

V^CC

V

Input Currents:

Low Level (V^CC= 5.25 V, VI = 0.4 V)

High Level (V^CC= 5.25 V, VI = 2.4 V)

IIL

IIH

–75

–40

–115

–60

–300

–100

µA

Output Voltages (open collector with internal pull-up resistor):

Low Level (V^CC= 4.75 V, IOL = 360 µA)

High Level (V^CC= 4.75 V, IOH = –20 µA)

VOL

VOH

0

2.4

0.2

—

0.4

V^CC

V

Ring Trip Requirements

200 Ω

■ Ringing signal:

TIP

RING

— Voltage, minimum 35 Vrms, maximum 100 Vrms.

— Frequency, 17 Hz to 23 Hz.

— Crest factor, 1.4 to 2.

SWITCH CLOSES < 12 ms

6 µF PER TA 909

8 µF PER TR 57

■ Ringing trip:

— ≤100 ms (typical), ≤250 ms (V^BAT= –33 V, loop

length = 530 Ω).

10 kΩ

■ Pretrip:

— The circuits in Figure 4 will not cause ringing trip.

2 µF

100 Ω

TIP

RING

12-2572.e (F)

Figure 4. Ring Trip Circuits

16

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Test Configurations

VBAT2

0.1 µF

VCC

VBAT1

0.1 µF

FOR 44-PIN PLCC

VBAT2

VBAT1

BGND

VCC

AGND

VITR

SN

100

Ω

TIP

20 k

Ω

PT

PR

20 k

XMT

RCV

RLOOP

66.5 k

Ω

RCVN

RCVP

30.9 k

Ω

RING

13.7 k

Ω

DCOUT

L8560

SLIC

23.7 k

Ω

VITR

RCV

I

PROG

13.7

66.5

kΩ

8.25 kΩ

kΩ

LCTH

RTSP

2 M

Ω

30.9 k

Ω

BS1

BS2

FOR 32-PIN PLCC

402 kΩ

2 M

RTSN

ICM

100

Ω

274 kΩ

B0

B1

VBAT

TG

VTX

0.1

TXI FB2 FB1 RGDET NSTAT BR B2

4.32 k

Ω

µF

100

Ω

100 Ω

12-2570.f (F)

Figure 5. Basic Test Circuit

VBAT OR VCC

DISCONNECT

BYPASS CAPACITOR

100 Ω

4.7 µF

100 Ω

4.7 µF

DISCONNECT

BYPASS CAPACITOR

VS

VBAT OR

VCC

VBAT OR

VCC

67.5 Ω

TIP

10 µF

BASIC

TEST CIRCUIT

+

VT/R

–

BASIC

TEST CIRCUIT

900 Ω

67.5 Ω

56.3 Ω

+

RING

VM

–

RING

10 µF

VS

VM

VS

VT/R

PSRR = 20log

12-2583.b (F)

12-2582.b (F)

Figure 7. Longitudinal PSRR

Figure 6. Metallic PSRR

Lucent Technologies Inc.

17

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Test Configurations (continued)

ILONG

TIP

100 µF

+

VPT

–

TIP

VS

368 Ω

+

BASIC

TEST CIRCUIT

BASIC

TEST CIRCUIT

VM

–

ILONG

VPR

+

RING

100 µF

RING

VS

VM

∆ VPT

∆ ILONG

∆VPR

∆ ILONG

LONGITUDINAL BALANCE = 20 log

ZLONG =

OR

12-2585.a (F)

12-2584.c (F)

Figure 10. Longitudinal Impedance

Figure 8. Longitudinal Balance

0.01 µF

82.5 Ω

TIP

XMT (44-PIN PLCC)

VITR (32-PIN PLCC)

600 Ω

1

TIP

6, 7

2

50 Ω

VS

+

BASIC TEST

CIRCUIT

L7590

4

VBAT

BASIC

TEST CIRCUIT

600 Ω

VT/R

2.15 µF

RING

–

RCV

82.5 Ω

RING

HP* 4935A

TIMS

VS

5-6756.a (F)

* HP is a registered trademark of Hewlett-Packard Company.

VXMT

VT/R

GXMT =

Notes:

VS = 0.5 Vrms 30% AM 1 kHz modulation.

VT/R

VRCV

GRCV =

f = 500 kHz—1 MHz.

12-2587.d (F)

Device in powerup mode 600 Ω termination.

Figure 11. ac Gains

Figure 9. RFI Rejection

18

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications

Characteristic Curves

0

–10

SPEC. RANGE

RECEIVE GAIN

–10

–20

–30

CURRENT

LIMIT

–20

–30

–40

–50

BELOW

CURRENT

LIMIT

–60

HYBRID BALANCE

–40

–50

–70

–80

10⁴

10⁵

10⁶

10

100

1000

FREQUENCY (Hz)

100

1000

10⁴

10⁵

FREQUENCY (Hz)

12-2830.a (F)

12-2828.c (F)

Figure 14. L8560 Typical VCC Power Supply

Rejection

Figure 12. L8560 Receive Gain and Hybrid Balance

vs. Frequency

0

–10

0

–20

CURRENT

LIMIT

TRANSMIT GAIN

–10

–30

–40

SPEC. RANGE

–20

–50

–60

BELOW

CURRENT

LIMIT

–30

–70

–80

RETURN LOSS

–40

10⁴

10⁵

10⁶

10

100

1000

FREQUENCY (Hz)

–50

10⁴

10⁵

100

1000

FREQUENCY (Hz)

12-2871.a (F)

Figure 15. L8560 Typical VBAT Power Supply

Rejection

12-2829.b (F)

Figure 13. L8560 Transmit Gain and Return Loss

vs. Frequency

Lucent Technologies Inc.

19

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Characteristic Curves (continued)

25

20

50

40

30

20

ILIM TESTED

I^LIMONSET

1

15

10

5

12.5 kΩ

–1

Rdc1

10

0

10

20

30

40

50

0

LOOP VOLTAGE (V)

0

10

20

30

40

50

60

12-3050.k (F)

LOOP CLOSURE THRESHOLD RESISTOR, RLCTH (kΩ)

Note: VBAT1 = –48 V; ILIM = 22 mA; Rdc1 = 55 Ω.

12-3015 (F)

–3

Note: VBAT1 = –48 V, ITR = 1.2 x 10 RLCTH (kΩ).

Figure 18. Loop Current vs. Loop Voltage

Figure 16. Loop Closure Program Resistor

Selection

50

40

30

35

30

25

20

15

10

20

10

0

500

1000

1500

2000

5

0

LOOP RESISTANCE, RLOOP (Ω)

12-3051 (F)

0

20

40

60

80

100

120 140

Note: VBAT1 = –48 V; ILIM = 22 mA; Rdc1 = 55 Ω.

RING GROUND CURRENT

DETECTION RESISTOR, RICM (kΩ)

Figure 19. Loop Current vs. Loop Resistance

12-3016.f (F)

Note: Tip lead is open; VBAT1 = –48 V.

Figure 17. Ring Ground Detection Programming

20

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

dc Applications

Applications (continued)

Battery Feed

Characteristic Curves (continued)

The dc feed characteristic can be described by:

1500

1000

( VBAT – VOH) × RL

VT/R = --------------------------------------------

R^L+ 2RP + Rdc

VBAT – VOH

IL = ---------------------------------

R^L+ 2RP + Rdc

where:

I^L= dc loop current.

V^T/R= dc loop voltage.

|V^BAT| = battery voltage magnitude.

500

0

Note: The L8560 has a battery switch circuit that

allows use of a primary battery, V^BAT1, or an aux-

iliary battery, V^BAT2. |VBAT| is the battery, VBAT1 or

V^BAT2, that is active. See the Battery Switch sec-

tion for more information.

0

500

1000

1500

2000

LOOP RESISTANCE, RLOOP (Ω)

12-3052 (F)

V^OH= overhead voltage. This is the difference between

the battery voltage and the open loop tip/ring

voltage.

Note: VBAT1 = –48 V; ILIM = 22 mA; Rdc1 = 55 Ω.

Figure 20. L8560 Typical SLIC Power Dissipation

vs. Loop Resistance

R^L= loop resistance, not including protection resistors.

R^P= protection resistor value.

R^dc= SLIC internal dc feed resistance.

The design begins by drawing the desired dc template.

An example is shown in Figure 22.

2000

1750

50

40

300 cu. ft./min.

44-PIN PLCC

1500

1250

1000

STILL AIR

44-PIN PLCC

ILIM TESTED

I^LIMONSET

1

30

12.5 kΩ

750

500

STILL AIR

32-PIN PLCC

20

–1

Rdc1

250

0

10

20

40

60

80

100

120 140

180

160

0

10

20

30

40

50

AMBIENT TEMPERATURE, TA (°C)

LOOP VOLTAGE (V)

12-2825.e (F)

12-3050.k (F)

Figure 21. Power Derating

Note: VBAT1 = –48 V; ILIM = 22 mA; Rdc1 = 55 Ω.

Figure 22. Loop Current vs. Loop Voltage

Lucent Technologies Inc.

21

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Tip/ring voltage where current-limit onsets (VT/Ronset):

Applications (continued)

dc Applications (continued)

( VBAT – VOH) × RLonset

-------------------------------------------------------------------

V^T/Ronset=

RLonset + 2RP + Rdc

Tip/ring voltage when loop resistance is R^loop(VT/Rloop):

Starting from the on-hook condition and going through

to a short circuit, the curve passes through two regions:

V^T/Rloop(V) = Iloop (mA) x RLOOP (Ω)/1000

Region 1: On-hook and low loop currents. In this region,

the slope corresponds to the dc resistance of the SLIC,

R^dc1(default is 55 Ω typical). The open circuit voltage

is the battery voltage less the overhead voltage of the

device, V^OH(default is 6.7 V typical). These values are

suitable for most applications but can be adjusted if

needed. For more information, see the sections titled

Adjusting dc Feed Resistance or Adjusting Overhead

Voltage.

Loop current is now given by:

I^loop(mA) = ILonset (mA) + (VT/Ronset – VT/Rloop)

(V)/12.5 (kΩ)

or

ILonset(mA) + VT ⁄ Ronset(V) ⁄ 12.5(kΩ)

-----------------------------------------------------------------------------------------------------------

I^loop(mA) =

1 + Rloop (Ω) ⁄ 12500(kΩ)

Current limit is not sensitive to temperature variation.

Region 2: Current limit. The dc current is limited to a

starting value determined by external resistor R^PROG, an

internal current source, and the gain from tip/ring to pin

DCOUT. Current limit is set by the equation:

Overhead Voltage

In order to drive an on-hook ac signal, the SLIC must set

up the tip and ring voltage to a value less than the bat-

tery voltage. The amount that the open loop voltage is

decreased relative to the battery is referred to as the

overhead voltage and is expressed as:

I^PROGx RPROG = ILIM x BDCOUT

Where:

I^PROG= the current from an internal current source

R^PROG= the external resistor used to set the current

limit

V^OH= |VBAT| – (VPT – VPR)

Without this buffer voltage, amplifier saturation will

occur and the signal will be clipped. The L8560 is auto-

matically set at the factory to allow undistorted on-hook

transmission of a 3.17 dBm signal into a 900 Ω loop

impedance.

B^DCOUT= the transconductance from tip/ring to

DCOUT, which is nominally 41.67 V/A

During nonringing modes, the internal current source is

set at 75 µA, thus:

The drive amplifiers are capable of 4 Vrms minimum

(V^AMP). So, the maximum signal the device can guaran-

tee is:

I^PROGx RPROG = ILIM x BDCOUT

RPROG = ILIM x BDCOUT/IPROG

RPROG (K) = ILIM (mA) x 0.04167 (V/mA)/75e–3 (mA)

R^PROG(K) = 0.556 x ILIM (mA)

ZT/R

---------------------------------

V^T/R= 4 V

ZT/R + 2RP

Testing data shows that:

For applications where higher signal levels are needed,

e.g., periodic pulse metering, the 2-wire port of the

SLIC can be programmed with pin DCR (pin DCR is

not available in the 32-pin PLCC package). The first

step is to determine the amount of overhead voltage

needed. The peak voltage at output of tip and ring

amplifiers is related to the peak signal voltage by:

R^PROG(K) = 0.616 x ILIM (mA)

This equation is a first-order estimation of the loop cur-

rent at current-limit range.

For more precise loop current at current-limit range, the

loop current is also determined by loop length, protec-

tion resistance, and battery voltage. It can be shown

through calculations as follows:

Λ

2R^P

-----------

VAMP = VT/R 1 +

Current-limit onset (I^Lonset):

ZT/R

R^PROG(K)

---------------------------------

I^Lonset(mA) =

0.616

Loop resistance where current-limit onsets (R^Lonset):

( VBAT – VOH)(V)

-------------------------------------------------

R^Lonset(Ω) =

x 1000 – 2RP – Rdc

ILonset(mA)

22

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

the case of –5 V, the overhead voltage will be indepen-

dent of the battery voltage. Figure 24 shows the equiv-

alent input circuit to adjust the overhead.

Applications (continued)

dc Applications (continued)

RP

R1

+

VT/R

[ZT/R]

RP

VAMP

DCR

–

R2

12-2563.c (F)

–5 V

12-2562.b (F)

Figure 23. SLIC 2-Wire Output Stage

Figure 24. Equivalent Circuit for Adjusting the

Overhead Voltage

In addition to the required peak signal level, the SLIC

needs about 2 V from each power supply to bias the

amplifier circuitry. It can be thought of as an internal

saturation voltage. Combining the saturation voltage

and the peak signal level, the required overhead can

be expressed as:

The overhead voltage is programmed by using the fol-

lowing equation:

V^OH= 7.1 – 18.18 VDCR

R1

R2 + R1

Λ

VT/R

---------------------

= 7.1 – 18.18 –5 ×

2R^P

-----------

VOH = VSAT + 1 +

ZT/R

Adjusting dc Feed Resistance

2R^P

2 ZT/R

1000

= VSAT + 1 +

-------------- x 10^dBm/20

-----------

ZT/R

The dc feed resistance may be adjusted with the help

of Figure 25.

where VSAT is the combined internal saturation voltage

between the tip/ring amplifiers and V^BAT(4.0 V typ.). RP

(Ω) is the protection resistor value. Z^T/R(Ω) is the ac

loop impedance.

44-PIN PLCC

R1

Example 1, On-Hook Transmission of a Meter

Pulse:

DCR

Signal level: 2.2 Vrms into 200 Ω

35 Ω protection resistors

R3

I^LOOP= 0 (on-hook transmission of the metering signal)

2 × 35

200

DCOUT

----------------

V^OH= 4.0 + 1 +

2 (2.2)

= 8.2 V

12-2560.c (F)

Accounting for V^SATtolerance of 0.5 V, a nominal over-

head of 8.7 V would ensure transmission of an undis-

torted 2.2 V metering signal.

Figure 25. Equivalent Circuit for Adjusting the dc

Feed Resistance

∆VDCR

∆VDCOUT

Adjusting Overhead Voltage

-------------------------

R^dc= 55 Ω + 705 Ω

To adjust the open loop 2-wire voltage, pin DCR

(44-pin PLCC only) is programmed at the midpoint of a

resistive divider from ground to either –5 V or V^BAT. In

R1

R3 + R1

---------------------

= 55 Ω + 705 Ω

Lucent Technologies Inc.

23

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Off-Hook Detection

Applications (continued)

dc Applications (continued)

The loop closure comparator has built-in longitudinal

rejection, eliminating the need for an external 60 Hz fil-

ter. This applies in both powerup and low-power scan

states. The loop closure detection threshold is set by

resistor R^LCTH. Referring to Figure 27, NLC is high in an

on-hook condition (I^TR= 0, VDCOUT = 0) and

V^LCTH= 0.05 mA x RLCTH. The off-hook comparator

goes low when V^LCTHcrosses zero and then goes neg-

ative:

Adjusting Overhead Voltage and dc Feed

Resistance Simultaneously

The above paragraphs describe the independent set-

ting of the overhead voltage and the dc feed resis-

tance. If both need to be set to customized values,

combine the two circuits as shown in Figure 26.

V^LCTH= 0.05 mA x RLCTH + VDCOUT

=

0.05 x RLCTH – 0.04167 V/mA x ITR

RLTCH (kΩ) = 0.833 ITR (mA)

Testing data shows that:

R1

R^LTCH(kΩ) = 0.899 ITR (mA)

DCR

R2

R3

RP

TIP

–5 V

–0.04167 V/mA

ITR

DCOUT

+

–

DCOUT

RL

RLCTH

RING

12-2561.d (F)

LCTH

NLC

RP

+

–

0.05 mA

Figure 26. Adjusting Both Overhead Voltage and dc

Feed Resistance

12-2553.d (F)

This is an equivalent circuit for adjusting both the dc

feed resistance and overhead voltage together.

Figure 27. Off-Hook Detection Circuit

The adjustments can be made by simple superposition

of the overhead and dc feed equations:

Note that NLC is internally wired-OR with the output of

the ring trip detector (NRDET). The wired-OR, NSTAT,

is a package output pin.

_R1|| _R3

----------------------------------

V^OH= 7.1 + 40

_{R2 + R1}|| _R3

Note that if NSTAT is used to directly control logic input

B2, connect a 0.01 µF capacitor from node LCTH to

ground for filtering purposes. In this mode of operation,

the L8560 will automatically switch to the lower-voltage

battery under off-hook conditions.

R1

R2 + R1

---------------------

Rdc = 55 kΩ + 705 Ω

Lower-value resistors can be used; the only disadvan-

tage is the power consumption of the external resistors.

Also note that NSTAT will toggle low with a ring ground

in the ground start application. Under a ring ground,

one-half of the current appears as differential. This total

ring ground current is approximately two times the cur-

rent limit; thus, the differential current is approximately

equal to the current limit, which typically exceeds the

loop closure threshold. Thus, in the ground start appli-

cation, if RGDET trips, NSTAT will also trip. Under this

condition, via software, ignore the NSTAT transition.

Loop Range

The equation below can be rearranged to provide the

loop range for a required loop current:

VBAT – VOH

----------------------------

RL =

– 2RP – Rdc

I^L

24

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Power Derating

Applications (continued)

Thermal considerations can affect the choice of a

32-pin PLCC or a 44-pin PLCC package. Operating

temperature range, maximum current limit, maximum

battery voltage, minimum dc loop, and protection resis-

tor values will influence the overall thermal perfor-

mance. This section shows the relevant design

equations and considerations in evaluating the SLIC

thermal performance.

dc Applications (continued)

Ring Ground Detection

Pin ICM sinks a current proportional to the longitudinal

loop current. It is also connected to an internal compar-

ator whose output is pin RGDET. In a ground start

application where tip is open, the ring ground current is

half differential and half common mode. In this case, to

set the ring ground current threshold, connect a resis-

tor R^ICMfrom pin ICM to VCC. Select the resistor

according to the following relation:

First, consider the L8560 SLIC in a 44-pin PLCC pack-

age. The still-air thermal resistance is 47 °C/W; how-

ever, this number implies zero airflow as if the L8560

were totally enclosed in a box. A more realistic number

would be 43 °C/W. This is an experimental number that

represents a thermal impedance with no forced airflow

(i.e., from a muffin fan) but from the natural airflow as

seen in a typical switch cabinet.

VCC × 120

R^ICM(kΩ) = ---------------------

I^RG(mA)

The above equation is shown graphically in Figure 17.

It applies for the case of tip open. The more general

equation can be used in ground key applications to

detect a common-mode current ICM:

The SLIC will enter the thermal shutdown state at typi-

cally 165 °C. The thermal shutdown design should

ensure that the SLIC temperature does not reach

165 °C under normal operating conditions.

VCC × 60

R^ICM(kΩ) = ----------------------

ICM (mA)

Assume a maximum ambient operating temperature of

85 °C, a maximum current limit of 45 mA, and a maxi-

mum battery of –52 V. Further, assume a (worst case)

minimum dc loop of 100 Ω and that 100 Ω protection

resistors are used at both tip and ring.

Longitudinal Balance

The SLICs are graded with different codes to represent

different longitudinal balance specifications. The num-

bers are guaranteed by testing (Figures 5 and 8). How-

ever, for specific applications, the longitudinal balance

may also be determined by termination impedance,

protection resistance, and especially by the mismatch

between protection resistors at tip and ring. This can

be illustrated by:

1. T^TSD– TAMBIENT(max) = allowed thermal rise.

165 °C – 85 °C = 80 °C

2. Allowed thermal rise = package thermal

impedance • SLIC power dissipation.

80 °C = 43 °C/W • SLIC power dissipation

SLIC power dissipation (P^D) = 1.9 W

(368 + RP) × (368 + ZT – RP)

368 × (2 × [ZT – 2 × RP] × ∆ + ε)

Thus, if the total power dissipated in the SLIC is less

than 1.9 W, it will not enter the thermal shutdown state.

Total SLIC power is calculated as:

------------------------------------------------------------------------------------------

LB = 20 x log

where:

LB: longitudinal balance

RP: protection resistor value in Ω

Total P^D= maximum battery • maximum

current limit + SLIC quiescent power.

ZT: magnitude of the termination impedance in Ω

ε : protection resistor mismatch in Ω

∆: SLIC internal tip/ring sensing mismatch

For the L8560, SLIC quiescent power (P^Q) is approxi-

mated at 0.167 W. Thus,

Total P^D= (–52 V • 45 mA) + 0.167 W

Total P^D= 2.34 W + 0.167 W

Total P^D= 2.507 W

The ∆ can be calculated using the above equation with

these exceptions: ε = 0, ZT = 600 Ω, RP = 100 Ω, and

the longitudinal balance specification on a specific

code.

Now with ∆ available, the equation will predict the

actual longitudinal balance for RP, ZT, and ε .

Be aware that ZT may vary with frequency for complex

impedance applications.

Lucent Technologies Inc.

25

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Ignore the “+” term:

Applications (continued)

Power Derating (continued)

52 – 31.4

I^LIM=

------------------------ = 34 mA

600

Thus, 34 mA is the maximum allowable current limit in

the 32-pin PLCC package under the conditions given in

this example.

The power dissipated in the SLIC is the total power dis-

sipation less the power that is dissipated in the loop.

SLIC P^D= Total power – Loop power

Loop power = (I^LIM)²• (RLOOP(dc) min + 2RP)

Loop power = (45 mA)²• (100 Ω + 200 Ω)

Loop power = 0.61 W

This type of analysis should be performed under the

conditions of the user’s particular application to ensure

adequate thermal design.

SLIC power = 2.507 W – 0.61 W

SLIC power = 1.897 W < 1.9 W

Battery Switch

Thus, in this example, the thermal design ensures that

the SLIC will not enter the thermal shutdown state.

The L8560 SLIC provides an input for an auxiliary bat-

tery. Called V^BAT2, this power supply should be lower in

magnitude than the primary battery V^BAT1. Under an

acceptable loop condition, V^BAT2can be switched to

provide the loop power through the amplifiers of the

SLIC. The dc template, described in previous sections,

is determined by the battery that is active—either V^BAT1

or V^BAT2.

The next example uses the 32-pin PLCC package and

demonstrates the technique used to determine the

maximum allowed current.

In this example, assume a 0 °C to 70 °C operating

range. Thus,

T^TSD– TAMBIENT (max) = allowed thermal rise

165 °C – 70 °C = 95 °C

There are several important applications where use of

a lower-voltage battery in the off-hook state is desired

to provide dc current to the loop, yet a higher-voltage

battery is desired in on-hook or ringing modes. These

applications are typically short-loop applications, such

as an ISDN terminal adapter, fiber-in-the-loop applica-

tions, or a cable telephony interface.

To estimate the open-air thermal impedance, use the

43 °C/W parameter from the 44-pin PLCC and ratio the

lead count.

44

32

------

Thermal impedance (32-pin PLCC) = 48 °C/W •

= 59 °C/W

Typically, in these applications, the maximum dc loop

resistance (which includes the off-hook telephone

handset plus twisted-cable pair) is relatively low. For

example, Bellcore TA-909, Generic Requirements and

Objectives for Fiber in the Loop Systems, specifies that

in the off-hook state, 20 mA must be provided into a

430 Ω dc loop. To meet these requirements, a lower

battery in the off-hook condition is important to mini-

mize off-hook power consumption. Power conservation

is important from a cost of energy point of view and is

vital in remotely powered POTS interface applications.

Again:

Allowed thermal rise = thermal impedance • SLIC

power dissipation

95 °C = 59 °C/W • SLIC power dissipation

SLIC P^D= 1.6 W

In this example, again assume the dc loop + 2 • protec-

tion resistors = 300 Ω, then:

(I^LIM)(VBAT max) + PQ – (ILIM)²(Rdc + 2 RP) = 1.6 W

^I• 52 + 0.167 – I²300 = 1.6 W

300 I²– 52 I + 1.433 = 0

While use of a low-voltage battery in off-hook short dc

loops is important, certain on-hook applications, such

as providing a balanced power ring signal or maintain-

ing compatibility with certain CPE such as answering

machines, may require a higher magnitude battery.

This is a quadratic equation whose solution is in the

form:

–b ± b²– 4ac

---------------------------------------

2a

X =

With the logic-controlled battery switch, the L8560 is

able to provide a higher-voltage battery to meet on-

hook battery voltage requirements. At the same time,

the L8560 can accept a lower-voltage auxiliary battery

during short-loop, off-hook applications. If a dc/dc con-

verter with two fixed voltage outputs is used, tie the

battery voltage that is higher in magnitude to V^BAT1and

the voltage that is lower in magnitude to V^BAT2. If it is

52 ± 52²– (4)(300)(1.433)

I^LIM=

--------------------------------------------------------------------------------

2(300)

52 ± 31.4

-----------------------------

I^LIM=

600

26

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

with respect to PR or vice versa. If a square wave sig-

nal is added to B1, the SLIC will be operating consecu-

tively at battery forward, and then battery reversal. The

differential output at PT and PR can be a balanced

power ringing signal. Its frequency is equal to that of

the square wave at B1. Its slew rate is determined by

the size of the capacitors C^FB1and CFB2.

Applications (continued)

Battery Switch (continued)

desired to use a single battery supply or a dc/dc con-

verter with a single programmable voltage output, tie

V^BAT1to VBAT2 and connect the battery to this node.

Note that V^BAT1is forced during the balanced ringing

state.

If a sinusoidally modulated pulse-width-modulation

(PWM) signal is applied to B1, the differential output at

PT and PR will be sinusoidal. Theoretically, it provides

power ringing in a sinusoidal format. For more informa-

tion, please refer to the L8560 Sinusoidal Ringing Gen-

eration Using a PWM Input to B1 Application Note.

VCC/VEE Supplies

The L8560A/D/E/F SLICs are designed to operate

using battery and only a 5 V power supply. In this mode

of operation, power for the tip/ring drive amplifiers, dc

feedback loop, internal amplifiers, logic, ac, and refer-

ence circuits is drawn from the negative battery (and

5 V supply).

POTS for ISDN Terminal Adapters

The L8560 ringing SLIC is designed to provide a bal-

anced power ring signal to tip and ring. This mode of

operation is suited for short-loop, plain old telephone

service (POTS) applications, such as ISDN terminal

adapters (TA).

While the L8560A/D/E/F type devices offer very low

power dissipation in both the sleep and active states,

further reduction in power dissipation is possible by use

of battery and +5 V and –5 V power supplies. The

L8560C operates using battery, +5 V, and –5 V power

supplies. When the –5 V is used, the internal amplifi-

ers, logic, ac, and reference circuits draw power from

the negative –5 V supply, not the negative battery.

Since the magnitude of the –5 V supply is less than the

battery, power consumption is reduced. With the

L8560C, the tip/ring drive amplifiers and dc feedback

loop still draw power from the battery.

When ISDN was first visualized, it was thought that we

would all exchange our existing telephones for new,

full-feature ISDN phones. Digital technology would

drive these sets to very low costs. While this may hap-

pen in the future, the current demand is for the ISDN

TA to service a standard analog telephone. The chal-

lenges of this application are discussed here along with

a suggested solution.

Until recently, POTS has been the exclusive domain of

the service provider. Over its 100-year history, any

architectural change was always required to be com-

patible with the existing installed local loop plant and all

telephone sets.

Power Ringing

If this is the expectation of the TA, it would be capable

of being connected into the residence phone wiring to

drive every phone in the house. It would also be

designed with enough backup battery to provide unin-

terrupted service during electrical power interruptions.

In this case, adherence to a standard, such as

Bellcore’s TA-909, is recommended.

The L8560 ringing SLIC is designed with the capability

of generating balanced power ring signal to tip and

ring. Because the SLIC itself generates the power ring-

ing signal, no ring relay is needed in this mode of oper-

ation. Alternatively, the L8560 SLIC can also be used in

the more standard battery-backed, unbalanced ringing

application. In this case, the ring signal is generated by

a central ring generator and is bused to individual tip/

ring pairs. A ringing relay is used during ringing to dis-

connect the SLIC from, and apply the ring generator to,

the tip and ring pair.

For the case where a TA is only going to provide limited

service, the design can be made less costly by limiting

the scope of the device. An example of this limited

scope would be the provision of analog jacks for a FAX/

modem and a phone set near the TA in a home office

environment. A block diagram of a POTS design is out-

lined in Figure 28.

This section discusses in detail the use of the L8560

ringing SLIC in either mode of application.

Ringing SLIC Balanced Ring Signal Generation

The internal dc current source drives current into or

pulls current out from C^FB1and CFB2 depending on

whether the SLIC is operating at battery forward or at

battery reversal. The voltage at PT then will be positive

Lucent Technologies Inc.

27

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Power Ringing (continued)

TO ISDN

SERVICE

TO

TELEPHONE SET

XMT

SLIC

TDM

CODEC

DX, DR

CLK, FS

ISDN

TA

PROT.

RJ-11

RJ-45

RINGER

RCV

µP

DTMF

DECODER

12-3286

Figure 28. POTS Controlled from an ISDN Terminal Adapter

Power Ringing Load

80

Bellcore TA-909 specifies that a minimum 40 Vrms

must be delivered to a 5 REN ringing load of 1380 Ω +

40 µF. During the ringing state, V^BAT1is automatically

applied to the tip/ring power amplifiers. For 5 REN

load, it is recommended that V^BAT1be set to –65 Vdc.

Also during the power ring state, the dc current limit is

automatically boosted by a factor of 2.8 over the cur-

rent limit set by resistor R^PROG. Both of these factors

are necessary to ensure delivery of 40 Vrms to the

North American 5 REN ringing load of 1380 Ω + 40 µF.

60

40

20

0

–20

–40

–60

–80

0.00 0.04 0.08 0.12 0.16 0.20

0.02 0.06 0.10 0.14 0.18

TIME (s)

12-3346a (F)

Crest Factor

Note: Slew rate = 5.65 V/ms; trise = tfall = 23 ms; pwidth = 2 ms;

period = 50 ms.

The balanced trapezoidal ring signal is generated by

simply toggling the SLIC between the powerup state

forward and powerup reverse battery states. The state

change is done by applying a square wave (whose fre-

quency is the desired ring frequency) to logic input B1.

Capacitors FB1 and FB2 are used to control or ramp

the speed of the transition of the battery reverse, thus

shaping the balanced ring signal. Waveforms of crest

factors 1.6 and 1.2 are shown in Figure 29 and Figure

30.

Figure 29. Ringing Waveform Crest Factor = 1.6

80

60

40

20

0

In a real application, the ringing trapezoidal waveform

crest factor can be estimated by:

–20

–40

–60

1

------------------------------------------------------------------------------------------

Crest factor =

4 × f × CFB × ( VBAT – VOH)

–80

----------------------------------------------------------------------------

1 –

0.00 0.04 0.08 0.12 0.16 0.20

3 × ICS

0.02 0.06 0.10 0.14 0.18

TIME (s)

Where: f = ringing frequency; C^FB= (CFB1 + CFB2)/2;

I^CS= 29 µA @ ±8% accuracy over temperature;

V^OH= SLIC overhead during ring.

12-3347a (F)

Note: Slew rate = 10.83 V/ms; trise = tfall = 12 ms; pwidth = 13 ms;

period = 50 ms.

Figure 30. Ringing Waveform Crest Factor = 1.2

28

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

hook ringing current and off-hook current provide suffi-

cient voltage differential at DCOUT to distinguish that a

ring trip condition has occurred. The ring trip compara-

tor threshold is set via a resistor between the ring trip

comparator and ground.

Applications (continued)

Power Ringing (continued)

Current-Limit Switch

Output NSTAT is automatically set to detect ring trip

during the balanced ring mode. During quiet intervals

of ringing, output NSTAT is automatically determined

by the loop closure detector.

During nonringing modes, the internal current source is

set at 75 µA. During the ring mode, the current limit is

automatically increased by a factor of 2.8. This is done

to provide sufficient ring to a true North American 5

REN load. This is done internally by increasing the

value of I^PROGfrom 75 µA to 210 µA, thus:

The equivalent ring trip circuit for the balanced ringing

SLIC application is shown in Figure 31.

The equations governing ring trip are derived below.

I^PROG• RPROG = lLIM • BDCOUT

RPROG = lLIM • BDCOUT/IPROG

Capacitors C²and C4, in conjunction with resistors R2

and R⁴, form a double-pole, low-pass filter that

smooths the voltage seen at DCOUT. The poles of the

filters are determined by C²and C4. Where these poles

are set will influence both the ripple seen at DCOUT

and the speed of the transition of the voltage at

DCOUT from the pretrip to the tripped level. For the

derivation of the ring trip threshold equations, capaci-

tors C²and C4 can be ignored.

RPROG(K) = lLIM (mA) • 0.04167 (V/mA)/210e–3 (mA)

R^PROG(K) = 0.198 • lLIM (mA)

In the current-limit region, the dc template has a high

resistance (12.5 kΩ).

Ring Trip

Ring trip is accomplished by filtering the voltage seen

at node DCOUT and applying it to the integrated ring

trip comparator. DCOUT is a voltage proportional to the

tip/ring current, and under short dc loop conditions, on-

Redrawing the circuit, ignoring the capacitors, and tak-

ing the Thevenin equivalent circuit of the network at

RTSN gives the results shown below in Figure 32.

NLC

C4

RTSP

IP = IN

R4

NRDET

+

–

NSTAT

8.2 V

IN

R1

R3

R2

DCOUT

RTSN

15 kΩ

C2

12-3349.b (F)

Figure 31. Equivalent Ring Trip Circuit for Balanced Ringing SLIC

NLC

R4

RTSP

IP = IN

NRDET

+

–

NSTAT

8.2 V

IN

R2

(R3/[R1 + R3]) DCOUT

RTSN

15 kΩ

R1R3/(R1 + R3)

12-3348.b (F)

Figure 32. Thevenin Equivalent Ring Trip Circuit for Balanced Ringing SLIC

Lucent Technologies Inc.

29

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Power Ringing (continued)

R3

------------------

VDCOUT – (–8.2 V)

R3 + R1

I

RTSN =

---------------------------------------------------------------------

R1R3

+ R2 + 15 kΩ

------------------

R1 + R3

At the trip point, the internal current repeater will force I^RTSPto be equal to IRTSN and VRTSP will be equal to VRTSN,

which is –8.2 V. Thus, at the trip point:

0 – (–8.2)

IRTSN = IRTSP = -------------------------

R4

Thus:

R3

--------------------

VDCOUT + 8.2 V

R3 + R1

8.2 V

R4

---------------------------------------------------------------------- = -------------

R1R3

-------------------- + R2 + 15 kΩ

R1 + R3

Solving for V^DCOUT, the voltage at DCOUT at the ring trip point is given by:

1

R3

R1

R2

15 kΩ

------

V^DCOUT= 8.2(R3 + R1) ------------------------------------ + -------------- + ---------------- –

R1R4 + R3R4 R3R4 R3R4

(TRIP)

The loop current at ring trip is given by:

I^LOOP(TRIP)= (VDCOUT)/(βDCOUT)

For the L8560, the gain (β) at pin DCOUT is 41.67 V/A.

Capacitors C²and C4, along with resistors R2 and R4, respectively, form low-pass filters to filter the ac voltage seen

at DCOUT before it is applied to the ring trip comparator input. The lower the pole of the filter, the less the ripple,

but also the slower the state transition at NSTAT. Poles in the neighborhood of 2.5 Hz—3 Hz are suggested, as

given by:

1

-----------------------

f^LP=

2πR²C2

1

-----------------------

2πR⁴C4

In the reference designs discussed in the next section, the ring trip threshold is set for 50 mA with:

R¹= 210 kΩ

R²= 124 kΩ

C²= 0.1 µF

R³= 562 kΩ

R⁴= 351 kΩ

C⁴= 0.1 µF

Except for L8560CAU, the internal voltage for L8560CAU is –5.7 V. 133 kΩ should be used for R¹.

30

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Power Ringing (continued)

Reference Designs for ISDN TA Applications

A POTS circuit for reference design is shown in Figure 33. In Figure 33, the L8560 SLIC and T8503 codec are

used. The ac circuit is designed per Bellcore TA-909 with a 600 Ω resistive termination and hybrid circuit, with

the transmit gain set for –2 dB and the receive gain set for –4 dB. The T8503 codec is compatible with the T7237

U-interface transceiver and the T7256 SCNT1 interface.

R¹(RTS2)*

210 kΩ

SUPERVISION

C2

(RTSN)

0.1 µF

R3

(RTS3)

562 kΩ

OUTPUT

R4

C⁴

(CRTSP)

0.1 µF

(RTSP)

351 kΩ

R^LCTH

8.25 kΩ

R2

(RTSN)

124 kΩ

RX

71.5 kΩ

DCOUT

I^PROG

C^C1

0.1 µF

R^T6

60.4 kΩ

GSX

VFXIN

VITR

RPROG

DX

DR

14 kΩ

R^T3

R^HB1

PCM

HIGHWAY

165 kΩ

143 kΩ

C^C2

R^RCV

178 kΩ

0.1 µF

BR

B2

B1

B0

VFROP

CONTROL

INPUTS

RCVP

FSX

FSR

MCLK

SYNC

AND

CLOCK

R^GP2

1.21 kΩ

R^GP

41.2 kΩ

L8560A, D, E, F, G

RPT

30 Ω

CGP

220 pF

DGND

AGND

DGND

TIP

PT

R^GN

30.1 kΩ

CV^DD

0.1 µF

1

RCVN

2

6, 7

V^DD

VBAT

L7591

1/2 T8503

CODEC

RTG

4.32 kΩ

4

C^TG

27 pF^†

FGND

16

RING

TG

VTX

TX1

PR

R^PR

30 Ω

C^B2

0.1 µF

CF1

0.47 µF

CFB1

4.7 nF

C^FB2

4.7 nF

CBAT2

0.1 µF

CBS

CCC

0.22 µF 0.1 µF

CBAT1

0.1 µF

C^F2

0.1 µF

CST

0.1 µF

RST

100 Ω

12-3345.R (F)

* R1 = 133 kΩ for L8560C.

† Required only for L8560A/C versions.

Notes:

TX = –2 dB.

RX = –4 dB.

Termination = 600 Ω.

Hybrid balance = 600 Ω.

Figure 33. POTS Interface with Balanced Ringing Using L8560 SLIC and T8503 Codec

Lucent Technologies Inc.

31

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Power Ringing (continued)

Table 11. Parts List for Balanced Ringing Using T8503 Codec

Name

Value

Function

Integrated Circuits

SLIC

L8560

Subscriber line interface circuit (SLIC).

Protector

Codec

Fault Protection

RPT

L7591

T8503

Secondary protection.

First-generation codec.

30 Ω fusible

Overcurrent protection.

RPR

Power Supply

CBAT1

CBAT2

CCC

0.1 µF, 20%, 100 V

0.1 µF, 20%, 10 V

VBAT filter capacitor.

VCC filter capacitor.

0.47 µF, 20%, 100 V With CF2, improves idle-channel noise.

0.1 µF, 20%, 100 V With CF1, improves idle-channel noise.

0.22 µF, 20%, 100 V Slows battery switch transition.

CF1

CF2

CBS

0.1 µF, 20%, 10 V

100 Ω, 1%, 1/8 W

Loop stability.

CST

RST

dc Profile/Ringing

4.7 nF, 20%, 100 V

With CFB2, slows rate of forward/reverse battery transition. Sets crest factor of

balanced power ring signal.

CFB1

4.7 nF, 20%, 100 V

With CFB1, slows rate of forward/reverse battery transition. Sets crest factor of

balanced power ring signal.

CFB2

14 kΩ, 1%, 1/8 W

Sets dc loop current.

RPROG

ac Characteristics

4.32 kΩ, 1%, 1/8 W

Sets internal transmit path gain to 19.2.

ac/dc separation capacitor.

RTG

0.1 µF, 20%, 10 V

165 kΩ, 1%, 1/8 W

178 kΩ, 1%, 1/8 W

41.2 kΩ, 1%, 1/8 W

220 pF, 20%, 10 V

27 pF, 20%, 10 V

1.21 kΩ, 1%, 1/8 W

30.1 kΩ, 1%, 1/8 W

60.4 kΩ, 1%, 1/8 W

71.5 kΩ, 1%, 1/8 W

143 kΩ, 1%, 1/8 W

CB2

dc blocking capacitor.

CC1

dc blocking capacitor.

CC2

With RGP and RRCV, sets ac termination impedance.

With RGP and RT3, sets receive gain.

With RT3 and RRCV, sets ac termination impedance and receive gain.

Loop stability.

RT3

RRCV

RGP

CGP

Loop stability.

CTG*

RGP2

Loop stability.

Compensates for input bias offset at RCVN/RCVP.

With RX, sets transmit gain in codec.

With RT6, sets transmit gain in codec.

Sets hybrid balance.

RGN

RT6

RX

RHB1

Supervision

RLCTH

R1 (RTS2)^†

R2 (RTSN)

C2 (CRTSN)

R3 (RTS3)

R4 (RTSP)

C4 (CRTSP)

8.25 kΩ, 1%, 1/8 W

210 kΩ, 1%, 1/8 W

124 kΩ, 1%, 1/8 W

0.1 µF, 20%, 50 V

562 kΩ, 1%, 1/8 W

351 kΩ, 1%, 1/8 W

0.1 µF, 20%, 10 V

Sets loop closure (off-hook) threshold.

With R2, R3, and R4, sets ring trip threshold.

With R1, R3, and R4, sets ring trip threshold.

With R2, sets pole of low-pass ring trip sense filter.

With R1, R2, and R4, sets ring trip threshold.

With R1, R2, and R3, sets ring trip threshold.

With R4, sets pole of low-pass ring trip sense filter.

* Required for L8560A/L8560C version only.

† Use 133 kΩ for L8560C.

32

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

input. When ringing is being injected, no dc current

flows through R^TS1, so the RTSP input is at a lower

potential than R^TSN. When enough dc loop current

flows, the R^TSPinput voltage increases to trip the com-

parator. In Figure 34, a low-pass filter with a double

pole at 2 Hz was implemented to prevent false ring trip.

Applications (continued)

Design Considerations

Unbalanced Bused Ring Signal Application

The L8560 SLIC can also be used in the standard bat-

tery-backed, unbalanced ringing application. In this

case, the ring signal is generated by a central ring gen-

erator and is bused to individual tip/ring pairs. A ringing

relay is used during ringing to disconnect the SLIC

from, and apply the ring generator to, the tip and ring

pair.

The following example illustrates how the detection cir-

cuit in Figure 34 will trip at a 12.5 mA dc loop current

using a –48 V battery.

–8.2 V – (–48)

I^N= -------------------------------------

2.289 MΩ

= 17.4 µA

Ring Trip Detection

The current I^Nis repeated as IP in the positive compar-

ator input. The voltage at comparator input R^TSPis:

The ring trip circuit is a comparator that has a special

input section optimized for this application. The equiva-

lent circuit is shown in Figure 34, along with its use

in an application using unbalanced, battery-backed

ringing.

V^RTSP= VBAT + ILOOP(dc) x RTS1 + IP x RTSP

Using this equation and the values in the example, the

voltage at input R^TSPis –13.2 V during ringing injection

(I^LOOP(dc)= 0). Input RTSP is therefore at a level of 5 V

below R^TSN. When enough dc loop current flows

through R^TS1to raise its dc drop to 5 V, the comparator

will trip.

PHONE

HOOK SWITCH

RLOOP

In this example:

RC PHONE

5 V

I^LOOP(dc)= ----------------

402 Ω

RTSP

+

RTSP

= 12.5 mA

2 MΩ

NRDET

8.2 V

Except for L8560CAU, the internal voltage for

L8560CAU is –5.7 V.

IP = IN

IN

RTS1

402 Ω

CRTS1

0.022 µF

CRTS2

0.27 µF

+

–

Note that during ringing in this mode of operation, both

the NLC and NRDET circuits are active. During the

actual ringing, NRDET is connected and NLC is iso-

lated from tip and ring by the ring relay; thus, NSTAT

reflects the status at NRDET. During quiet intervals of

ringing, NLC is connected and NRDET is isolated from

tip and ring by the ring relay; thus, NSTAT reflects the

status at NLC. Thus, during ring cadence, the logic

input that drives the ring relay can be used as an indi-

cation as to whether NRDET or NLC appears at output

NSTAT.

RTS2

RTSN

–

RTSN

15 kΩ

2 MΩ

274 kΩ

VRING

VBAT

12-3014.c (F)

Figure 34. Ring Trip Equivalent Circuit and

Equivalent Application

A basic loop start reference circuit, using bused

ringing with the L8560 SLIC and T7504 first-generation

codec, is shown in Figure 35. This circuit is designed

for a 600 Ω resistive termination impedance and hybrid

balance. Transmit and receive gains are both set at

0 dB.

The comparator input voltage compliance is V^CCto

V^BAT, and the maximum current is 240 µA in either

direction. Its application is straightforward. A resistance

(R^TSN+ RTS2) in series with the RTSN input establishes a

current that is repeated in the R^TSPinput. A slightly

lower resistance (R^TSP) is placed in series with the RTSP

Lucent Technologies Inc.

33

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Considerations (continued)

C^ST

RST

0.1 µF

100 Ω

VBAT1

VBAT2

CBAT1

VCC

CCC

0.1 µF

CBAT2

0.1 µF

C^BS

0.22 µF

RPROG

RGX

4.32 kΩ

14 kΩ

CTG

IPROG VBAT1

VBAT2

BS1 BS2 VCC TG

27 pF*

DCOUT

RLCTH

V^TX

LCTH

CB2

0.1 µF

8.25 kΩ

TXI

RX

75.0 kΩ

CROWBAR

PROTECTOR

GSX

CC1

0.1 µF

R^T6

49.9 kΩ

RPT

TIP

VITR

TIP

–

VFXIN

50 Ω

L7581

RELAY

R^T3

174 kΩ

DX

DR

+

R^HB1

75.0 kΩ

PCM

HIGHWAY

+2.4 V

L8560

SLIC

R^RCV

100 kΩ

RPR

RING

V^FRO

RCVP

RING

C^C2

0.1 µF

50 Ω

RGP2

FSE

FSEP

MCLK

SYNC

AND

CLOCK

1.21 kΩ

RGP

41.2 kΩ

CROWBAR

PROTECTOR

R^TSP

C^GP

220 pF

2.0 MΩ

CONTROL

INPUTS

RTSP

ASEL

RCVN

CRTS1

0.022 µF

C^RTS2

0.27 µF

R^TS1

402 Ω

R^GN

29.4 kΩ

B1

B0

CONTROL

INPUTS

1/4 T7504

CODEC

RTSN

CF2

R^TS2

274 kΩ

R^TSN

2.0 MΩ

SUPERVISION

OUTPUTS

CF1

AGND

BGND NSTAT

V^RING

C^F1

0.47 µF

VBAT

CF2

0.1 µF

12-3550 (F)

* Required for L8560A/L8560C version only.

Notes:

TX = 0 dB.

RX = 0 dB.

Termination = 600 Ω.

Hybrid balance = 600 Ω.

Figure 35. Basic Loop Start Application Circuit Using T7504 Codec and Bused Ringing

34

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Considerations (continued)

Figure 36 shows the ground start application.

VCC

RGDET

RICM2

100 kΩ

71.5 kΩ

GROUND START

APPLICATION CIRCUIT

RGDET

ICM

CICM

0.47 µF

12-3547.a.c (F)

Figure 36. Ground Start Application Circuit

Table 12. Parts List for Loop Start with Bused Ringing and Ground Start Applications

Name

Value

Function

Integrated Circuits

SLIC

—

Crowbar protector*

L7581

Subscriber line interface circuit (SLIC).

Secondary protection.

Protector

Ringing Relay

Switches ringing signals.

First-generation codec.

Codec

T7504

Fault Protection

RPT

50 Ω PTC or fusible

Protection resistor.

RPR

Power Supply

CBAT1

CBAT2

CCC

0.1 µF, 20%, 100 V

0.1 µF, 20%, 10 V

0.47 µF, 20%, 100 V

0.1 µF, 20%, 100 V

0.22 µF, 20%, 100 V

0.1 µF, 20%, 10 V

100 Ω, 1%, 1/8 W

27 pF, 20%, 10 V

VBAT filter capacitor.

VCC filter.

CF1

With CF2, improves idle-channel noise.

With CF1, improves idle-channel noise.

Slows battery switch transition.

Loop stability.

CF2

CBS

CST

RST

Loop stability.

†

CTG

Loop stability.

dc Profile

RPROG

14 kΩ, 1%, 1/8 W

Sets dc loop current.

* Contact your Lucent Technologies account representative for protector recommendations. Choice of this (and all) component(s) should be

evaluated and confirmed by the customer prior to use in any field or laboratory system. Lucent does not recommend use of this part in the

field without performance verification by the customer. This device is suggested by Lucent for customer evaluation. The decision to use a

component should be based solely on customer evaluation.

† Required for L8560A/L8560C version only.

Lucent Technologies Inc.

35

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Considerations (continued)

Table 12. Parts List for Loop Start with Bused Ringing and Ground Start Applications (continued)

Name

Value

Function

ac Characteristics

RGX

4.32 kΩ, 1%, 1/8 W

0.1 µF, 20%, 10 V

174 kΩ, 1%, 1/8 W

100 kΩ, 1%, 1/8 W

41.2 kΩ, 1%, 1/8 W

220 pF, 20%, 10 V

1.21 kΩ, 1%, 1/8 W

29.4 kΩ, 1%, 1/8 W

0.1 µF, 20%, 10 V

49.9 kΩ, 1%, 1/8 W

75.0 kΩ, 1%, 1/8 W

Sets internal transmit path gain of 9.6.

ac/dc separation capacitor.

CB2

RT3

With RGP and RRCV, sets ac termination impedance.

With RGP and RT3, sets receive gain.

With RT3 and RRCV, sets ac termination impedance and receive gain.

Loop stability.

RRCV

RGP

CGP

RGP2

RGN

Loop stability.

Compensates for input bias offset at RCVN/RCVP.

dc blocking capacitor.

CC1

CC2

dc blocking capacitor.

RT6

With RX, sets transmit gain in codec.

With RT6, sets transmit gain in codec.

Sets hybrid balance.

RX

RHB1

Supervision

RLCTH

RTS1

8.25 kΩ, 1%, 1/8 W

402 Ω, 5%, 2 W

Sets loop closure (off-hook) threshold.

Ringing source series resistor.

RTS2

274 kΩ, 1%, 1/8 W

0.022 µF, 20%, 5 V

0.27 µF, 20%, 100 V

2 MΩ, 1%, 1/8 W

With CRTS2, forms first pole of a double pole, 2 Hz ring trip sense filter.

With RTSN and RTSP, forms second 2 Hz filter pole.

With RTS2, forms first 2 Hz filter pole.

CRTS1

CRTS2

RTSN

RTSP

Ground Start

CICM

With CRTS1 and RTSP, forms second 2 Hz filter pole.

With CRTS1 and RTSN, forms second 2 Hz filter pole.

0.47 µF, 20%, 10 V

100 kΩ, 20%, 1/8 W

71.5 kΩ, 1%, 1/8 W

Provides 60 Hz filtering for ring ground detection.

Digital output pull-up resistor.

RGDET

RICM2

Sets ring ground detection threshold.

36

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Considerations (continued)

Table 13 shows the design parameters of the application circuit shown in Figure 35. Components that are adjusted

to program these values are also shown.

Table 13. 600 Ω Design Parameters

Design Parameter

Loop Closure Threshold

Parameter Value

10 mA

Components Adjusted

RLCTH

RPROG

dc Loop Current Limit

dc Feed Resistance

25 mA

55 Ω

—

2-wire Signal Overload Level

ac Termination Impedance

Hybrid Balance Line Impedance

Transmit Gain

3.14 dBm

600 Ω

—

RT3, RGP, RRCV

RHB1

600 Ω

0 dB

RT6, RX

RRCV, RGP, RT3

Receive Gain

0 dB

Second-Generation Codecs

ac Design

This class of devices includes a microprocessor inter-

face for software control of the gains and hybrid bal-

ance. The hybrid balance is included in the device. ac

programmability adds application flexibility and saves

several passive components. It also adds several I/O

latches that are needed in the application. It does not

have the transmit op amp, since the transmit gain and

hybrid balance are set internally.

There are four key ac design parameters. Termination

impedance is the impedance looking into the 2-wire

port of the line card. It is set to match the impedance of

the telephone loop in order to minimize echo return to

the telephone set. Transmit gain is measured from the

2-wire port to the PCM highway, while receive gain is

done from the PCM highway to the transmit port.

Finally, the hybrid balance network cancels the

unwanted amount of the receive signal that appears at

the transmit port.

Third-Generation Codecs

At this point in the design, the codec needs to be

selected. The discrete network between the SLIC and

the codec can then be designed. Below is a brief codec

feature and selection summary.

This class of devices includes the gains, termination im-

pedance, and hybrid balance—all under microproces-

sor control. Depending on the device, it may or may not

include latches.

In the codec selection, increasing software control and

flexibility are traded for device cost. To help decide, it

may be useful to consider the following: Will the appli-

cation require only one value for each gain and imped-

ance? Will the board be used in different countries with

different requirements? Will several versions of the

board be built? If so, will one version of the board be

most of the production volume? Does the application

need only real termination impedance? Does the hybrid

balance need to be adjusted in the field?

First-Generation Codecs

These perform the basic filtering, A/D (transmit), D/A

(receive), and µ-law/A-law companding. They all have

an op amp in front of the A/D converter for transmit gain

setting and hybrid balance (cancellation at the summing

node). Depending on the type, some have differential

analog input stages, differential analog output stages,

and µ-law/A-law selectability. This generation of codec

has the lowest cost. It is most suitable for applications

with fixed gains, termination impedance, and hybrid bal-

ance.

Lucent Technologies Inc.

37

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

ac Design (continued)

ac equivalent circuits using a T7504 codec (V^CConly) are shown in Figures 37 and 38. Use the following two equa-

tions for Figure 37 below:

R^STP= 1 kΩ x {[RGP (kΩ) || RRCV (kΩ)]/24 (kΩ)}

C^STP= 270 pF/{[RGP (kΩ) || RRCV (kΩ)]/24 (kΩ)}

RX

VGSX

–0.400 V/mA

RT6

VFXIN

–

VITR

VFXIP

+

RT3

RHB1

RCVN

RCVP

–

ZT/R

+2.4 V

RP

TIP

AV = 4

AV = 1

RRCV

VFR

+

IT/R

+

CURRENT

SENSE

VS

ZT

VT/R

RGP

–

RSTP

CSTP

+

AV = –1

–

RP

RING

L8560 SLIC

1/2 T7504 CODEC

12-2554.p (F)

Figure 37. ac Equivalent Circuit Not Including Spare Op Amp

Use the following two equations for Figure 38 below:

R^STN= 1 kΩ x {[RGN (kΩ) || RRCV (kΩ)]/24 (kΩ)}

C^STN= 270 pF/{[RGN (kΩ) || RRCV (kΩ)]/24 (kΩ)}

ZT5

RX

VGSX

R^T5X

XMT

RT4

–

RT6

VITR

VFXIN

VFXIP

SN

AGND

–

+

RT3

RHB1

RRCV

RCVN

–

+

+2.4 V

R^P

ZT/R

TIP

AV = 4

A^V= 1

RCVP

VFRO

+

IT/R

+

CURRENT

SENSE

VS

ZT

VT/R

RSTN

CSTN

R^GN

–

+

RP

AV = –1

RING

–

L8560 SLIC

1/4 T7504 CODEC

12-3013.j (F)

Figure 38. ac Equivalent Circuit Including Spare Op Amp

38

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Hybrid balance:

R^X

RHB1

Design Examples

--------------

h^bal= 20log

– gtx × grcv

In the preceding examples, use of a first-generation

codec is shown. The equations for second- and third-

generation codecs are simply subsets of these. There

are two examples below. The first shows the simplest

circuit, which uses a minimum number of discrete com-

ponents to synthesize a real termination impedance.

The second example shows the use of the uncommit-

ted op amp to synthesize a complex termination. The

design has been automated in a DOS-based program,

available on request.

VGSX

--------------

VFR

To optimize the hybrid balance, the sum of the currents

at the VFX input of the codec op amp should be set to

0. The expression for ZHB becomes:

RX

RHB1(kΩ) = -------------------

gtx × grcv

Example 1, Real Termination

Example 2, Complex Termination

The following design equations refer to the circuit in

Figure 37. Use these to synthesize real termination

impedance.

For complex termination, the spare op amp may be

used (see Figure 38).

ZT5

RT4

3200

---------

zT = 2RP +

(

)

-----------------------------------

1 +

R^T3

RT3

Termination impedance:

+

-------- -----------

RGN RRCV

V^T/R

–IT/R

= 2R^P+ k(ZT5)

------------

zT =

8

3200

grcv = ----------------------------------------------------------------------------

zT = 2RP +

----------------------------------

1 +

R^RCVR^RCV

zT

R^T3

RT3

1 + ------------- + ------------- 1 + ----------

+

-------- -----------

RT3

RGN

ZT/R

RGP RRCV

Receive gain:

g^tx=

RX 400 Z^T5

RT5X

ZT5

RT5X

--------- ---------- ---------

------------- ---------------------------------------------------

×

1 +

+

VT/R

-----------

RT6 Z^T/RRT4

RT3 + RGN || RRCV

g^rcv=

VFR

8

The hybrid balance equation is the same as in Exam-

ple 1.

grcv =

------------------------------------------------------------------

R^RCVRRCV

zT

1 +

+

1 +

----------- -----------

--------

RT3

RGP

ZT/R

Example 3, Complex Termination Without Spare Op

Amp

Transmit gain:

VGSX

The gain shaping necessary for a complex termination

impedance may be done without using the spare op

amp by shaping across the Ax amplifier at nodes TG

and VTX. This is a recommended approach.

g^tx= ----------

VT/R

–RX 400

g^tx= -------- × --------

RT6

Z^T/R

Lucent Technologies Inc.

39

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

R^X/RT6: With other components set, the transmit gain

(for complex and resistive terminations) R^Xand RT6 are

varied to give specified transmit gain.

Applications (continued)

Design Examples (continued)

R^T3/RRCV/RGP: For both complex and resistive termina-

tions, the ratio of these resistors set the receive gain.

For resistive terminations, the ratio of these resistors

set the return loss characteristic. For complex termina-

tions, the ratio of these resistors set the low-frequency

return loss characteristic.

Complex Termination Impedance Design Example

Using L8560 Without Spare Op Amp

Complex termination is specified in the form:

R2

C^N/RN1/RN2: For complex terminations, these compo-

nents provide high-frequency compensation to the

return loss characteristic.

R1

C

5-6396(F)

For resistive terminations, these components are not

used and R^CVNis connected to ground via a resistor.

To work with this application, convert termination to the

form:

R^HB: Sets hybrid balance for all terminations.

R1´

Set Z^TG—gain shaping:

Z^TG= RTGP || RTGS + CGS which is a scaled version of

Z^T/R(the specified termination resistance) in the

R¹´ || R2´ + C´ form.

R2´ C´

5-6398(F)

where:

R^TGPmust be 4.32 kΩ to set SLIC transconductance to

400 V/A

R¹´ = R1 + R2

R1

R^TGP= 4.32 kΩ

-------

R2

R2´ =

(R1 + R2)

At dc, C^TGSand C´ are open.

R^TGP= M x R1´

C´ =

²C

R2

---------------------

R1 + R2

where M is the scale factor.

4320

--------------

M =

ac Interface Using First-Generation Codec

R¹′

R^TGP/RTGS/CGS (ZTG): These components give gain

shaping to get good gain flatness. These components

are a scaled version of the specified complex termina-

tion impedance.

It can be shown:

R^TGS= M x R2´

and

C′

M

Note for pure (600 Ω) resistive terminations, compo-

nents R^TGSand CGS are not used. Resistor RTGP is

used and is still 4.32 kΩ.

------

C^TGS=

40

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Examples (continued)

RTGS

CG

Rx

RTGP = 4.32 kΩ

–IT/R

0.1 µF

207.36

RT6

–

+

19.2

VTX

TXI

VITR

CODEC

OP AMP

CN

RT3

RHB

RN1

RCVN

RCVP

CODEC

OUTPUT

DRIVE

AMP

RRCV

RN2

RGP

5-6400.b (F)

Figure 39. Interface Circuit Using First-Generation Codec (Blocking Capacitors Not Shown)

Transmit Gain

T^{X (specified[dB])}is the specified transmit gain. 600 Ω is the

impedance at the PCM and R^EQis the impedance at

Transmit gain will be specified as a gain from T/R to

PCM, T^X(dB). Since PCM is referenced to 600 Ω and

assumed to be 0 dB, and in the case of T/R being refer-

enced to some complex impedance other than 600 Ω

resistive, the effects of the impedance transformation

must be taken into account.

600

Tip and ring. 20 log

represents the power

----------

R^EQ

loss/gain due to the impedance transformation.

Note in the case of a 600 Ω pure resistive termination

600

R^EQ

600

= 0.

---------

Again, specified complex termination impedance at T/R

is of the form:

at T/R 20 log

= 20 log

----------

600

Thus, there is no power loss/gain due to impedance

transformation and T^X(dB) = TX (specified[dB]).

R2

Finally, convert T^X(dB) to a ratio, gTX:

T^X(dB) = 20 log gTX

R1

C

5-6396(F)

The ratio of RX/RT6 is used to set the transmit gain:

First, calculate the equivalent resistance of this net-

work at the midband frequency of 1000 Hz.

RX

RT6

207.36

19.2

1

M

----------

= g^TX• ----------------- • ----

R^EQ=

with a quad Lucent codec such as T7504:

2

(2 πf) C1 R1R2²+ R1 + R2

2 πfR2 C1

-----------------------------------------------------------------------------

--------------------------------------------------

2

+

2

1 + (2 πf) R2 C1

R^X< 200 kΩ

Using R^EQ, calculate the desired transmit gain, taking

into account the impedance transformation:

600

T^X(dB) = TX (specified[dB]) + 20 log ----------

R^EQ

Lucent Technologies Inc.

41

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Next, solve for the high-frequency return loss compen-

sation circuit, C^N, RN1, and RN2:

Applications (continued)

Design Examples (continued)

2RP

3200

C^NRN2 = ------------ CG RTGP

Receive Gain

R^TGS

-------------

3200

2R^P

RN1 = RN2 ------------

– 1

Ratios of R^RCV, RT3, RGP will set both the low-frequency

termination and receive gain for the complex case. In

the complex case, additional high-frequency compen-

sation, via C^N, RN1, and RN2, is needed for the return

loss characteristic. For resistive termination, C^N, RN1,

and R^N2are not used and RCVN is tied to ground via a

resistor.

RTGP

There is an input offset voltage associated with nodes

R^CVNand RCVP. To minimize the effect of mismatch of

this voltage at T/R, the equivalent resistance to ac

ground at R^CVNshould be approximately equal to that

at R^CVP. Refer to Figure 40 on page 43 (with dc block-

ing capacitors). To meet this requirement, R^N2= RGP ||

R^T3.

Determine the receive gain, g^RCV, taking into account

the impedance transformation in a manner similar to

transmit gain.

Hybrid Balance

R^EQ

600

R^X(dB) = RX (specified[dB]) + 20 log

R^X(dB) = 20 log gRCV

----------

Set the hybrid cancellation via R^HB.

RX

gRCV × gTX

------------------------------

R^HB=

Then:

4

-----------------------------------------------

g^RCV=

R^RCVRRCV

--------------- ---------------

1 +

+

RT3

RGP

and low-frequency termination

3200

--------------------------------------------

Z^TER(low)=

+ 2RP

R^T3

RT3

----------- ---------------

1 +

+

RGP RRCV

ZTER(low) is the specified termination impedance assum-

ing low frequency (C or C´ is open).

R^Pis the series protection resistor.

These two equations are best solved using a computer

spreadsheet.

42

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Applications (continued)

Design Examples (continued)

Blocking Capacitors

RTGS

CGS

Rx

RTGP = 4.32 kΩ

–IT/R

CB1

0.1 µF

207.36

RT6

RT3

–

+

19.2

VTX

TXI

VITR

CODEC

OP AMP

CN

RHB

RN1

RCVN

RCVP

CB2

RRCV

RGP

2.5 V

RN2

CODEC

OUTPUT

DRIVE

AMP

5-6401b(F)

Figure 40. ac Interface Using First-Generation Codec (Including Blocking Capacitors) for Complex

Termination Impedance

If a 5 V only codec such as the Lucent T7504 is used, dc blocking capacitors must be added as shown in Figure

40. This is because the codec is referenced to 2.5 V and the SLIC to ground—with the ac coupling, a dc bias at

T/R is eliminated and power associated with this bias is not consumed.

Typically, values of 0.1 µF to 0.47 µF capacitors are used for dc blocking. The addition of blocking capacitors will

cause a shift in the return loss and hybrid balance frequency response toward higher frequencies, degrading the

lower-frequency response. The lower the value of the blocking capacitor, the more pronounced the effect is, but

the cost of the capacitor is lower. It may be necessary to scale resistor values higher to compensate for the

low-frequency response. This effect is best evaluated via simulation. A PSPICE* model for the L8560 is available.

Design equation calculations seldom yield standard component values. Conversion from the calculated value to

standard value may have an effect on the ac parameters. This effect should be evaluated and optimized via simu-

lation.

* PSPICE is a registered trademark of MicroSim Corporation.

Lucent Technologies Inc.

43

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Outline Diagrams

32-Pin PLCC

Dimensions are in millimeters.

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schemat-

ics to assist your design efforts, please contact your Lucent Technologies Sales Representative.

12.446 ± 0.127

11.430 ± 0.076

PIN #1 IDENTIFIER

ZONE

4

1

30

5

29

13.970

± 0.076

14.986

± 0.127

13

21

14

20

3.175/3.556

SEATING PLANE

0.10

0.38 MIN

TYP

1.27 TYP

0.330/0.533

5-3813r2 (F)

44

Lucent Technologies Inc.

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Outline Diagrams (continued)

44-Pin PLCC

Dimensions are in millimeters.

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schemat-

ics to assist your design efforts, please contact your Lucent Technologies Sales Representative.

17.65 MAX

16.66 MAX

PIN #1 IDENTIFIER

ZONE

6

1

40

7

39

16.66

MAX

17.65

MAX

29

17

18

28

4.57

MAX

SEATING PLANE

0.10

0.51 MIN

TYP

1.27 TYP

0.53

MAX

5-2506r.8(F)

Lucent Technologies Inc.

45

Data Sheet

April 2000

L8560 Low-Power SLIC with Ringing

Ordering Information

Device Code

LUCL8560AAU-D

LUCL8560AAU-DT

LUCL8560AP-D

Description

Package

Comcode

107957375

107957383

107891111

107891129

107953390

107953408

108130576

108130584

108133000

108133018

108190885

108190893

108190935

108190943

Low-power SLIC (Dry-bagged)

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

32-Pin PLCC

44-Pin PLCC

32-Pin PLCC

44-Pin PLCC

32-Pin PLCC

44-Pin PLCC

LUCL8560AP-DT

LUCL8560CAU-D

LUCL8560CAU-DT

LUCL8560DAU-D

LUCL8560DAU-DT

LUCL8560EP-D

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

LUCL8560EP-DT

LUCL8560FAU-D

LUCL8560FAU-DT

LUCL8560GP-D

LUCL8560GP-DT

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

Low-power SLIC (Tape and Reel, Dry-bagged)

Low-power SLIC (Dry-bagged)

Low-power SLIC (Tape and Reel, Dry-bagged)

For additional information, contact your Microelectronics Group Account Manager or the following:

INTERNET:

E-MAIL:

http://www.lucent.com/micro

docmaster@micro.lucent.com

N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103

1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106)

ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256

Tel. (65) 778 8833, FAX (65) 777 7495

CHINA:

Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai

200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652

JAPAN:

Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan

Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700

EUROPE:

Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148

Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot),

FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki),

ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid)

Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No

rights under any patent accompany the sale of any such product(s) or information.

April 2000

DS00-172ALC (Replaces DS99-124ALC)


型号：	LUCL8560CAU-D
厂家：	ETC
描述：	Subscriber Line Interface Circuit 用户线接口电路\n 电池电信集成电路
文件：	总46页 (文件大小：1022K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LUCL8560CAU-D [ETC]

相关型号：

LUCL8560CAU-DT

LUCL8560DAU-D

LUCL8560DAU-DT

LUCL8560EP-D

LUCL8560EP-DT

LUCL8560FAU-D

LUCL8560FAU-DT

LUCL8560GP-D

LUCL8560GP-DT

LUCL8567AAU-D

LUCL8567AAU-DT

LUCL8567AP-D