LDT3906 [ETC]
TRANSISTOR | BJT | PNP | 40V V(BR)CEO | 200MA I(C) | LID ; 晶体管| BJT | PNP | 40V V( BR ) CEO | 200MA I(C ) | LID\n型号: | LDT3906 |
厂家: | ETC |
描述: | TRANSISTOR | BJT | PNP | 40V V(BR)CEO | 200MA I(C) | LID
|
文件: | 总4页 (文件大小:67K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRODUCT DATA
Micro International, Inc
PART NUMBER
LDT3906 and LDT3906T
Micro-LID PNP Transistor
Micro International, Inc.
179-204 Belle Forrest Circle
Nashville, TN 37221
Tel: 615-662-1200 Fax 615-662-1226
www.microlid.com sales@microlid.com
Micro-LID Transistors
LDT3906 and LDT3906T
Description:
The LDT3906 (untinned) and LDT3906T (tinned) are PNP silicon transistors in
very small, rugged, surface mount, 4-post ceramic packages (Micro International
manufactured package p/n 4-075-1). The LDT3906 and LDT3906T meet the
general specifications of the 2N3906 transistor. The 4-075-1 Micro-LID package
is a 4-post, leadless ceramic carrier which can be provided with gold metallized
or pre-tinned lands, and is approved for military, medical implant, sensor, and
high reliability applications. The LDT3906 and LDT3906T can be provided with
special feature options such as additional temperature cycling and screening.
Maximum Ratings:
Parameter
Symbol
Vcbo
Vceo
Vebo
Ic
Rating
40 V
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current
40 V
5 V
200 mA
350 mW
150°C
Total Dissipation
Pt
Operating Junction Temperature
Storage Temperature
Operating Temperature
Tj
Tstg
Toper
-65°C to 150°C
-55°C to 125°C
1/3 January 1997
www.microlid.com sales@microlid.com
Micro-LID Transistors
LDT3906 and LDT3906T
______________________________________________________________________________________
Outline / Schematic:
TOP VIEW
3, 4
3
4
2
1
2
.040
1
.075
END VIEW
SIDE VIEW
.035
SUBSTRATE / CIRCUIT BOARD
Dimensions / Marking:
Length
Width
Height
.075¢¢ + .003¢¢
.040¢¢ + .003¢¢
.035¢¢ + .003¢¢
Post 1 (Emitter)
Post 2 (Base)
Post 3,4 (Collector)
.015¢¢ x .010¢¢ typ
.015¢¢ x .010¢¢ typ
.015¢¢ x .012¢¢ typ
Marking on back of package : Black Dot over Emitter and Red Dot in Center
(post down configuration)
Standard In-Process Screening Requirements:
Ø
Ø
Ø
Ø
Ø
Ø
Semiconductor die and Micro-LID package visual inspection
Wire pull test
24 hour stabilization bake at 150°C
10 temperature cycles from –55°C to 125°C
100% electrical test of dc characteristics at 25°C
Final visual inspection
________________________________________________________________
2/3 January 1997
www.microlid.com sales@microlid.com
Micro-LID Transistors
LDT3906 and LDT3906T
Electrical Characteristics (25°C Ambient)
Parameter
Symbol
Min Typ Max Units
Collector-Base Breakdown
Ic = 100 uA, Ie = 0
BVcbo
40
40
5
--
--
--
--
--
--
--
--
--
--
V
V
Collector-Emitter Breakdown*
Ib = 0, Ic = 1 mA
BVceo
BVebo
Icbo
--
Emitter-Base Breakdown
Ic = 0, Ie = 10 uA
--
V
Collector-Base Cutoff Current
Vcb = 30 V
--
50
50
300
.25
.9
nA
nA
Emitter-Base Cutoff Current
Veb = 3 V
Iebo
--
DC Forward Current Gain*
Ic = 10 mA, Vce = 1 V
Hfe
100
--
Collector-Emitter Saturation
Ic = 10 mA, Ib = 1 mA
Vce (sat)
Vbe (sat)
Cobo
V
Base-Emitter Saturation
Ic = 10 mA, Ib = 1 mA
--
V
Collector Capacitance
Vcb = 10 V, Ie = 0
f = 1 MHz
--
4.5
pF
* Pulse test, pulse width < 300 usec, duty cycle < 2%
3/3 January 1997
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