HN1B01FDW1T1/D [ETC]

Complementary Dual General Purpose Amplifier Transistor ; 互补的双通用放大器晶体管
HN1B01FDW1T1/D
型号: HN1B01FDW1T1/D
厂家: ETC    ETC
描述:

Complementary Dual General Purpose Amplifier Transistor
互补的双通用放大器晶体管

晶体 放大器 晶体管
文件: 总8页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HN1B01FDW1T1  
Complementary Dual  
General Purpose  
Amplifier Transistor  
PNP and NPN Surface Mount  
http://onsemi.com  
High Voltage and High Current: V  
= 50 V, I = 200 mA  
CEO  
C
High h : h = 200X400  
FE FE  
(6)  
(5)  
(4)  
Q
Moisture Sensitivity Level: 1  
ESD Rating - Human Body Model: 3A  
ESD Rating - Machine Model: C  
Q
1
2
MAXIMUM RATINGS (T = 25°C)  
A
Rating  
Symbol  
Value  
60  
Unit  
Vdc  
(1)  
(2)  
(3)  
Collector-Base Voltage  
Collector-Emitter Voltage  
Emitter-Base Voltage  
V
(BR)CBO  
(BR)CEO  
(BR)EBO  
V
V
50  
Vdc  
7.0  
Vdc  
4
5
6
Collector Current - Continuous  
I
C
200  
mAdc  
3
THERMAL CHARACTERISTICS  
2
1
Characteristic  
Power Dissipation  
Symbol  
Max  
380  
Unit  
mW  
°C  
SC-74  
CASE 318F  
STYLE 3  
P
D
Junction Temperature  
Storage Temperature  
T
J
150  
T
stg  
- 55 to +150  
°C  
MARKING DIAGRAM  
R9  
M
R9 = Specific Device Code  
= Date Code  
M
ORDERING INFORMATION  
{
Device  
Package  
Shipping  
3000/Tape & Reel  
HN1B01FDW1T1  
SC-74  
†The “T1” suffix refers to a 7 inch reel.  
Semiconductor Components Industries, LLC, 2003  
Publication Order Number:  
HN1B01FDW1T1/D  
May, 2003 - Rev. 1  
HN1B01FDW1T1  
Q1: PNP  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
-50  
-60  
-7.0  
-
Max  
Unit  
Vdc  
Collector-Emitter Breakdown Voltage (I = 2.0 mAdc, I = 0)  
V
-
C
B
(BR)CEO  
(BR)CBO  
(BR)EBO  
Collector-Base Breakdown Voltage (I = 10 mAdc, I = 0)  
V
V
-
-
Vdc  
C
E
Emitter-Base Breakdown Voltage (I = 10 mAdc, I = 0)  
Vdc  
E
C
Collector-Base Cutoff Current (V = 45 Vdc, I = 0)  
I
I
-0.1  
mAdc  
CB  
E
CBO  
Collector-Emitter Cutoff Current  
(V = 10 Vdc, I = 0)  
CEO  
-
-
-
-0.1  
-2.0  
-1.0  
mAdc  
mAdc  
mAdc  
CE  
B
(V = 30 Vdc, I = 0)  
CE  
B
(V = 30 Vdc, I = 0, T = 80°C)  
CE  
B
A
DC Current Gain (Note 1)  
(V = 6.0 Vdc, I = 2.0 mAdc)  
h
-
FE  
-200  
-400  
-0.3  
CE  
C
Collector-Emitter Saturation Voltage (I = 100 mAdc, I = 10 mAdc)  
V
-0.15  
Vdc  
C
B
CE(sat)  
Q2: NPN  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Characteristic  
Symbol  
Min  
50  
60  
7.0  
-
Max  
Unit  
Vdc  
Collector-Emitter Breakdown Voltage (I = 2.0 mAdc, I = 0)  
V
-
-
C
B
(BR)CEO  
(BR)CBO  
(BR)EBO  
Collector-Base Breakdown Voltage (I = 10 mAdc, I = 0)  
V
V
Vdc  
C
E
Emitter-Base Breakdown Voltage (I = 10 mAdc, I = 0)  
-
Vdc  
E
C
Collector-Base Cutoff Current (V = 45 Vdc, I = 0)  
I
I
0.1  
mAdc  
CB  
E
CBO  
Collector-Emitter Cutoff Current  
(V = 10 Vdc, I = 0)  
CEO  
-
-
-
0.1  
2.0  
1.0  
mAdc  
mAdc  
mAdc  
CE  
B
(V = 30 Vdc, I = 0)  
CE  
B
(V = 30 Vdc, I = 0, T = 80°C)  
CE  
B
A
DC Current Gain (Note 1)  
(V = 6.0 Vdc, I = 2.0 mAdc)  
h
FE  
-
200  
400  
CE  
C
Collector-Emitter Saturation Voltage (I = 100 mAdc, I = 10 mAdc)  
V
CE(sat)  
0.15  
0.25  
Vdc  
C
B
1. Pulse Test: Pulse Width 300 ms, D.C. 2%.  
http://onsemi.com  
2
HN1B01FDW1T1  
Typical Electrical Characteristics: PNP Transistor  
-200  
1000  
-1.5 mA  
-2.0 mA  
-160  
-120  
-80  
-1.0 mA  
T = 100°C  
A
25°C  
-25 °C  
-0.5 mA  
100  
I
B
= -0.2 mA  
-40  
T = 25°C  
A
V
CE  
= -1.0 V  
0
10  
0
-1  
-2  
-3  
-4  
-5  
-6  
-1  
-10  
-100  
-1000  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (V)  
I , COLLECTOR CURRENT (mA)  
C
Figure 1. Collector Saturation Region  
Figure 2. DC Current Gain  
1000  
-1  
I /I = 10  
C
B
T = 100°C  
A
T = 100°C  
A
25°C  
25°C  
-25 °C  
-25 °C  
100  
-0.1  
V
CE  
= -6.0 V  
10  
-1  
-0.01  
-10  
-100  
-1000  
-1  
-10  
-100  
-1000  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 3. DC Current Gain  
Figure 4. VCE(sat) versus IC  
-10  
-10,000  
COMMON EMITTER  
= 6 V  
25°C  
V
CE  
T = 100°C  
A
-1000  
-100  
-10  
-25 °C  
-1  
-1  
T = 25°C  
A
I /I = 10  
C
B
-0.1  
-0.1  
-1  
-10  
-100  
-1000  
0
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1  
, BASE-EMITTER VOLTAGE (V)  
I , COLLECTOR CURRENT (mA)  
V
BE  
C
Figure 5. VBE(sat) versus IC  
Figure 6. Base-Emitter Voltage  
http://onsemi.com  
3
HN1B01FDW1T1  
Typical Electrical Characteristics: NPN Transistor  
280  
1000  
6.0 mA  
5.0 mA  
2.0 mA  
3.0 mA  
240  
200  
160  
120  
80  
T = 100°C  
A
25°C  
-25 °C  
1.0 mA  
100  
0.5 mA  
I
B
= 0.2 mA  
40  
0
V
CE  
= 1.0 V  
T = 25°C  
A
10  
0
1
2
3
4
5
6
1
10  
100  
1000  
V
CE  
, COLLECTOR-EMITTER VOLTAGE (V)  
I , COLLECTOR CURRENT (mA)  
C
Figure 7. Collector Saturation Voltage  
Figure 8. DC Current Gain  
1000  
1
I /I = 10  
C
B
T = 100°C  
A
25°C  
-25 °C  
T = 100°C  
A
25°C  
100  
0.1  
-25 °C  
V
CE  
= 6.0 V  
10  
0.01  
1
10  
100  
1000  
1
10  
100  
1000  
I , COLLECTOR CURRENT (mA)  
C
I , COLLECTOR CURRENT (mA)  
C
Figure 9. DC Current Gain  
Figure 10. VCE(sat) versus IC  
10  
10,000  
COMMON EMITTER  
= 6 V  
25°C  
V
T = 100°C  
A
CE  
1000  
100  
10  
-25 °C  
1
1
T = 25°C  
A
I /I = 10  
C
B
0.1  
0.1  
1
10  
100  
1000  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9  
, BASE-EMITTER VOLTAGE (V)  
1
I , COLLECTOR CURRENT (mA)  
V
BE  
C
Figure 11. VBE(sat) versus IC  
Figure 12. Base-Emitter Voltage  
http://onsemi.com  
4
HN1B01FDW1T1  
INFORMATION FOR USING THE SC-74 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the  
total design. The footprint for the semiconductor packages  
must be the correct size to ensure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self-align when  
subjected to a solder reflow process.  
0.094  
2.4  
0.037  
0.95  
0.074  
1.9  
0.037  
0.95  
0.028  
0.7  
0.039  
1.0  
inches  
mm  
SC-74  
SC-74 POWER DISSIPATION  
The power dissipation of the SC-74 is a function of the  
one can calculate the power dissipation of the device which  
in this case is 380 milliwatts.  
pad size. This can vary from the minimum pad size for  
soldering to a pad size given for maximum power  
dissipation. Power dissipation for a surface mount device is  
150°C - 25°C  
PD =  
= 380 milliwatts  
329°C/W  
determined by T  
, the maximum rated junction  
J(max)  
temperature of the die, R , the thermal resistance from  
the device junction to ambient, and the operating  
qJA  
The 329°C/W for the SC-74 package assumes the use of  
the recommended footprint on a glass epoxy printed circuit  
board to achieve a power dissipation of 380 milliwatts.  
There are other alternatives to achieving higher power  
dissipation from the SC-74 package. Another alternative  
would be to use a ceramic substrate or an aluminum core  
board such as Thermal Clad . Using a board material such  
as Thermal Clad, an aluminum core board, the power  
dissipation can be doubled using the same footprint.  
temperature, T . Using the values provided on the data  
A
sheet for the SC-74 package, P can be calculated as  
D
follows:  
TJ(max) - TA  
Rq  
PD =  
JA  
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values  
into the equation for an ambient temperature T of 25°C,  
A
SOLDER STENCIL GUIDELINES  
Prior to placing surface mount components onto a printed  
circuit board, solder paste must be applied to the pads.  
Solder stencils are used to screen the optimum amount.  
These stencils are typically 0.008 inches thick and may be  
made of brass or stainless steel. For packages such as the  
SC-59, SC-74, SC-70/SOT-323, SOD-123, SOT-23,  
SOT-143, SOT-223, SO-8, SO-14, SO-16, and SMB/SMC  
diode packages, the stencil opening should be the same as  
the pad size or a 1:1 registration.  
http://onsemi.com  
5
HN1B01FDW1T1  
SOLDERING PRECAUTIONS  
The melting temperature of solder is higher than the rated  
The soldering temperature and time should not exceed  
260°C for more than 10 seconds.  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
Always preheat the device.  
The delta temperature between the preheat and  
soldering should be 100°C or less.*  
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering  
method, the difference should be a maximum of 10°C.  
When shifting from preheating to soldering, the  
maximum temperature gradient should be 5°C or less.  
After soldering has been completed, the device should  
be allowed to cool naturally for at least three minutes.  
Gradual cooling should be used since the use of forced  
cooling will increase the temperature gradient and will  
result in latent failure due to mechanical stress.  
Mechanical stress or shock should not be applied  
during cooling.  
* Soldering a device without preheating can cause excessive  
thermal shock and stress which can result in damage to the  
device.  
TYPICAL SOLDER HEATING PROFILE  
For any given circuit board, there will be a group of  
control settings that will give the desired heat pattern. The  
operator must set temperatures for several heating zones  
and a figure for belt speed. Taken together, these control  
settings make up a heating “profile” for that particular  
circuit board. On machines controlled by a computer, the  
computer remembers these profiles from one operating  
session to the next. Figure 13 shows a typical heating  
profile for use when soldering a surface mount device to a  
printed circuit board. This profile will vary among  
soldering systems, but it is a good starting point. Factors  
that can affect the profile include the type of soldering  
system in use, density and types of components on the  
board, type of solder used, and the type of board or  
substrate material being used. This profile shows  
temperature versus time. The line on the graph shows the  
actual temperature that might be experienced on the surface  
of a test board at or near a central solder joint. The two  
profiles are based on a high density and a low density  
board. The Vitronics SMD310 convection/infrared reflow  
soldering system was used to generate this profile. The type  
of solder used was 62/36/2 Tin Lead Silver with a melting  
point between 177-189 °C. When this type of furnace is  
used for solder reflow work, the circuit boards and solder  
joints tend to heat first. The components on the board are  
then heated by conduction. The circuit board, because it has  
a large surface area, absorbs the thermal energy more  
efficiently, then distributes this energy to the components.  
Because of this effect, the main body of a component may  
be up to 30 degrees cooler than the adjacent solder joints.  
STEP 1  
STEP 2 STEP 3  
VENT HEATING  
SOAK" ZONES 2 & 5 ZONES 3 & 6 ZONES 4 & 7  
STEP 4  
HEATING  
STEP 5  
HEATING  
STEP 6  
VENT  
STEP 7  
COOLING  
PREHEAT  
ZONE 1  
RAMP"  
RAMP"  
SOAK"  
SPIKE"  
205° TO 219°C  
PEAK AT  
SOLDER JOINT  
170°C  
200°C  
150°C  
DESIRED CURVE FOR HIGH  
MASS ASSEMBLIES  
160°C  
150°C  
SOLDER IS LIQUID FOR  
40 TO 80 SECONDS  
(DEPENDING ON  
140°C  
100°C  
MASS OF ASSEMBLY)  
100°C  
50°C  
DESIRED CURVE FOR LOW  
MASS ASSEMBLIES  
TIME (3 TO 7 MINUTES TOTAL)  
T
MAX  
Figure 13. Typical Solder Heating Profile  
http://onsemi.com  
6
HN1B01FDW1T1  
PACKAGE DIMENSIONS  
SC-74  
CASE 318F-05  
ISSUE K  
NOTES:  
1. DIMENSIONING AND TOLERANCING  
PER ANSI Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. MAXIMUM LEAD THICKNESS INCLUDES  
LEAD FINISH THICKNESS. MINIMUM  
LEAD THICKNESS IS THE MINIMUM  
THICKNESS OF BASE MATERIAL.  
4. 318F-01, -02, -03 OBSOLETE. NEW  
STANDARD 318F-04.  
A
L
6
5
2
4
B
S
1
INCHES  
DIM MIN MAX  
MILLIMETERS  
3
MIN  
2.90  
1.30  
0.90  
0.25  
0.85  
0.013  
0.10  
0.20  
1.25  
0
MAX  
3.10  
1.70  
1.10  
0.50  
1.05  
0.100  
0.26  
0.60  
1.65  
10  
A
B
C
D
G
H
J
0.1142 0.1220  
0.0512 0.0669  
0.0354 0.0433  
0.0098 0.0197  
0.0335 0.0413  
0.0005 0.0040  
0.0040 0.0102  
0.0079 0.0236  
0.0493 0.0649  
D
G
M
J
K
L
C
0.05 (0.002)  
M
S
0
10  
0.0985 0.1181  
_
_
_
_
2.50  
3.00  
K
H
STYLE 3:  
PIN 1. EMITTER 1  
2. BASE 1  
3. COLLECTOR 2  
4. EMITTER 2  
5. BASE 2  
6. COLLECTOR 1  
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7
HN1B01FDW1T1  
Thermal Clad is a registered trademark of the Bergquist Company  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make  
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any  
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all  
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death  
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051  
Phone: 81-3-5773-3850  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada  
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800-282-9855 Toll Free USA/Canada  
HN1B01FDW1T1/D  

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