HGTP7N60C3DS9A [ETC]
TRANSISTOR | IGBT | N-CHAN | 600V V(BR)CES | 14A I(C) | TO-263AB ; 晶体管| IGBT | N -CHAN | 600V V( BR ) CES | 14A I(C ) | TO- 263AB\n型号: | HGTP7N60C3DS9A |
厂家: | ETC |
描述: | TRANSISTOR | IGBT | N-CHAN | 600V V(BR)CES | 14A I(C) | TO-263AB
|
文件: | 总9页 (文件大小:219K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HGTP7N60C3D, HGT1S7N60C3DS
TM
Data Sheet
November 2000
File Number 4150.3
14A, 600V, UFS Series N-Channel IGBT
with Anti-Parallel Hyperfast Diodes
Features
o
• 14A, 600V at T = 25 C
C
The HGTP7N60C3D and HGT1S7N60C3DS are MOS
gated high voltage switching devices combining the best
features of MOSFETs and bipolar transistors. These devices
have the high input impedance of a MOSFET and the low
on-state conduction loss of a bipolar transistor. The much
lower on-state voltage drop varies only moderately between
25 C and 150 C. The IGBT used is developmental type
TA49115. The diode used in anti-parallel with the IGBT is
developmental type TA49057.
• 600V Switching SOA Capability
o
• Typical Fall Time. . . . . . . . . . . . . . . . 140ns at T = 150 C
J
• Short Circuit Rating
• Low Conduction Loss
• Hyperfast Anti-Parallel Diode
o
o
Packaging
JEDEC TO-220AB
The IGBT is ideal for many high voltage switching applications
operating at moderate frequencies where low conduction losses
are essential, such as: AC and DC motor controls, power
supplies and drivers for solenoids, relays and contactors.
EMITTER
COLLECTOR
GATE
COLLECTOR (FLANGE)
Formerly Developmental Type TA49121.
Ordering Information
PART NUMBER
PACKAGE
TO-220AB
TO-263AB
BRAND
G7N60C3D
G7N60C3D
HGTP7N60C3D
JEDEC TO-263AB
HGT1S7N60C3DS
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in tape and reel, i.e. HGT1S7N60C3DS9A.
COLLECTOR
(FLANGE)
GATE
Symbol
EMITTER
C
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
1
HGTP7N60C3D, HGT1S7N60C3DS
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified
C
HGTP7N60C3D, HGT1S7N60C3DS
UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BV
600
V
CES
Collector Current Continuous
o
At T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
14
A
A
A
A
V
V
C25
C110
(AVG)
o
At T = 110 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
7
o
Average Diode Forward Current at 110 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
8
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
56
CM
GES
GEM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
±20
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
o
±30
Switching Safe Operating Area at T = 150 C (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA
J
40A at 480V
o
Power Dissipation Total at T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
C
60
W
D
o
o
Power Dissipation Derating T > 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.487
W/ C
C
o
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . T , T
-40 to 150
C
J
STG
o
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
260
1
C
L
SC
SC
Short Circuit Withstand Time (Note 2) at V
Short Circuit Withstand Time (Note 2) at V
= 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t
= 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t
µs
µs
GE
8
GE
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
o
2. V
= 360V, T = 125 C, R = 50Ω.
J G
CE(PK)
o
Electrical Specifications
T = 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
BV
TEST CONDITIONS
= 250µA, V = 0V
MIN
TYP
-
MAX
-
UNITS
V
Collector to Emitter Breakdown Voltage
Collector to Emitter Leakage Current
I
600
CES
C
GE
CES
CES
o
I
V
V
= BV
= BV
T
T
T
T
T
= 25 C
-
-
-
250
2.0
2.0
2.4
6.0
±250
-
µA
mA
V
CES
CE
CE
C
C
C
C
C
o
= 150 C
-
o
Collector to Emitter Saturation Voltage
V
I
= I
,
= 25 C
-
1.6
1.9
5.0
-
CE(SAT)
C
C110
= 15V
V
o
GE
= 250µA, V = V
CE GE
= 150 C
-
V
o
Gate-Emitter Threshold Voltage
Gate-Emitter Leakage Current
Switching SOA
V
I
= 25 C
3.0
-
V
GE(TH)
C
I
V
= ±25V
nA
A
GES
SSOA
GE
o
T = 150 C, R = 50Ω,
V
V
= 480V
40
6
-
-
J
G
CE(PK)
V
= 15V, L = 1mH
GE
= 600V
-
-
A
CE(PK)
Gate to Emitter Plateau Voltage
On-State Gate Charge
V
I
I
= I
, V
C110 CE
= 0.5 BV
CES
8
-
V
GEP
C
Q
= I
,
V = 15V
GE
-
23
30
8.5
11.5
350
140
165
600
1.9
25
18
-
30
38
-
nC
nC
ns
ns
ns
ns
µJ
µJ
V
G(ON)
C
C110
V
= 0.5 BV
CE
CES
V
= 20V
-
GE
o
Current Turn-On Delay Time
Current Rise Time
t
T = 150 C
-
d(ON)I
J
I
V
V
R
= I
CE
C110
t
-
-
rI
= 0.8 BV
CE(PK)
CES
Current Turn-Off Delay Time
Current Fall Time
t
-
400
275
-
d(OFF)I
= 15V
GE
t
-
= 50Ω
fI
G
L = 1mH
Turn-On Energy
E
-
ON
Turn-Off Energy (Note 3)
Diode Forward Voltage
Diode Reverse Recovery Time
E
-
-
OFF
V
I
I
I
= 7A
-
2.5
37
30
2.1
2.0
EC
EC
EC
EC
t
= 7A, dI /dt = 200A/µs
EC
-
ns
ns
rr
= 1A, dI /dt = 200A/µs
EC
-
o
Thermal Resistance
NOTE:
R
IGBT
-
C/W
θJC
o
Diode
-
-
C/W
3. Turn-Off Energy Loss (E
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
OFF
at the point where the collector current equals zero (I
= 0A). The HGTP7N60C3D and HGT1S7N60C3DS were tested per JEDEC standard
CE
No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Turn-On losses include diode losses.
2
HGTP7N60C3D, HGT1S7N60C3DS
Typical Performance Curves
40
40
DUTY CYCLE <0.5%, V
CE
PULSE DURATION = 250µs
= 10V
PULSE DURATION = 250µs,
DUTY CYCLE <0.5%,
C
12.0V
35
30
25
20
15
o
35
T
= 25 C
10.0V
30
25
o
V
= 15.0V
T
T
T
= 150 C
GE
C
C
C
20
15
10
o
9.0V
8.5V
= 25 C
o
= -40 C
10
8.0V
7.5V
5
0
5
0
7.0V
4
6
8
10
12
14
0
2
4
6
8
10
V
, GATE TO EMITTER VOLTAGE (V)
GE
V , COLLECTOR TO EMITTER VOLTAGE (V)
CE
FIGURE 1. TRANSFER CHARACTERISTICS
FIGURE 2. SATURATION CHARACTERISTICS
40
35
40
35
PULSE DURATION = 250µs
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, V
= 10V
GE
DUTY CYCLE <0.5%, V
= 15V
GE
o
= 25 C
o
T
T
= -40 C
C
C
30
25
20
15
10
30
25
20
15
10
5
o
T
= -40 C
C
o
= 150 C
T
C
o
T
= 150 C
C
o
T
= 25 C
C
5
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
V , COLLECTOR TO EMITTER VOLTAGE (V)
CE
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
15
V
= 15V
12
10
8
140
120
100
80
GE
o
V
= 360V, R = 50Ω, T = 125 C
G J
CE
12
9
I
SC
6
3
0
6
4
60
t
SC
40
15
2
10
25
50
75
100
125
150
11
12
13
14
o
T
, CASE TEMPERATURE ( C)
V
GE
, GATE TO EMITTER VOLTAGE (V)
C
FIGURE 5. MAXIMUM DC COLLECTOR CURRENT vs CASE
TEMPERATURE
FIGURE 6. SHORT CIRCUIT WITHSTAND TIME
3
HGTP7N60C3D, HGT1S7N60C3DS
Typical Performance Curves (Continued)
50
40
500
450
o
o
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
J
G
J
G
30
20
400
350
V
= 10V
= 15V
GE
V
= 10V or 15V
GE
300
250
V
GE
10
5
200
2
5
8
11
14
17
20
2
5
8
11
14
17
20
I
, COLLECTOR TO EMITTER CURRENT (A)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 7. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
200
o
300
o
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
J
G
J
G
250
200
V
= 10V
100
GE
V
= 10V or 15V
GE
V
= 15V
GE
150
10
5
100
5
8
14
17
20
2
11
2
5
14
17
20
8
11
I
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 9. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 10. TURN-OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
3000
o
2000
o
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
J
G
T
= 150 C, R = 50Ω, L = 1mH, V
= 480V
CE(PK)
J
G
1000
500
V
= 10V
= 15V
GE
1000
500
V
GE
V
= 10V OR 15V
GE
100
40
100
2
5
8
11
14
17
20
2
5
8
11
14
17
20
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 11. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 12. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
4
HGTP7N60C3D, HGT1S7N60C3DS
Typical Performance Curves (Continued)
50
200
100
o
o
o
T
= 150 C, V
= 15V, R = 50Ω, L = 1mH
T
= 150 C, T = 75 C
C
J
GE G
J
R
= 50Ω, L = 1mH
G
40
30
V
= 15V
GE
V
= 10V
+ t
GE
f
f
= 0.05/(t
D(OFF)I
)
10
MAX1
MAX2
D(ON)I
20
10
0
= (P - P )/(E
+ E
)
OFF
D
C
ON
P
P
= ALLOWABLE DISSIPATION
D
C
= CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
o
R
= 2.1 C/W
θJC
1
0
500
400
600
300
100
200
2
10
20
30
I
, COLLECTOR TO EMITTER CURRENT (A)
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
CE(PK)
FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 14. MINIMUM SWITCHING SAFE OPERATING AREA
600
500
400
300
200
100
0
15
1200
FREQUENCY = 1MHz
12.5
1000
800
C
IES
10
7.5
5
V
= 200V
= 400V
= 600V
CE
V
CE
CE
600
400
V
I
= 1.044mA,
o
G(REF)
2.5
0
200
0
R
= 50Ω, T = 25 C
C
L
C
OES
C
RES
10
, COLLECTOR TO EMITTER VOLTAGE (V)
0
5
15
20
25
5
15
Q , GATE CHARGE (nC)
G
30
10
20
25
0
V
CE
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
FIGURE 16. GATE CHARGE WAVEFORMS
0
10
0.5
t
1
0.2
0.1
P
D
-1
t
2
10
0.05
0.02
0.01
DUTY FACTOR, D = t / t
1
2
X R
PEAK T = (P X Z
) + T
JC C
J
D
JC
θ
θ
SINGLE PULSE
-2
10
-5
-4
10
-2
-1
-3
10
1
0
10
10
t , RECTANGULAR PULSE DURATION (s)
10
10
10
1
FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
5
HGTP7N60C3D, HGT1S7N60C3DS
Typical Performance Curves (Continued)
30
30
o
T
= 25 C, dI /dt = 200A/µs
C
EC
25
20
15
10
t
rr
t
a
10
o
o
o
t
100 C
b
175 C
25 C
1.0
0.5
5
0
0.5
1
3
7
2.5
0
0.5
1.0
1.5
2.0
3.0
I
, FORWARD CURRENT (A)
V
, FORWARD VOLTAGE (V)
EC
EC
FIGURE 18. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP
FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT
Test Circuit and Waveforms
L = 1mH
90%
RHRD660
10%
V
V
GE
E
E
OFF
ON
R
= 50Ω
G
CE
+
90%
V
= 480V
DD
-
10%
d(OFF)I
I
CE
t
t
rI
t
fI
t
d(ON)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
6
HGTP7N60C3D, HGT1S7N60C3DS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device (Figure 13)
is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs collector
current (I ) plots are possible using the information shown
CE
for a typical unit in Figures 4, 7, 8, 11 and 12. The operating
frequency plot (Figure 13) of a typical device shows f
or
MAX1
whichever is smaller at each point. The information is
f
MAX2
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
f
is defined by f
MAX1
= 0.05/(t
d(OFF)I
+ t ).
d(ON)I
MAX1
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as ECCOSORBD LD26 or equivalent.
are possible. t
d(OFF)I
and t
are defined in Figure 21.
d(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T . t
is important when controlling output ripple under a lightly
JM d(OFF)I
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
loaded condition.
f
is defined by f
MAX2
= (P - P )/(E
OFF
+ E ). The
ON
MAX2
D
C
3. Tips of soldering irons should be grounded.
allowable dissipation (P ) is defined by P = (T - T )/R
.
D
D
JM
C
θJC
The sum of device switching and conduction losses must
4. Devices should never be inserted into or removed from
circuits with power on.
not exceed P . A 50% duty factor was used (Figure 13)
D
and the conduction losses (P ) are approximated by
C
5. Gate Voltage Rating - Never exceed the gate-voltage
P
= (V
x I )/2.
rating of V
. Exceeding the rated V can result in
C
CE
CE
GEM
GE
permanent damage to the oxide layer in the gate region.
E
and E
are defined in the switching waveforms
OFF
ON
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup on
the input capacitor due to leakage currents or pickup.
shown in Figure 21. E
power loss (I
integral of the instantaneous power loss during turn-off. All
tail losses are included in the calculation for E ; i.e. the
collector current equals zero (I
is the integral of the instantaneous
ON
x V ) during turn-on and E
is the
CE
CE
OFF
OFF
= 0).
CE
7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate
protection is required an external zener is recommended.
ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.
7
HGTP7N60C3D, HGT1S7N60C3DS
TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E
A
INCHES
MIN
MILLIMETERS
A
1
SYMBOL
MAX
0.180
0.052
0.034
0.055
-
MIN
4.32
MAX
4.57
1.32
0.86
1.39
-
NOTES
H
1
A
0.170
0.048
0.030
0.045
0.310
0.018
0.405
0.395
-
4, 5
4, 5
4, 5
2
TERM. 4
A
1.22
1
b
0.77
D
L
b
b
1.15
1
2
7.88
L
2
c
0.022
0.425
0.405
0.46
0.55
10.79
10.28
4, 5
-
L
1
D
E
e
10.29
10.04
-
1
3
0.100 TYP
0.200 BSC
2.54 TYP
5.08 BSC
7
b
b1
c
e
e
7
1
J
1
e1
H
0.045
0.055
0.105
0.195
0.110
0.070
-
1.15
1.39
2.66
4.95
2.79
1.77
-
-
1
0.450
(11.43)
TERM. 4
J
0.095
0.175
0.090
0.050
0.315
2.42
4.45
2.29
1.27
8.01
-
1
L
-
L
L
L
4, 6
3
1
2
3
L
3
0.350
(8.89)
2
b
2
0.700
(17.78)
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2. L and b dimensions established a minimum mounting surface
3
2
0.150
(3.81)
for terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
3
1
0.080 TYP (2.03)
0.062 TYP (1.58)
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L is the terminal length for soldering.
1
7. Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
8. Controlling dimension: Inch.
9. Revision 10 dated 5-99.
4.0mm
1.5mm
1.75mm
DIA. HOLE
USER DIRECTION OF FEED
2.0mm
C
TO-263AB
24mm TAPE AND REEL
L
24mm
16mm
COVER TAPE
40mm MIN.
ACCESS HOLE
30.4mm
13mm
330mm
100mm
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
24.4mm
8
HGTP7N60C3D, HGT1S7N60C3DS
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
MIN
MILLIMETERS
E
ØP
SYMBOL
MAX
0.180
0.052
0.034
0.055
0.019
0.610
0.160
0.410
0.030
MIN
4.32
1.22
0.77
1.15
0.36
14.99
-
MAX
4.57
NOTES
A
1
A
0.170
0.048
0.030
0.045
0.014
0.590
-
-
Q
H
1
A
1.32
-
1
b
0.86
3, 4
TERM. 4
D
b
1.39
2, 3
1
o
45
E
1
c
0.48
2, 3, 4
D
1
D
15.49
4.06
-
-
L
1
D
1
b1
b
E
0.395
-
10.04
-
10.41
0.76
-
L
E
-
c
1
e
0.100 TYP
0.200 BSC
0.235
2.54 TYP
5.08 BSC
5
5
-
o
60
e
1
2
e
3
1
J
1
H
0.255
0.110
0.550
0.150
0.153
0.112
5.97
6.47
2.79
13.97
3.81
3.88
2.84
1
1
e1
J
0.100
0.530
0.130
0.149
0.102
2.54
13.47
3.31
6
-
L
L
2
-
1
ØP
Q
3.79
2.60
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L .
1
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bot-
tom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bot-
tom of dimension D.
7. Controlling dimension: Inch.
8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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TEL: (32) 2.724.2111
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9
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