G571_技术文档

Global Mixed-mode Technology Inc.

G571

Single-Slot PCMCIA/CardBus Power Controllers

Features

Description

ꢀFully Integrated V_CCand V_PPSwitching for Sin-

The G571 PC Card power-interface switch provides an

integrated power-management solution for a single PC

Cards. All of the discrete power MOSFETs, a logic

section, current limiting, and thermal protection for PC

Card control are combined on a single integrated cir-

cuit. The circuit allows the distribution of 3.3V, 5V,

and/or 12V card power, and is compatible with many

PCMCIA controllers. The current-limiting feature

eliminates the need for fuses, which reduces compo-

nent count and improves reliability. Current-limit re-

porting can help the user isolate a system fault to the

PC Card.

gle-Slot PC Card^TMInterface

ꢀLow r_DS(on)(180-mΩ 5V V_CCSwitch and 3.3V V_CC

Switch)

ꢀCompatible With Controllers From Cirrus, Ri-

coh, O₂Micro, Intel, and Texas Instruments

ꢀ3.3V Low-Voltage Mode

ꢀMeets PC Card Standards

ꢀ12V Supply Can Be Disabled Except During

12V Flash Programming

ꢀShort Circuit and Thermal Protection

ꢀSpace-Saving 16 Pin SSOP

The G571 features a 3.3V low voltage mode that al-

lows for 3.3V switching without the need for 5V. Bias

power can be derived from either the 3.3V or 5V inputs.

This facilitates low-power system designs such as

sleep mode and pager mode where only 3.3V is

available.

End equipment for the G571 includes notebook com-

puters, desktop computers, personal digital assistants

(PDAs), digital cameras and bar-code scanners.

ꢀCompatible With 3.3V, 5V, and 12V PC Cards

ꢀBreak-Before-Make Switching

Application

ꢀNotebook PC

ꢀElectronic Dictionary

ꢀPersonal Digital Assistance

ꢀDigital still Camera

Ordering Information

PART NUMBER TEMP. RANGE

PACKAGE

G571S1

-40°C to +85°C

16-SSOP

Pin Configuration

G571

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

SHDN

VCCD0

VCCD1

3.3V

VPPD0

VPPD1

AVCC

AVPP

3.3V

5V

GND

12V

OC

16Pin SSOP

TEL: 886-3-5788833

Ver 1.1

http://www.gmt.com.tw

Jan 08, 2001

1

Global Mixed-mode Technology Inc.

Typical PC-card Power-distribution application

G571

AVCC

V_CC1

V_CC2

0.1µF

PC Card

Connector

V_PP1

V_PP2

AVPP

0.1µF

12V

G571

5V

PCMCIA

Controller

0.1µF

1µF

VCCD0

VCC_EN0

VCC_EN1

VPP_EN0

VPP_EN1

VCCD1

VPPD0

VPPD1

3.3V

To CPU

OC

CS

SHDN

GND

Shutdown Signal From CPU

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

3.3V

NO.

3,4

I

3.3V V_CCinput for card power and/or chip power if 5V is not present

5V V_CCinput for card power and/or chip power

5V

5,6

12V

9

I

12V V_PPinput card power

AVCC

AVPP

GND

OC

11,12,13

O

Switched output that delivers 0V,3.3V,5V, or high impedance to card

10

7

Switched output that delivers 0V,3.3V,5V,12V or high impedance to card

Ground

8

O

I

Logic-level overcurrent reporting output that goes low when an overcurrent condition exists

16

1

Logic input that shuts down the G571 and sets all power outputs to high-impedance state

Logic input that controls voltage of AVCC(see control-logic table)

SHDN

I

VCCD0

2

I

VCCD1

VPPD0

VPPD1

Logic input that controls voltage of AVCC(see control-logic table)

Logic input that controls voltage of AVPP(see control-logic table)

15

14

I

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

2

Global Mixed-mode Technology Inc.

G571

Operating virtual junction temperature range, T_J.

.........…..............…………..…….………-40°C to 150°C

Operating free-air temperature range,.T_A

_{………………………………………………………………………….}-40°C to 85°C

Storage temperature range, T_STG

Absolute Maximum Ratings Over Operating

(unless other-wise noted)*

Input voltage range for card power:

Free-Air Temperature

V_I(5V)..........................................………..…….-0.3V to 7V

V_I(3.3V)..........…...........................…….……... -0.3V to 7V

V_I(12V)..........................................……..…….-0.3V to 14V

Logic input voltage....................…...........…….-0.3V to 7V

Output current (each card):I_{O (VCC).}...……internally limited

………………………...........….....……...-55°C to 150°C

Lead temperature 1.6 mm (1/16 inch) from case for

10 seconds.……..……………………………….….260°C

I_O(VPP)............internally limited

*^{Stresses beyond those listed under "absolute maximum ratings}^”^{may cause permanent damage to the device. These are stress}

rating only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended op-

erating conditions”is not implied. Exposure to absolute–maximum-rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

MIN

MAX

5.25

13.5

1.0

UNIT

V

V_I(5V)

0

Input voltage, V_I

Output current

V_I(3.3V)

V_I(12V)

I_O(AVCC)

I_O(AVPP)

V

A

150

mA

°C

Operating virtual junction temperature, T_J

-40

125

(T =25°C)

A

Electrical Characteristics

Power Switch

PARAMETER

TEST CONDITIONS*

V_I(5V)= 5V

MIN TYP MAX UNIT

5V to AVCC

3.3V to AVCC

5V to AVPP

130 180

mΩ

V_I(5V)= 5V, V_I(3.3V)=3.3V

V_I(5V)= 0V, V_I(3.3V)=3.3V

T_J= 25°C

130 180

Switch resistance

6

Ω

3.3V to AVPP

12V to AVPP

T_J= 25°C

6

V_O(AVPP)Clamp low voltage

V_O(AVCC)Clamp low voltage

I_PPat 10mA

0.8

V

I_CCat 10mA

I_PPhigh-impedance State T_A= 25°C

_CChigh-impedance State T_A= 25°C

1

10

I_IKGLeakage current

µA

I

V_I(5V)= 5V

V_O(AVCC)=5V,V_O(AVPP)=12V

V_O(AVCC)=3.3V,V_O(AVPP)= 12V

75

1

150

3

I_I

Input current

µA

V_I(5V)= 0V, V_I(3.3V)= 3.3V

Shutdown mode

I_O(AVCC)

V_O(AVCC)=V_O(AVPP)= Hi-Z

I_OSShort-circuit Output-

current Limit

output powered into a short to GND

0.8

2.2

400

A

I_O(AVPP)

120

mA

*Pulse-testing techniques maintain junction temperature close to ambient temperatures; thermal effects must be taken into account separately.

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

3

Global Mixed-mode Technology Inc.

G571

Logic Section

PARAMETER

Logic input current

TEST CONDITION*

MIN

MAX UNIT

1

µA

V

Logic input high level

Logic input low level

2

0.8

V

V_I(5V)= 5V, I_O=1mA

_I(5V)=0V,I_O= 1mA,V_I(3.3V)= 3.3V

I_O= 1mA

V_I(5V)- 0.4

Logic output high level

V

V_I(3.3V)- 0.4

Logic output low level

0.4

V

*Pulse-testing techniques maintain junction temperature close to ambient temperatures; thermal effects must be taken into account separately.

Switching Characteristics **

PARAMETER

t_rRise times, output

TEST CONDITION

MIN

TYP

2.6

10

MAX

UNIT

V_{O (AVCC)}

V_{O (AVPP)}

V_{O (AVCC)}

V_{O (AVPP)}

ms

7.5

38

t_fFall times, output

t_on

t_off

t_on

t_off

t_on

t_off

14

V_I(_VPPD0) to V_O(AVPP)

44

t_pdPropagation delay

(see Figure 1)

3.2

17

V_I( ^VCCD1) to V_O(AVCC)(3.3V)

V_I( ^VCCD0) to V_O(AVCC)(5V)

ms

4.4

20

**Switching Characteristics are with C_L= 147µF.

§ Refer to Parameter Measurement Information

Parameter Measurement Information

AVCC

AVPP

C_L

LOAD CIRCUIT

V_DD

V_I(VPPD0)

V_I(VCCD1)

50%

t_on

50%

t_off

50%

t_off

50%

(V_I(VPPD1)=0V)

(V_I(VCCD0)=V_DD)

GND

t_on

V_I(12V)

GND

V_I(3.3V)

GND

V_O(AVCC)

V_O(AVPP)

90%

10%

VOLTAGE WAVEFORMS

Figure 1. Test Circuits and Voltage Waveforms

Table of Timing Diagrams

FIGURE

AVCC Propagation Delay and Rise Time With 1µF Load, 3.3V Switch

AVCC Propagation Delay and Fall Time With 1µF Load, 3.3V Switch

AVCC Propagation Delay and Rise Time With 147µF Load, 3.3V Switch

AVCC Propagation Delay and Fall Time With 147µF Load, 3.3V Switch

AVCC Propagation Delay and Rise Time With 1µF Load, 5V Switch

AVCC Propagation Delay and Fall Time With 1µF Load, 5V Switch

AVCC Propagation Delay and Rise Time With 147µF Load, 5V Switch

AVCC Propagation Delay and Fall Time With 147µF Load, 5V Switch

AVPP Propagation Delay and Rise Time With 1µF Load, 12V Switch

AVPP Propagation Delay and Fall Time With 1µF Load, 12V Switch

AVPP Propagation Delay and Rise Time With 147µF Load, 12V Switch

AVPP Propagation Delay and Fall Time With 147µF Load, 12V Switch

2

3

4

5

6

7

8

9

10

11

12

13

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

4

Global Mixed-mode Technology Inc.

Parameter Measurement Information

G571

VCCD0=3.3V

V C C D 0=3.3V

VCCD1

V C C D 1

AVCC

AV C C

Figure 2. AVCC Propagation Delay and Rise

Time With 1µF Load, 3.3V Switch

Figure 3. AVCC Propagation Delay and Fall Time

With 1µF Load, 3.3V Switch

VCCD0=3.3V

VCCD1

AVCC

Figure 4. AVCC Propagation Delay and Rise Time

With 147µF Load, 3.3V Switch

Figure 5. AVCC Propagation Delay and Fall Time

With 147µF Load, 3.3V Switch

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

5

Global Mixed-mode Technology Inc.

G571

VCCD0

VCCD1=5V

AVCC

Figure 6. AVCC Propagation Delay and Rise Time

With 1µF Load, 5V Switch

Figure 7. AVCC Propagation Delay and Fall Time

With 1µF Load, 5V Switch

VCCD0

VCCD1=5V

AVCC

Figure 8. AVCC Propagation Delay and Rise Time

With 147µF Load, 5V Switch

Figure 9. AVCC Propagation Delay and Fall Time

With 147µF Load, 5V Switch

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

6

Global Mixed-mode Technology Inc.

G571

VPPD0

VPPD1=0V

AVPP

Figure 10. AVPP Propagation Delay and Rise

Time With 1µF Load, 12V Switch

Figure 11. AVPP Propagation Delay and Fall Time

With 1µF Load, 12V Switch

VPPD0

VPPD1=0V

AVPP

Figure 13. AVPP Propagation Delay and Fall Time

With 147µF Load, 12V Switch

Figure 12. AVPP Propagation Delay and Rise

Time With 147µF Load, 12V Switch

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

7

Global Mixed-mode Technology Inc.

G571

I_Omax = V_DS/ R_DS(on)

Application Information

Overview

The AVCC outputs deliver 1A continuous at 3.3V and

5.5V within regulation over the operating temperature

range. Using the same equations, the PCMCIA

specification for output voltage regulation of the 3.3V

output is 300mV. Using the voltage drop percentages

for power supply regulation (2%) and PCB resistive

loss (1%), the allowable voltage drop for the 3.3V

switch is 200mV. The 12V outputs (AVPP) of the G571

can deliver 150mA continuously.

PC Cards were initially introduced as a means to add

EEPROM (flash memory) to portable computers with

limited onboard memory. The idea of add-in cards

quickly took hold; modems, wireless LANs, Global

Positioning Satellite (GPS) systems, multimedia, and

hard-disk versions were soon available. As the num-

ber of PC Card applications grew, the engineering

community quickly recognized the need for a standard

to ensure compatibility across platforms. To this end,

the PCMCIA (Personal Computer Memory Card Inter-

national Association) was established, comprised of

members from leading computer, software, PC Card,

and semiconductor manufactures. One key goal was

to realize the “plug and play” concept, i.e. cards and

hosts from different vendors should be compatible.

Overcurrent and overtemperature protection

PC Cards are inherently subuect to damage from mis-

handling. Host systems require protection against

short-circuited cards that could lead to power supply

or PCB trace damage. Even systems sufficiently ro-

bust to withstand a short circuit would still undergo

rapid battery discharge into the damaged PC Card,

resulting in a sudden loss of system power. Most

hosts include fuses for protection. The reliability of

fused systems is poor, and requires troubleshooting

and repair, usually by the manufacturer. When fuses

are blown.

PC Card Power Specification

System compatibility also means power compatibility.

The most current set of specifications (PC Card Stan-

dard) set forth by the PCMCIA committee states that

power is to be transferred between the host and the

card through eight of the 68 terminals of the PC Card

connectors. This power interface consists of two V_CC,

two V_PP, and four ground terminals. Multiple V_CCand

ground terminals minimize connector-terminal and line

resistance. The two V_PPterminals were originally

specified as separate signals but are commonly tied

together in the host to form a single node to minimize

voltage losses. Card primary power is supplied

through the V_CCterminals; flash-memory programming

and erase voltage is supplied through the V_PPtermi-

nals.

The G571 uses sense FETs to check for overcurrent

conditions in each of the AVCC and AVPP out-

puts.Unlike sense resistors or polyfuses, these FETs

do not add to the series resistance of the switch;

therefore voltage and power losses are reduced.

Overcurrent sensing is applied to each output sepa-

rately. When an overcurrent condition is detected, only

the power output affected is limited; all other power

outputs continue to function normally. The OC indi-

cator, normally a ligic high, is a logic low when an

overcurrent condition is detected providing for initiation

of system diagnostics and/or sending a warning mes-

sage to the user.

Designing for Voltage Regulation

The current PCMCIA specification for output voltage

regulation of the 5V output is 5% (250mV). In a typical

PC power-system design, the power supply will have

an output voltage regulation (V_PS(reg)) of 2% (100mV).

Also, a voltage drop from the power supply to the PC

Card will result from resistive losses (V_PCB) in the PCB

traces and the PCMCIA connector. A typical design

would limit the total of these resistive losses to less

than 1% (50mV) of the output voltage. Therefore, the

allowable voltage drop (V_DS) for the G571 would be the

PCMCIA voltage regulation less the power supply

regula-tion and less the PCB and connector resistive

drops:

During power up, the G571 controls the rise time of

the AVCC and AVPP outputs and limits the current

into a faulty card or connector. If a short circuit is ap-

plied after power is established (e.g., hot insertion of a

bad card ),current is initially limited only by the im-

pedance between the short and the power supply. In

extreme cases, as much as 10A to 15A may flow into

the short before the current limiting of the G571 en-

gages. If the AVCC or AVPP outputs are driven below

ground, the G571 may latch nondestructively in an off

state, Cycling power will reestablish normal operation.

Overcurrent limiting for the AVCC outputs is designed

to activate if powered up into a short in the range of

0.8A to 2.2A, typically at about 1.5A. The AVPP out-

puts limit from 120mA to 400mA, typically around

200mA. The protection circuitry acts by linearly limiting

the current passing through the switch rather than ini-

tiating a full shutdown of the supply. Shutdown occurs

only during thermal limiting.

V

_DS= V_O(reg)-V_PS(reg)-V_PCB

Typically, this would leave 100mV for the allowable

voltage drop across the G571. The voltage drop is the

output current multiplied by the switch resistance of

the G571. Therefore, the maximum output current that

can be delivered to the PC Card in regulation is the

allowable voltage drop across the G571 divided by the

output switch resistance.

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

8

Global Mixed-mode Technology Inc.

G571

Thermal limiting prevents destruction of the IC from

overheating if the package power dissipation rating

are exceeded. Thermal limiting disables power output

until the device has cooled.

0.8V before applying 3.3V power. This functions as a

power reset and ensures that sensitive 3.3V circuitry is

not subjected to any residual 5V charge. The G571

offer a selectable V_CCand V_PPground state, in accor-

dance with PCMCIA 3.3V/5V switching specifications.

12V Supply Not Required

Most PC Card switches use the externally supplied

12V to power gate drive and other chip functions,

which require that power be present at all times. The

G571 offers considerable power savings by using an

internal charge pump to generate the required higher

voltages from 5V input; Therefore, the external 12V

supply can be disable except when needed for

flash-memory functions, thereby extending battery

lifetime. Do not ground the 12V switch inputs when the

12-V input is not used. Additional power savings are

realized by the G571 during a software shutdown in

which quiescent current drops to a maximum of 3µA.

Output Ground Switches

PC Card specification requires that V_CCbe discharged

within 100 ms. PC Card resistance can not be relied

on to provide a discharge path for voltages stored on

PC Card capacitance because of possible

high-impedance isolation by power-management

schemes.

Power Supply Considerations

The G571 has multiple pins for each of its 3.3V, and

5V power inputs and for switched V_CCoutputs. Any

individual pin can conduct the rated input or output

current. Unless all pins are connected in parallel, the

series resistance is significantly higher than that

specified, resulting in increased voltage drops and lost

power. it is recommended that all input and output

power pins be paralleled for optimum operation.

3.3V Low Voltage Mode

The G571 will operates in a 3.3V low voltage mode

when 3.3V is only available input voltage (V_I(5V)= 0).

This allows host and PC Cards to be operated in

low-power 3.3V-only modes such as sleep modes or

pager modes. Note that in these operation mode, the

G571 will derive its bias current from the 3.3V input

pin and only 3.3V can be delivered to the PC Card.

To increase the noise immunity of the G571, the

power supply inputs should be bypassed with a 1µF

electrolytic or tantalum capacitor paralleled by a

0.047µF to 0.1µF ceramic capacitor. It is strongly

recommended that the switched outputs be bypassed

with a 0.1µF or larger, ceramic capacitor; doing so

improves the immunity of the G571 to electrostatic

discharge (ESD). Care should be taken to minimize

the inductance of PCB traces between the G571 and

the load. High switching currents can produce large

negative voltage transients, which forward biases sub-

strate diodes, resulting in unpredictable performance.

Similary, no pin should be taken below -0.3V.

Voltage Transitioning Requirement

PC Cards are migrating from 5V to 3.3V to minimize

power consumption, optimize board space, and in-

crease logic speeds. The G571 meets all combina-

tions of power delivery as currently defined in the

PCMCIA standard. The latest protocol accommodates

mixed 3.3V/5V systems by first powering the card with

5V, then polling it to determine its 3.3V compatibility.

The PCMCIA specification requires that the capacitors

on 3.3V-compatible cards be discharged to below

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

9

Global Mixed-mode Technology Inc.

G571

Card B

V_CC1

3

4

5

6

13

12

11

S1

S2

S3

17

51

cs

3.3V

V_CC2

5V

S4

S5

S6

18

52

V_PP1

V_PP2

10

9

cs

12V

See Note A

Internal

Current Monitor

16

CPU

SHDN

Thermal

15

14

1

VPPD0

VPPD1

VCCD0

VCCD1

Controller

2

8

GND

OC

7

Note A: MOSFET switch S6 has a back-gate diode from the source to the drain. Unused switch inputs should

never be grounded.

Figure 10. Internal Switching Matrix

G571 Control Logic

AVPP

CONTROL SIGNALS

VPPD0

INTERNAL SWITCH SETTINGS

OUTPUT

AVPP

VPPD1

S4

S5

S6

SHDN

1

0

1

×

0

1

0

1

×

CLOSED

OPEN

CLOSED

OPEN

0V

AVCC*

VPP(12V)

Hi-Z

CLOSED

OPEN

Hi-Z

* Output depends on AVCC

AVCC

CONTROL SIGNALS

INTERNAL SWITCH SETTINGS

OUTPUT

AVCC

S1

S2

S3

SHDN

VCCD1

VCCD0

1

0

1

×

0

1

0

1

×

CLOSED

OPEN

CLOSED

OPEN

0V

3.3V

5V

OPEN

CLOSED

OPEN

CLOSED

OPEN

0V

OPEN

Hi-Z

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

10

Global Mixed-mode Technology Inc.

Package Information

G571

θ

L

L1

R1

E1

E

D

c

A2

A1

A

0.10MM C

e

b

Note: Dimension D does not include mold protrusions or gate burrs. Mold protrusions and gate burrs shall not

exceed 0.006 inch per side.

DIMENSION IN MM

DIMENSION IN INCH

SYMBOL

MIN.

-----

NOM.

-----

MAX.

2.00

-----

MIN.

-----

NOM.

-----

MAX.

0.079

-----

A

A1

A2

b

0.05

1.65

0.22

0.09

-----

0.002

0.065

0.009

0.004

-----

1.75

1.85

0.33

0.21

0.069

0.012

0.006

0.026 BASIC

0.244

0.307

0.209

0.030

0.049 REF

-----

0.073

0.013

0.008

0.30

c

0.15

e

0.65 BASIC

6.20

D

5.90

7.40

5.00

0.55

6.50

8.20

5.60

0.95

0.232

0.291

0.197

0.022

0.256

0.323

0.220

0.038

E

7.80

E1

L

5.30

0.75

L1

R1

θ

1.25 REF

-----

0.09

0º

-----

8º

0.004

0º

04

8º

4º

4

JEDEC

MO-150 (AC)

TEL: 886-3-5788833

http://www.gmt.com.tw

Ver 1.1

Jan 08, 2001

11


型号：	G571
厂家：	ETC
描述：	Single-Slot PCMCIA/CardBus Power Controllers 单插槽PCMCIA / CardBus的功率控制器功率控制控制器 PC
文件：	总11页 (文件大小：153K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

G571 [ETC]

相关型号：

G5719

G5719B

G5719BRC1U

G5719BT11U

G5719BTB1U

G5719C

G571S1

G571SZ

G5723

G5725

G5728

G5728B