DSC-10510-103 [ETC]
Digital-to-Synchro Converter ; 数字 - 同步转换器\n
| 型号： | DSC-10510-103 |
| 厂家： | 
ETC |
| 描述： | Digital-to-Synchro Converter
|
| 文件： | 总8页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS C-1 0 5 1 0
7 VA DIGITAL-TO-S YNCHRO CONVERTER
FEATURES
DESCRIPTION
With 16-bit resolution and up to ±2 natural binary angle in TTL compati-
minute accuracy, the DSC-10510 M is ble parallel positive logic format.
a high power digital-to-synchro con-
• 7 VA Drive Capability for CT,
CDX, or TR Loads
Packaged in a 40-pin TDIP, the DSC-
10510 features a power stage that
may be driven by either a standard
±15 VDC supply or by a pulsating
reference supply when used with an
verter capable of driving multiple
Control Transformer (CT), Control
Differential Transmitter (CDX) and
Torque Receiver (TR) loads up to 7 VA.
• Double Buffered Transparent
Input Latch
• 16-Bit Resolution
The DSC-10510 contains a high optional power transformer. When
accuracy D/R converter, a triple powered by the reference source,
• Up to 2 Minute Accuracy
power amplifier stage,
a walk- heat dissipation is reduced by 50%.
• Power Amplifier Uses
around circuit (to prevent torque
receiver hangups), and thermal and
over-current protection circuits. The
hybrid is protected against over-
loads, load transients, over-temper-
ature, loss of reference, and power
amplifier or DC power supply shut-
down.
Pulsating or DC Supplies
APPLICATIONS
The DSC-10510 can be used where dig-
itized shaft angle data must be convert-
ed to an analog format for driving CTs,
CDXs, and TRs loads. With its double
buffered input latches, the DSC-10510
easily interfaces with microprocessor
based systems such as flight simulators,
flight instrumentation, fire control sys-
tems, and flight data computers.
• Built-In-Test (BIT) Output
Microprocessor compatibility is pro-
vided through a 16-bit/2-byte double-
buffered input latch. Data input is
R
+15 VDC
30
-15 VDC
29
+V OR +15 V
23
-V OR -15 V
REMOTE
SENSE
36
24
19 S1'
100k
RH
RL
SIN
20 S1
S1
26 V
REF
18
100k
17
D/R CONVERTER
25 S2'
ELECTRONIC SCOTT-T
& TRIPLE POWER
AMPLIFIER
-R
-
+
HIGH ACCURACY
LOW SCALE FACTOR
VARIATION
21 S2
26 S3'
22 S3
S2
S3
COS
13k
35
13k
34
RH'
RL'
3.4 V
REF
DELAY
OVER-CURRENT
POWER STAGE
ENABLE
WALK AROUND CIRCUIT
±15 VDC
- R
39
BIT
THERMAL SENSE
140˚ CASE
TRANSPARENT
LATCH
TRANSPARENT
LATCH
±15 VDC
-R
28
31
33
38
1-8
9-16 32
40
37
LM BITS 1-8
BITS 9-16 LL
K
EN
BS
LA
FIGURE 1. DSC-10510 BLOCK DIAGRAM
1986, 1999 Data Device Corporation
©
M
DDC Custom Monolithics utilized in this product are copyright under the Semiconductor Chip Protection Act.
TABLE 1. DSC-10510 SPECIFICATIONS
TABLE 1. DSC-10510 SPECIFICATIONS (contd)
PARAMETER VALUE DESCRIPTION
SYNCHRO OUTPUT
PARAMETER
RESOLUTION
ACCURACY
VALUE
16 bits
DESCRIPTION
Bit 1 = MSB, Bit 16 = LSB
±2 or 4 minutes
Voltage L-L
11.8 Vrms ±0.5% for
nom Ref V
DIFFERENTIAL
LINEARITY
1 LSB max in the
16th bit
Scale Factor
Variation
±0.1% max
Simultaneous amplitude
variation on all output lines
as a function of digital angle.
OUTPUT SETTLING
TIME
40 µs max
For any digital input step
change (passive loads).
Current
CT, CDX or TR
Load
700 mA rms max
7 VA max
DIGITAL INPUT/ OUTPUT
Logic Type
Digital Inputs
TTL/CMOS compatible
Logic 0 = 0.8 V max All inputs except K
Logic 1 = 2.0 V min (Kick pin 40).
DC Offset
±15 mV max
Each line to ground. Varies
with angle.
Loading
20 µA max to GND
//5pf max
20 µA max to + 5V LL, LM, and LA (CMOS
Bits 1-16, BS, and EN.
Protection
Output protected from over-
current, voltage feedback
transient, and over tempera-
ture, loss of reference, loss
of power amplifier, and loss
of ±DC supply voltage.
//5 pf max
20 µA max
transient protected)
K
Ground to enable Kick
circuit, open to disable;
pulls self up to +15 V.
POWER SUPPLY CHARACTERISTICS
Nominal Voltage ±15 V ±V
Voltage Range ±5%, 20 V peak
Digital Outputs
BIT
Logic 0 for BIT condition
(see BIT pin function)
max
3 V above
output min
Drive Capability
Logic 0 = 1 TTL
Load
Logic 1 = 10 TTL
Loads
1.6 mA at 0.4 V max
0.4 mA at 2.8 V min
Max Voltage
w/o Damage
Current
18 V 25 V
25 mA load
REFERENCE INPUT
Type
max
dependent
26 Vrms differential RH-RL
3.4 Vrms differential
TEMPERATURE RANGES
Operating Case
-3XX
-1XX
Storage
RH' -RL'
Max Voltage
w/o Damage
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
72.8 Vrms for RH-RL
9.52 Vrms for RH'-RL'
DC to 1 kHz
Frequency
Input Impedance
Single Ended
PHYSICAL CHARACTERISTICS
Size
2.0 x 1.1 x 0.2 inches 40 Pin Triple DIP
100k Ohms ±0.5%
13k Ohms ±0.5%
200k Ohms ±0.5%
26k Ohms ±0.5%
RH-RL
RH'-RL'
RH-RL
RH'-RL'
(50.8 x 27.9 x 5.1 mm)
0.9 oz (25.5 g)
Weight
Differential
degrees. At this point the load impedance drops to Zss and cur-
rent draw is at maximum.
INTRODUCTION
SYSTEM CONSIDERATIONS:
Power Surge at Turn On
Pulsating Power Supplies
D/S and D/R converters have been designed to operate their
output power stages with pulsating power to reduce power dis-
sipation and power demand from regulated supplies.
FIGURES 2 and 3 illustrate this technique. Essentially the
power output stage is only supplied with enough instantaneous
voltage to be able to drive the required instantaneous signal
level. Since the output signal is required to be in phase with
the AC reference, the AC reference can be full wave rectified
and applied to the push-pull output drivers. The supply voltage
will then be just a few volts more than the signal being output
and internal power dissipation is minimized.
When power is initially applied, the output power stages can go
on fully before all the supplies stabilize. When multiple D/S con-
verters with substantial loads are present, the heavy load can
cause the system power supply to have difficulty coming up and
indeed may even shut down. It is best to be sure that the power
can handle the turn-on surge or to stagger the D/S turn-ons so
that the supply can handle it. Typically, the surge will be twice the
max rated draw of the converter.
Torque Load Management
When multiple torque loads (TR) are being driven the above
problems are exacerbated by the high power levels involved and
power supply fold back problems are common unless the stag-
ger technique is used. Also, allow time for the load to stabilize.
On turn-on it is not likely that all the output loads will be at the
same angle as the D/S output. As the angular difference
increases so does the power draw until the difference is 180
Thermal Considerations
Power dissipation in D/S and D/R circuits are dependent on the
load, whether active (TR) or passive (CT or CDX) and the
power supply, whether DC or pulsating. With inductive loads
we must bear in mind that virtually all the power consumed will
2
have to be dissipated in the output amplifiers. This sometimes
requires considerable care in heat sinking.
The other extreme condition to consider is when the output volt-
age is 11.8. The current then will be 0.42 A and the power will
be 30 x (0.42A x 0.635/0.707) = 11.32 Watts. A similar calcula-
tion will show the maximum power per transistor to be 2.3 Watts.
Much less than the other extreme.
Example:
For illustrative purposes let us make some thermal calculations
using the DSC-10510’s specifications. The DSC-10510 has a 7
VA drive capability for CT, CDX, or TR loads.
For Pulsating Supplies, the analysis is much more difficult.
Theoretical calculations, for a purely reactive load with DC sup-
plies equal to the output voltage peak vs. pulsating supplies with
a supply voltage equal to the output voltage yield an exact halv-
ing of the power dissipated. At light loads the pulsating sup-
plies approximate DC supplies and at heavy loads, which is the
worst case, they approximate a pulsating supply as shown in
FIGURE 4. Advantages of the pulsating supply technique are:
Let us take the simplest case first: Passive Inductive Load and
±15 Volt DC power stage supplies (as shown in FIGURE 2).
The power dissipated in the power stage can be calculated by
taking the integral of the instantaneous current multiplied by the
voltage difference from the DC supply that supplies the current
and instantaneous output voltage over one cycle of the reference.
For an inductive load this is a rather tedious calculation. Instead
let us take the difference between the power input from the DC
supplies minus the power delivered to the load. A real synchro
load is highly inductive with a Q of 4-6; therefore, let’s assume
that it is purely reactive. The power out, then, is 0 Watts. As a
worst case we will also assume the load is the full 7 VA, the con-
verter’s rated load. The VA delivered to the load is independent
of the angle but the voltage across the synchro varies with the
angle from a high of 11.8 Volts line-to-line (L-L) to a low of 10.2 V
L-L. The maximum current therefore is 7VA/10.2 V = 0.68 A rms.
The output is L-L push-pull, that is, all the current flows from the
positive supply out to the load and back to the negative supply.
The power input is the DC voltage times the average current or
30 V x (0.68 A x 0.635/0.707) [avg/rms] = 18.32 Watts. The power
dissipated by the output driver stage is over 18 Watts shared by
the six power transistors. Since one synchro line supplies all the
current while the other two share it equally, one will dissipate 2/3
of the power and other two will each dissipate 1/3. There are 2
transistors per power stage so each of the two transistors dissi-
pates 1/3 of the power and the other transistors dissipate 1/6 of
the power. This results in a maximum power in any one transis-
tor of 1/3 x 18.32 W = 6.04 Watts. The heat rise from the junction
to the outside of the package, assuming a thermal impedance of
4°C per watt = 24.16°C. At an operating case temperature of
125°C the maximum junction temperature will be 149.16°C.
• Reduced load on the regulated ±15 VDC supplies
• Halving of the total power
• Simplified power dissipation management
ACTIVE LOAD
Active load – that is torque receivers – make it more difficult to
calculate power dissipation. The load is composed of an active
part and a passive part. FIGURE 5 illustrates the equivalent two
wire circuit. At null that is when torque receiver’s shaft rotates to
the angle that minimizes the current in R2, the power dissipated
is at its lowest. The typical ratio of Zso/Zss = 4.3. For the max-
imum specified load of Zss = 2 ohm, the Zso = 2 x 4.3 = 8.6
ohms. Also, the typical ratio of R2/R1= 2. In a synchro systems
with a torque transmitter driving a torque receiver, the actual line
impedances are as shown in FIGURE 6. The torque transmitter
and torque receiver are electrically identical, hence the total line
impedance is double that of FIGURE 5. The torque system is
designed to operate that way. The higher the total line imped-
ances, the lower the current flow at null and the lower the power
dissipation. It is recommended that with torque loads, discrete
resistors be used as shown in FIGURES 7 and 8.
A torque load is usually at null. Once the torque receiver nulls at
power turn on, the digital commands to the D/S are usually in
6
3.4V rms
7
1
2
3
REFERENCE
SOURCE
21.6V rms
C.T.
+DC SUPPLY LEVEL
+v
4
RL' RH'
+V
S1'
S1
26V rms 400Hz
POSITIVE PULSATING
SUPPLY VOLTAGE
+
+
S1
T1
D2
D3
D1
D4
C1
C2
42359
S2'
S2
5
GND
S2
S3
AMPLIFIER OUTPUT
VOLTAGE ENVELOPE
S3'
S3
-V
DSC10510
NEGATIVE PULSATING
SUPPLY VOLTAGE
DIGITAL ±15VDC
INPUT
-DC SUPPLY LEVEL
- v
NOTES:
PARTS LIST FOR 400Hz
D1, D2, D3, D4 = 1N4245
C1 AND C2 = 47µF, 35V DC CAPACITOR
FIGURE 2. TYPICAL CONNECTION DIAGRAM
UTILIZING PULSATING POWER SOURCE
FIGURE 3. PULSATING POWER SUPPLY
VOLTAGE WAVEFORMS
3
smaller angular steps, so the torque system is always at or near
null. Large digital steps, load disturbances, a stuck torque
receiver or one synchro line open, however, causes an off null
condition.
sonable values but introduces another problem – the torque
receiver can hang up in a continuous current limited condition at
a false stable null. Fortunately, the DSC-10510 has special cir-
cuits that sense this continuous current overload condition and
sends a momentary 45° “kick” to the torque receiver thus knock-
ing it off the false null. The torque receiver will then swing to the
correct angle and properly null. If the torque receiver is stuck it
will, not be able to swing off the over-current condition. In this
case the converter will send a BIT signal when the case exceeds
140°C. This BIT signal can be used to shut down the output
power stage.
Theoretically, at null the load current could be zero (See FIGURE
9 ). If Vac = Vab, both in magnitude and phase, then, when “a”
was connected to “b,” no current would flow. Pick C1 and C2 to
match the phase lead of R1 – Zso. In practice this ideal situation
is not realized. The input to output transformation ratio of torque
receivers are specified at 2% and the turns ratio at 0.4%. The in-
phase current flow due to this nominal output voltage (10.2 V)
multiplied by the % error (2.4/100) divided by total resistance (4
Ohms) = 61mA. A phase lead mismatch between the torque
receiver and the converter of 1 degree results in a quadrature
current of 10.2 V x sin 1°/4 Ohms = 44.5 mA. Total current is the
phaser sum 61 + 44.5 = 75.5 mA . Power dissipation is 30 VDC
x 75.5 mA rms x 0.9 (avg/rms) = 2.04 Watts. Since this is a light
load condition, even pulsating supplies would be approximating
DC supplies.
An additional advantage of using pulsating power supplies is that
the loss of reference when driving torque loads is fail safe. The
load will pump up the ±V voltage through the power stage clamp
diodes and the loss of the reference detector will disable the
power stage. The power stage will, therefore, be turned off with
the needed power supply voltages. The pulsating power supply
diodes will isolate the pumped up pulsating supplies from the ref-
erence. If the DC power supplies are to be used for the power
stage and there is a possibility of the DC supplies being off while
the reference to the torque receiver is on, then the protection cir-
cuitry shown in FIGURE 11 is highly recommended.
The off null condition power dissipation is quite different. Real
synchros have no current limiting, so that the circuit current
would be the current that the circuit conditions demanded. The
worst case would be for a 180 degree error between the two
synchros as shown in FIGURE 10. For this condition the two
equivalent voltage sources would be 10.2 V opposing. The cur-
rent would be (10.2 x 2) / 4 = 5.1 A in phase. The power dissi-
pated in the converter is the power supplied by the ±15 VDC sup-
plies minus the power delivered to the load. (30 V x 5.1 A x 0.9)
- (10.2 V x 5.1 A) = 87.7 Watts for DC supplies. This would
require a large power supply and high wattage resistors. The
converter output current is usually limited (in the DSC-10510
case to 0.8 A peak). This limits the power supply to more rea-
A remote sense feature is incorporated in DDC’s DSC-10510
hybrid digital-to-synchro converter. Rated at 7 VA, it offers accu-
racies to ±2 minutes of arc at the load. This remote sense fea-
ture operates just as other precision sources do. A separate line
is run to each leg of the synchro (in addition to the drive line) to
sense the voltage actually appearing on the load. This is then
used to regulate the output based on load voltage rather than
converter output voltage. This feature is very useful in driving
heavy passive loads in precision systems.
R1
R2
R1
R2
+15VDC
LIGHT LOAD
HEAVY LOAD
REF
REF
TORQUE TRANSMITTER
TORQUE RECEIVER
-15VDC
FIGURE 4. LOADED WAVEFORMS
FIGURE 6. TORQUE SYSTEM
2-WIRE REF
3-WIRE SYNCHRO
R1=2/3Ω
R2=1 1/3Ω
11/3Ω
2/3Ω
2Ω
RH
REF
ZSO=8.6Ω
D/S
REF IN
D/S
ZSO=8.6Ω
REF
REF IN
ACTIVE LOAD
RL
TORQUE LOAD WITH DISCRETE EXTERNAL RESISTOR
NOTES:
R1 + R2 ZSS
FIGURE 7. D/S EQUIVALENT
FIGURE 5. EQUIVALENT 2-WIRE CIRCUIT
4
1.33Ω
S1
S2
S3
S1
S2
RH
RL
1.33Ω
1.33Ω
D/S
TR
REF IN
REF
S3
FIGURE 8. D/S – ACTUAL HOOK-UP
R1
2Ω
1 1/3Ω
2/3Ω
C1
C2
RH
A
C
B
REF
Zso=8.6Ω
D/S
REF IN
RL
FIGURE 9. IDEAL NULL CONDITION
+15VDC
+
+15V
2Ω
2Ω
+V
D/S
10.2V
10.2V
D/S
-V
-V
- 15V
-15VDC
FIGURE 10. WORST CASE 180° ERROR
FIGURE 11. PROTECTION CIRCUITRY
5
200 ns min.
TRANSPARENT
LATCHED
DATA 1-16 BITS
50 ns min.
100 ns min.
FIGURE 12. LL, LM, LA TIMING DIAGRAM
TABLE 2. DSC-10510 PIN FUNCTIONS
PIN NAME
FUNCTION
1
2
3
4
5
6
7
8
9
D01
D02
D03
D04
D05
D06
D07
D08
D09
Digital Input 01 (MSB) Logic “1” enables.
Digital Input 02
Digital Input 03
Digital Input 04
Digital Input 05
Digital Input 06
Digital Input 07
Digital Input 08
Digital Input 09
Digital Input 10
Digital Input 11
Digital Input 12
Digital Input 13
Digital Input 14
Digital Input 15
Digital Input 16 (LSB)
0.17 MIN
(4.32)
1.140
(28.96)
10 D010
11 D011
12 D012
13 D013
14 D014
15 D015
16 D016
17 RL
20
21
0.018 ±0.002
(0.46 ±0.05)
DIA PIN
26 Vrms Reference Low Input
26 Vrms Reference High Input
Synchro S1 Remote Sense Output
Synchro S1 Output
18 RH
19 S1'
20 S1
19 EQ. SP.
0.100 = 1.9
TOL. NONCUM
(2.5 = 48.3)
2.14
(54.36)
21 S2
Synchro S2 Output.
22 S3
Synchro S3 Output
23 +V
Power Stage +V
24 -V
Power Stage - V
25 S2'
26 S3'
Synchro S2 Remote Sense Output
Synchro S3 Remote Sense Output
No connection.
Ground
Power Supply
27 NC
28 GND
29 -15 V
30 +15 V
31 LA
32 LL
33 LM
34 RL'
35 RH'
36 -R (TP)
37 EN
1
40
0.900
(22.86)
0.120 ±0.002
(3.05 ±0.05)
Power Supply
0.120 ±0.002
(3.05 ±0.05)
2nd Latch All Enable. Input enables dual latch.
1st Latch LSBs Enable. Enables bits 9-16.
1st Latch MSBs Enable. Enables bits 1-8.
3.4 Vrms Reference Low Input
3.4 Vrms Reference High Input
No connection. Factory test point.
Enable. Power stage enable input allows for digital
shutdown of power stage. Gives complete control
of converter to digital system.
Battle Short Input. Logic 0 overrides over tempera-
ture protection.
Built-ln-Test Output. Logic 0 when loss of refer-
ence, loss of ±15 VDC supply, case temperature
of +140°C, EN input signal, or an output over-cur-
rent has been detected. Power output stage is
turned off unless BS is at 0.
Kick. Input used for reducing excessive current
flow in torque receiver loads at false null.
0.200 MAX
(5.08)
BOTTOM VIEW
SIDE VIEW
Notes:
1. Dimensions are in inches (millimeters).
2. Lead identification numbers for reference only.
3. Lead cluster shall be centered within ±0.10 of outline dimensions. Lead spacing
dimensions apply only at seating plane.
38 BS
39 BIT
4. Pin material meets solderability requirements of MIL-PRF-38534.
40
K
FIGURE 13. DSC-10510 MECHANICAL OUTLINE
40-PIN TDIP
6
ORDERING INFORMATION
DSC-10510-X X X X
Supplemental Process Requirements:
S = Pre-Cap Source Inspection
L = Pull Test
Q = Pull Test and Pre-Cap Inspection
Blank = None of the Above
Accuracy:
3 = ±4 minutes
4 = ±2 minutes
Process Requirements:
0 = Standard DDC Processing, no Burn-In (See table below.)
1 = MIL-PRF-38534 Compliant
2 = B*
3 = MIL-PRF-38534 Compliant with PIND Testing
4 = MIL-PRF-38534 Compliant with Solder Dip
5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip
6 = B* with PIND Testing
7 = B* with Solder Dip
8 = B* with PIND Testing and Solder Dip
9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.)
Temperature Grade/Data Requirements:
1 = -55°C to +125°C
2 = -40°C to +85°C
3 = 0°C to +70°C
4 = -55°C to +125°C with Variables Test Data
5 = -40°C to +85°C with Variables Test Data
8 = 0°C to +70°C with Variables Test Data
*Standard DDC Processing with burn-in and full temperature test — see table below.
For DSC-10510 use optional Power Transformer, DDC P/N 42359
For S2 Grounded Applications, use Transformer DDC P/N 42929.
STANDARD DDC PROCESSING
MIL-STD-883
TEST
METHOD(S)
CONDITION(S)
INSPECTION
SEAL
2009, 2010, 2017, and 2032
—
1014
1010
A and C
TEMPERATURE CYCLE
CONSTANT ACCELERATION
BURN-IN
C
A
2001
1015, Table 1
—
7
The information in this data sheet is believed to be accurate; however, no responsibility is
assumed by Data Device Corporation for its use, and no license or rights are
granted by implication or otherwise in connection therewith.
Specifications are subject to change without notice.
105 Wilbur Place, Bohemia, New York 11716-2482
For Technical Support - 1-800-DDC-5757 ext. 7389 or 7413
Headquarters - Tel: (631) 567-5600 ext. 7389 or 7413, Fax: (631) 567-7358
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Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689
World Wide Web - http://www.ddc-web.com
ILC DATA DEVICE CORPORATION
REGISTERED TO ISO 9001
FILE NO. A5976
G1-08/99-0
PRINTED IN THE U.S.A.
8
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