DEM-ADS7815U [ETC]
DEM-ADS7815U - EVALUATION FIXTURE ; DEM - ADS7815U - 评价灯具\n
| 型号： | DEM-ADS7815U |
| 厂家： | 
ETC |
| 描述： | DEM-ADS7815U - EVALUATION FIXTURE
|
| 文件： | 总6页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DEM-ADS7815U
EVALUATION FIXTURE
FEATURES
● COMPUTER INTERFACE
● STAND-ALONE CAPABILITY
● BREADBOARD AREAS
APPLICATIONS
● TRANSDUCER INTERFACE
● MULTIPLEXED DAS
● INPUT RANGE EASILY CONFIGURED
FOR APPLICATION
a gain of +2V/V to the converter. The voltage refer-
ence to the chip is generated by Burr-Brown’s
REF1004-2.5 (U6) and buffered with the operational
amplifier, U2. Additionally, the on board oscillator
chip is used to generate a clock frequency of 25kHz to
the DUT. Finally, the edge-triggered, D-type flip-flop
array, U7 and U8 are enabled by tying OE to GND.
DESCRIPTION
The DEM-ADS7815U evaluation fixture is designed
for quick evaluation of Burr-Brown’s ADS7814 and
ADS7815 in the 28-pin SOIC package. Breadboard
areas are provided with optional bipolar power supply
connections to assist in the evaluation of various
driver amplifiers or multiplexed input circuits. Addi-
tionally, the demonstration fixture has flexibility in its
clocking circuit to allow for various fixed conversion
rates. To further enhance the clocking network, an
external off board clock can be connected through the
BNC connector, P3. The DEM-ADS7815U has been
designed to accommodate stand-alone operation, as
well as interfacing to Burr-Brown’s DEM-CIB (Uni-
versal PC interface board).
With this jumper configuration the digital portion of
the circuit sets the DUT in a continuous conversion
mode with the parallel digital output available on the
connector P1, pins 1 through 31.
DEM-ADS7815U BOARD DESCRIPTION
All of the jumper functions for the DEM-ADS7815U
are shown in Table I. These jumpers affect the circuit’s
analog front-end, reference circuit, clocking circuit,
and the digital interface to the connector, P1.
GETTING STARTED
For quick, first time evaluations, it is recommended
that the board be powered with ±5V supplies to P4. P4
provides power to all the components on DEM-
ADS7815U. The breadboard power connector, P5,
provides power to the breadboard busses, +VS and
–VS. For first time evaluations, P5 should not be used.
The ground connection of both power connectors are
tied together with the single ground plane.
JUMPER
NAME
JUMPER FUNCTION
J1, J2, J5
Used to configure the input analog source to the
driver amplifier (U1). See Table II.
J3, J4
J6
Used to configure the clock generation circuit. See
Table IV.
Used to configure reference voltage input. See
Table III.
The factory set position of the jumpers are shown
below.
J7
Enable/Disable for the DUT parallel digital output to
P1. Position B manually enables the edge-triggered
D-type flip-flops. Position A manually configures the
output of the flip-flops into high impedance. When
the DEM-CIB computer interface board is used, J7
should not be installed.
J1 = C, F
J5 = Not Installed
J6 = A
J7 = B
J2 = Installed
J3 = Installed
J4 = A
TABLE I. Description of Jumpers on DEM-ADS7815U
Demonstration Fixture.
With this jumper configuration the analog input signal
path is configured to use P2 for the signal source with
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
FAXLine: (800) 548-6133 (US/Canada Only)
• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
© 1997 Burr-Brown Corporation
LI-499
Printed in U.S.A. July, 1997
ANALOG INPUT CONFIGURATIONS
User Designed Voltage Reference—The breadboard sec-
tion includes a REF bus to allow for the integration of user
designed voltage reference. When this option is used, it is
Analog Source Options: J1, J2, J5, and P2—The input of
the A/D converter (DUT) can be driven by the high speed
voltage feedback amplifier, OPA642 (U1) or by breadboard
circuitry. The functions of the jumpers are summarized in
Table II.
recommended that J6 does not have a jumper installed.
CLOCK NETWORK AND DIGITAL INTERFACE
Clock Network: J3, J4 and P3—The clock network in-
cludes U3 (10MHz oscillator) and U4 and U10 (clock divide
network). The 10MHz signal from U3 is divided by 40 and
finally buffered by U5. J3 provides power to U3, U4, and
U10. To utilize the on board clock, J4 must have a jumper
top in position A (see Table IV). If an external clock is used,
the BNC connector P3 can be used along with a
reconfiguration of J4.
ANALOG INPUT FUNCTION
J1
J2
J5
Non-inverting input from P2 (G = 1 + R2/R1).
Buffered input from P2 (G = +1).
C, F
C
Installed
Installed
Installed
Open
Open
Non-inverting input from P2 (G = 1 + R2/R1)
with offset adjust enabled.
C, F
Installed
Inverting input from P2 (G = – R2/R1).
B, D
B, D
Installed
Installed
Open
Inverting input from P2 (G = – R2/R1)
with offset adjust enabled.
Installed
Non-inverting input from breadboard IN bus
through U1 (G = 1 + R2/R1).
A, C, F
A, C
Installed
Installed
Installed
Installed
Installed
Open
Open
Open
CLOCK OPTION
External Clock (P3)
On Board Clock
J4
J3
Connected
No Jumper
No Jumper
Connected
Non-inverting input from breadboard IN bus
through U1 (G = +1).
Non-inverting input from breadboard IN bus
through U1 (G = 1 + R2/R1) with offset adjust enabled.
A, C, F
A, B, D
A, B, D
D
Installed
Open
TABLE IV. Jumper Configuration of Clock Options on the
DEM-ADS7815U Demonstration Fixture.
Inverting input from breadboard IN bus through
U1 (G = 1 + R2/R1).
Inverting input from breadboard IN bus through
U1 (G = 1 + R2/R1) with offset adjust enabled.
Installed
Open
External Digital Interface—All critical digital lines are
connected to the 25 x 2 pin connector, P1 (see Table V). The
quad 2-input NAND Gate, U5 is used to insure that the
proper timing of R/C, BUSY and CS are applied to the
converter. For more details concerning the timing of the
ADS7814 and ADS7815, refer to their respective product
data sheets.
Input from breadboard AIN bus, to input of DUT.
TABLE II. The Jumper Settings for (J1, J2, and J5) are Used
to Interface the DUT with the Analog Portion of
the Demonstration Fixture, ie., theAmplifiers and
the Breadboard Areas.
The P1 connector is designed to interface to Burr-Brown’s
Computer Interface Board, DEM-CIB. The DEM-CIB and
accompanying Windows compatible program allows the
performance of the ADS7814 and ADS7815 to be evaluated
directly from a PC.
EXTERNAL VOLTAGE REFERENCE OPTIONS
Precision Voltage Reference—The ADS7814 and ADS7815
require an external voltage reference for proper operation.
The DEM-ADS7815U board supplies that reference through
U6, a 2.5V reference and U2, an operational amplifier that
is used as a low impedance buffer to the reference pin of the
DUT. If the on board reference is used in the evaluation,
position A of J6 shorted with a jumper top, as shown in
Table III.
Additionally, the user of the DEM-ADS7815U can use the
board in a stand-alone mode, using P1 as the interface
connection to a user designed interface.
P1 PIN NUMBER
PIN DESCRIPTION
Adjustable Voltage Reference—An adjustable reference is
provided with the inclusion of the potentiometer, R6, and the
jumper J6. The primary function of this portion of the circuit
is to provide gain adjustment capability. The correct jumper
configuration for this option is summarized in Table III.
All Even Pins
Ground
Odd Pins 1 - 31
U7 and U8 external buffer output of the parallel
digital output from the DUT.
35
Enable/Disable for the DUT parallel digital output
to P1. When P1-35 is LOW the edge-triggered
D-type flip-flops are enabled. When P2-35 is HIGH,
the flip-flops are placed into a high impedance
mode. When the DEM-CIB Computer Interface
Board is used, J7 should not be installed.
J6 CONFIGURATION
DESCRIPTION
A
Applies the on board reference (U6 and U2) to
the reference pin of the DUT, 2.5V nominal.
39
43
CS (Chip Select), connected to UX9 (DUT) pin 13
BUSY, connected to UX9 (DUT) pin 26
A, B
Applies the on board reference (U6 and U2) to
the reference pin of the DUT. Also allows for gain
adjustment by using the potentiometer, R6, 2.5V
nominal.
TABLE V. External Digital Interface Connector, P1 Pin
Description.
No Jumper Installed
This configuration is used if the user is taking
advantage of the breadboard area to design a
custom reference circuit.
TABLE III. Function of the Voltage Reference Jumper, J6.
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DEM-ADS7815U
PART IDENTIFIER
QUANTITY
PART NUMBER
DESCRIPTION
DUT
1
1
ADS7815U
16-Bit, High Speed, SAR, A/D Converter
DUT (socket)
SOP-28B-SMT-TT
SMT SOP Socket, 28-Pin, 0.375 Row Spacing, Body and Frame,
Robinson Nugent
DUT (removal tool)
1
1
1
2
1
1
1
2
1
13
1
1
6
2
1
1
3
3
1
2
2
1
2
2
3
2
1
2
2
3
1
9
5
1
SOP-28B-REMTOOL
CTX114-ND(1)
Frame Removal Tool for the DUT socket, Robinson Nugent
Clock Oscillator, 10MHz, Digi-Key (CTS)
14-Pin Oscillator Socket, Aries
U3
U3 (socket)
1107741
U1, U2
OPA642U(3)
High Speed, Single, Voltage Feedback, Operational Amplifier, Burr-Brown
Dual, D-Type Flip-Flop, SOIC, TI
U4
74AC11074D(1)
U5
SN74HC00D(1)
NAND Gate, Quad, 2 Input, SOIC, TI
2.5V Reference, Burr-Brown
U6
REF1004C-2.5(2)
74HC574D(1)
U7, U8
Latch, Octal D-Type, 3-State Output, TI
Counter, Decade, Dual, 4-Bit, TI
U10
74HC390D(1)
C1 - C4, C6, C10, C12, C17, C18, C20 - C23
C1206C104K5RAC(1)
CK05BX104K(1)
CD5FC101503(1)
T491C225K025AS(1)
T491C106K025AS(1)
T491C105K020AS(1)
TSW-106-07-T-D(1)
TSW-101-07-T-D(1)
TSW-102-07-T-D(1)
IDH-50LP-SR3-TG(1)
KC-79-274-M06(1)
ED300/3
Capacitor, 0.01µF, 50V, 10%, chip-ceramic X7R
Capacitor, 0.1µF, 10%, Ceramic X7R
C5
C7
Capacitor, Dipped Mica, 100pF, CDE
C8, C9, C13 - C16
C11, C19
C24
Capacitor, 2.2µF, 25V, 10%, Tantalum Chip-Molded
Capacitor, 10µF, 20V, 10%, Tantalum Chip-Molded
Capacitor, 1µF, 25V, 10%, Tantalum Chip-Molded
Jumper, 2 x 6, Terminal Strip, SAMTEC
Jumper, 1 x 2, Terminal Strip, SAMTEC
Jumper, 2 x 2, Terminal Strip, SAMTEC
Right Angle, Header 25 x 2 Robinson Nugent
Connector BNC, PCB Mount, KING
J1
J2, J3, J5
J4, J6, J7
P1
P2, P3
P4, P5
R1
Terminal Block, 3 Pin, ON-SHORE Technology
Resistor, 75Ω, 0.125W, 1%, Metal-Film
Resistor, 75Ω, 0.125W, 1%, Chip-Thick-Film
Resistor, 710Ω, 0.125W, 1%, Chip-Thick-Film
Resistor, 49.9kΩ, 0.125W, 1%, Chip-Thick-Film
Resistor, 100kΩ, 1/4W, 14 turn Potentiometer
Resistor, 49.9Ω, 0.125W, 1%, Metal Film
Resistor Network, 100Ω, Digi-Key (Bourns)
Resistor, 100Ω, 0.125W, 1%, Chip-Thick-Film
Resistor, 10kΩ, 0.125W, 1%, Chip-Thick-Film
Resistor, 1.62kΩ, 0.125W, 1%, Chip-Thick-Film
Jumper Tops, Samtec
RN55C75R0F(1)
CRCW120675R0F(1)
CRCW120610R0F(1)
CRCW12064992F(1)
ST5W104CT-ND(1)
RN55C49R9F(1)
4816P-1-101-ND(1)
CRCW12061000F(1)
CRCW12061002F(1)
CRCW12061621F(1)
SNT-100-BK-T-H
SJ5523-O-ND
R2, R15
R3, R9
R4, R7, R8
R5, R6
R10
R11, R12
R13, R14
R16, R17, R19
R18
Jumper Tops
Rubber Feet
Bumpons, 3M
A2207
Bare Board Number
NOTES: (1) Vender substitutions allowed providing specifications in description portion of table are met. (2) REF1004-2.5C from Burr-Brown is allowed as
substitution. (3) OPA642UB from Burr-Brown is allowed as substitution.
TABLE VI. Parts List for the DEM-ADS7815U.
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DEM-ADS7815U
FIGURE 1. Circuit Diagram of the DEM-ADS7815U Demonstration Fixture.
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DEM-ADS7815U
FIGURE 2. Silkscreen of the DEM-ADS7815U Demonstration Fixture.
FIGURE 3. Component Side of the DEM-ADS7815U Demonstration Fixture.
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DEM-ADS7815U
FIGURE 4. Top Soldermask of the DEM-ADS7815U Demonstration Fixture.
FIGURE 5. Ground Plane of the DEM-ADS7815U Demonstration Fixture.
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DEM-ADS7815U
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