DDU8C-5100MD4 [ETC]
Delay Line ; 延迟线\n
| 型号： | DDU8C-5100MD4 |
| 厂家： | 
ETC |
| 描述： | Delay Line
|
| 文件： | 总4页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DDU8C
Ò
5-TAP, HCMOS-INTERFACED
FIXED DELAY LINE
(SERIES DDU8C)
data
delay
3
devices, inc.
FEATURES
PACKAGES
1
2
3
4
5
6
7
14
13
12
11
10
9
VDD
N/C
T1
N/C
T3
N/C
T5
IN
N/C
N/C
T2
N/C
T4
IN
T2
VDD
·
·
·
·
·
·
Five equally spaced outputs
Fits standard 8-pin DIP socket
Low profile
1
2
3
4
8
T1
T3
T5
7
6
5
T4
GND
Auto-insertable
8
GND
Input & outputs fully CMOS interfaced & buffered
DDU8C-xx
DDU8C-xxA1 Gull-Wing
DDU8C-xxB1 J-Lead
DIP
10 T2L fan-out capability
Military SMD
DDU8C-xxMD1
DDU8C-xxMD4
DDU8C-xxM Military DIP
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The DDU8C-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). The total
delay of the line is measured from IN to T5. The nominal tap-to-tap delay
increment is given by one-fifth of the total delay.
IN
Signal Input
T1-T5 Tap Outputs
VDD +5 Volts
GND Ground
DASH NUMBER SPECIFICATIONS
SERIES SPECIFICATIONS
Part
Number
Total
Delay (ns)
50 ± 2.5
60 ± 3.0
Delay Per
Tap (ns)
·
·
·
·
Minimum input pulse width: 40% of total delay
Output rise time: 8ns typical
Supply voltage: 5VDC ± 5%
Supply current: ICCL = 40ma typical
ICCH = 10ma typical
Operating temperature: 0° to 70° C
Temp. coefficient of total delay: 300 PPM/°C
DDU8C-5050
DDU8C-5060
DDU8C-5075
DDU8C-5100
DDU8C-5125
DDU8C-5150
DDU8C-5175
DDU8C-5200
DDU8C-5250
10.0 ± 3.0
12.0 ± 3.0
15.0 ± 3.0
20.0 ± 3.0
25.0 ± 3.0
30.0 ± 3.0
35.0 ± 4.0
40.0 ± 4.0
50.0 ± 5.0
75 ± 4.0
100 ± 5.0
125 ± 6.5
150 ± 7.5
175 ± 8.0
200 ± 10.0
250 ± 12.5
·
·
NOTE: Any dash number between 5004 and 5250
not shown is also available.
20%
20%
20%
20%
20%
VDD IN
T1
T2
T3
T4
T5 GND
DDU8C Functional diagram
Ó1997 Data Delay Devices
Doc #97013
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
1/28/97
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DDU8C
APPLICATION NOTES
Delay Devices if your application requires device
testing at a specific input condition.
HIGH FREQUENCY RESPONSE
The DDU8C tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 40% of the total delay and periods as
small as 80% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
POWER SUPPLY BYPASSING
The DDU8C relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VDD to GND,
located as close as possible to the VDD pin, is
recommended. A wide VDD trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VDD
VIN
TSTRG
TLEAD
MIN
-0.3
-0.3
-55
MAX
7.0
VDD+0.3
150
UNITS NOTES
V
V
C
300
C
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
High Level Output Voltage
VOH
3.98
4.4
V
VDD = 5.0, IOH = MAX
VIH = MIN, VIL = MAX
VDD = 5.0, IOL = MAX
VIH = MIN, VIL = MAX
Low Level Output Voltage
VOL
0.15
0.26
V
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Current
IOH
IOL
VIH
VIL
IIH
-4.0
4.0
mA
mA
V
V
mA
3.15
1.35
0.10
VDD = 5.0
Doc #97013
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
1/28/97
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DDU8C
PACKAGE DIMENSIONS
8
1
7
2
6
3
5
4
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
8
7
2
6
3
5
4
.440
MAX.
.280
MAX.
1
.500 MAX.
.500 MAX.
.290
MAX.
.290
MAX.
.020
TYP.
.015 TYP.
.070 MAX.
.010±.002
.018
TYP.
.180
TYP.
.350
MAX.
.300±.010
.010 TYP.
3 Equal spaces
each .100±.010
Non-Accumulative
.020
TYP.
.300
TYP.
.300
TYP.
DDU8C-xxM (Military DIP)
DDU8C-xx (Commercial DIP)
.020
TYP.
.040
TYP.
.010 TYP.
.020
TYP.
.040
TYP.
.050 TYP.
8
1
7
2
6
3
5
4
8
1
7
2
6
3
5
4
.320
TYP.
.270
TYP.
.430
TYP.
.270
TYP.
.100
.300
.110
.300
MAX.
.100
.300
.110
.350
MAX.
.110
TYP.
.050
TYP.
.520 MAX.
.520 MAX.
DDU8C-xxA1 (Commercial Gull-Wing)
DDU8C-xxB1 (Commercial J-Lead)
.650
.100
.017
.100
.017
1
7
14
8
1
7
14
8
.510
MAX.
.300
TYP.
.510
MAX.
.300
TYP.
.050
.100
.080
.050
.025
.100
.510 MAX.
.360 TYP.
.300
.510 MAX.
.300
.080
.200 MAX. (Com)
.225 MAX. (Mil)
.008
.200 MAX. (Com)
.225 MAX. (Mil)
.008
.045
.065
TYP.
.360
TYP.
.065
TYP.
.005
.065 TYP.
.065 TYP.
DDU8C-xxD1 (Commercial SMD)
DDU8C-xxMD1 (Military SMD)
DDU8C-xxD4 (Commercial SMD)
DDU8C-xxMD4 (Military SMD)
Doc #97013
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
1/28/97
Powered by ICminer.com Electronic-Library Service CopyRight 2003
DDU8C
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (VDD): 5.0V ± 0.1V
Load:
Cload
1 FAST-TTL Gate
5pf ± 10%
:
Input Pulse:
High = 5.0V ± 0.1V
Threshold: 2.5V (Rising & Falling)
Low = 0.0V ± 0.1V
Source Impedance:
Rise/Fall Time:
50W Max.
5.0 ns Max. (measured
between 0.5V and 4.5V )
PWIN = 1.5 x Total Delay
PERIN = 10 x Total Delay
Pulse Width:
Period:
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PRINTER
COMPUTER
SYSTEM
REF
PULSE
GENERATOR
OUT
IN
T1
T2
T3
T4
T5
IN
TIME INTERVAL
COUNTER
DEVICE UNDER
TEST (DUT)
TRIG
TRIG
Test Setup
PERIN
PWIN
VIH
TRISE
TFALL
INPUT
SIGNAL
4.5V
2.5V
0.5V
4.5V
2.5V
0.5V
VIL
TRISE
TFALL
OUTPUT
SIGNAL
VOH
2.5V
2.5V
VOL
Timing Diagram For Testing
Doc #97013
1/28/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
4
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