AS2316 [ETC]
Secondary Side Housekeeping Circuit; 次级侧电路家政服务
| 型号： | AS2316 |
| 厂家： | 
ETC |
| 描述： | Secondary Side Housekeeping Circuit |
| 文件： | 总10页 (文件大小：64K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AS23xx
Secondary Side Housekeeping Circuit
Fea tures
Descrip tion
Standard PC Power Good:
•
The AS23xx is a housekeeping circuit for monitoring the outputs of power
supplies. Itdirectlysensesalltheoutputrailswithouttheneedforexternaldividers
and detects undervoltage and overvoltage. It also provides an additional
undervoltage comparator which may be configured with any arbitrary hysteresis
to sense a divided down representation of the AC bulk voltage. The housekeeping
section provides all the features necessary to allow external caps to set the
commontimingfeaturesofPCtypepowersupplies. Inaddition, negativerailsmay
be sensed without the necessity of a VEE connection, and negative sensing may
be disabled without affecting operation of the positive sense section. The 2.5 V
series reference is available and can source up to 5 mA. This IC is available in
16 lead packages. Outputs include a POK (Power OK) and a fault signal.
UV Detection on 4 rails
UV Detection of AC/Bulk supply
OV Detection on 4 rails
Open collector PG out
Pogrammable Fault output:
OV
•
OV plus UV
OV plus UV after startup delay
OV Crow Bar Driver
•
•
•
•
Digital ON/OFF input
The AS2333 includes sensing for ±12 V, 5 V, and 3.3V. The AS2350 exchanges
a -5 V sense capability for the 3.3 V input. The AS2316 monitors all supply
voltages, but lacks CBD (Crow-Bar Driver).
2.5V Voltage Reference
Operates from 5V or 12V rail
Pin Config ura tion
—
Top view
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 CBD
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 FAULT
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 CBD
15 FAULT
14 VREF
15 VREF
15 FAULT
14 VREF
14 UVB
+3.3V
-12V
GND
HYST
OFF
13 UVB
+3.3V
-5V
13 DELAY
12 POK
11 PGCAP
10 AC
-5V
13 UVB
12 DELAY
11 POK
-12V
GND
HYST
OFF
12 DELAY
11 POK
-12V
GND
HYST
10 PGCAP
10 PGCAP
AC
OFF
AC
9
9
9
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 FAULT
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 CBD
VCC
+12V
+5V
1
2
3
4
5
6
7
8
16 CBD
AS2316 SOIC
AS2333 SOIC
AS2350 SOIC
15 VREF
14 UVB
13 DELAY
12 POK
11 PGCAP
10 AC
15 FAULT
14 VREF
15 FAULT
14 VREF
+3.3V
-5V
+3.3V
-12V
GND
HYST
OFF
13 UVB
-5V
13 UVB
12 DELAY
11 POK
-12V
GND
HYST
OFF
12 DELAY
11 POK
-12V
GND
HYST
10 PGCAP
10 PGCAP
OFF
9
AC
AC
9
9
AS2333 PDIP
AS2350 PDIP
AS2316 PDIP
Ord ering Inform a tion
Package
Temperature Range
Order Code
16-Pin Plastic SOIC
16-Pin Plastic SOIC
16-Pin Plastic SOIC
16-Pin Plastic DIP
16-Pin Plastic DIP
16-Pin Plastic DIP
0 to 105° C
0 to 105° C
0 to 105° C
0 to 105° C
0 to 105° C
0 to 105° C
AS2316D
AS2333D
AS2350D
AS2316N
AS2333N
AS2350N
© ASTEC Semiconductor
91
AS23xx
Secondary Side Housekeeping Circuit
Functiona l Block Dia g ra m
V
REF
nUV
V
CC
V
GND
UV
CC
+12V
V
CC
nRESET
R
nO V
FAULT
OV
Latch
nO VLatch
t
S
Q
20 µs delay
nUVLatch
UV
R
Latch
+5V
Q
S
nFAULT
V
OV
CC
CBD Latch powers up
in RESET state.
S
Q
Latch
R
UV
+3.3V
CBD
nRESET
500
V
nO V
OV
CC
OV
1µA
UVB
nUV
V
REF
nUVLatch
V
CC
UV
- 5V
HYST
Disable
V
REF
V
CC
1µA
nO V
PGCAP
t
OV
nPO K
20 µs delay
nUV
V
CC
UV
POK
V
REF
- 12V
AC
Disable
V
REF
V
CC
V
REF
nAC WARNING
V
1µA
REF
nFAULT
DELAY
HYST
OFF
V
CC
V
nRESET
REF
V
REF
2.5V
nOFF WARNING
chip b ias
ASTEC Semiconductor
92
Secondary Side Housekeeping Circuit
AS23xx
Pin Function Descrip tion (For AS2333 / AS2350)
Pin Number
Function
VCC
Description
1
2
3
4
Power input to the chip.
+12 V
Input for overvoltage and undervoltage for the +12 V rail.
Input for overvoltage and undervoltage for the +5 V rail.
+5 V
+3.3/–5 V
Input for overvoltage and undervoltage for the +3.3V rail or –5 V rail, depending on
product option.
5
–12 V
Input for overvoltage and undervoltage for the –12 V rail. This function may
disabled by tying this pin to a positive voltage above 2.4 V.
6
7
GND
Signal ground and silicon substrate.
HYST
Open collector output of the AC undervoltage comparator. A resistor between this pin
and AC will provide hysteresis to the AC undervoltage sensing.
8
OFF
Pulling this pin low will reset the FAULT latch and discharge the start-up timing
capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin
high will send the FAULT signal high, prompting a system shutdown.
9
AC
Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is
less than 2.5 V, POK goes low and UVB cap discharges.
10
PG CAP
A cap to ground provides a delay between undervoltage sensing becoming good
and the POK output going high. Cap discharges whenever an output or AC
undervoltage is detected.
11
12
13
POK
DELAY
UVB
Open collector output of the undervoltage sensing comparators. This pin goes low
upon an undervoltage condition. Except for the delay set by the PG CAP, this pin
always reflects the actual state of the undervoltage sensing.
A cap to ground will delay the FAULT signal when the OFF pin is used to shut down
the system. The POK will signal a power fail warning immediately, but the FAULT
shutdown of the power supply will be delayed.
A cap to ground provides start-up blanking of the undervoltage sensing portion of the
FAULT signal. This pin may also be grounded to prevent undervoltage conditions from
triggering the FAULT signal. This pin discharges the cap whenever AC goes low or
FAULT pin goes high.
14
15
16
VREF
FAULT
CBD
2.5 V Voltage reference. This is a series regulator type reference.
Open collector output of the overvoltage and undervoltage comparators.
Crow bar drive output of the overvoltage faults only.
ASTEC Semiconductor
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AS23xx
Secondary Side Housekeeping Circuit
Pin Function Descrip tion (For AS2316)
Pin Number
Function
VCC
Description
1
2
3
4
5
6
Power input to the chip.
+12 V
+5 V
Input for overvoltage and undervoltage for the +12 V rail.
Input for overvoltage and undervoltage for the +5 V rail.
Input for overvoltage and undervoltage for the +3.3V rail.
Input for overvoltage and undervoltage for the –5 V rail.
+3.3
–5 V
–12 V
Input for overvoltage and undervoltage for the –12 V rail. This function may
disabled by tying this pin to a positive voltage above 2.4 V.
7
8
GND
Signal ground and silicon substrate.
HYST
Open collector output of the AC undervoltage comparator. A resistor between this pin
and AC will provide hysteresis to the AC undervoltage sensing.
9
OFF
Pulling this pin low will reset the FAULT latch and discharge the start-up timing
capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin
high will send the FAULT signal high, prompting a system shutdown.
10
11
AC
Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is
less than 2.5 V, POK goes low and UVB cap discharges.
PG CAP
A cap to ground provides a delay between undervoltage sensing becoming good
and the POK output going high. Cap discharges whenever an output or AC
undervoltage is detected.
12
13
14
POK
DELAY
UVB
Open collector output of the undervoltage sensing comparators. This pin goes low
upon an undervoltage condition. Except for the delay set by the PG CAP, this pin
always reflects the actual state of the undervoltage sensing.
A cap to ground will delay the FAULT signal when the OFF pin is used to shut down
the system. The POK will signal a power fail warning immediately, but the FAULT
shutdown of the power supply will be delayed.
A cap to ground provides start-up blanking of the undervoltage sensing portion of the
FAULT signal. This pin may also be grounded to prevent undervoltage conditions from
triggering the FAULT signal. This pin discharges the cap whenever AC goes low or
FAULT pin goes high.
15
16
VREF
2.5 V Voltage reference. This is a series regulator type reference.
Open collector output of the overvoltage and undervoltage comparators.
FAULT
ASTEC Semiconductor
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Secondary Side Housekeeping Circuit
AS23xx
Ab solute Ma xim um Ra ting s
Parameter
Symbol
VCC
PD
Rating
20
Unit
V
Supply Voltage
Continuous Power Dissipation at 25° C
Junction Temperature
1000
mW
°C
TJ
150
Storage Temperature Range
Lead Temperature, Soldering 10 Seconds
TSTG
TL
–65 to 150
300
°C
°C
StressesgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice. Thisisastress
rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recom m end ed Cond itions
Typ ica l Therm a l Resista nce
Parameter
Symbol
Rating
Unit
Package
θJA
θJC
Typical Derating
Supply Voltage
VCC
5 - 12
V
16L SOIC
65° C/W
45° C/W
10.0 mW/°C
16L PDIP
80° C/W
35° C/W
12.5 mW/°C
Electrica l Cha ra cteristics
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V;
+3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; –5 V = –5 V; OFF = low.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Bias
Supply Current
Min. VCC for operation
ICC
no faults
8
12
mA
V
VCC Min.
VREF = 2.5 V, no faults
4.2
Undervoltage, Overvoltage
+3.3 V (Not available on AS2350)
+3.3 V Undervoltage
+3.3 V Overvoltage
+3.3 V Input Current
+5 V
UV
OV
IB
2.87
3.76
-0.1
2.95
3.86
0
3.03
3.96
0.1
V
V
V+3.3 =+3.3V, V+5 =+5.0V
mA
+5 V Undervoltage
+5 V Overvoltage
+5 V Input Current
+12 V
UV
OV
IB
4.40
5.74
4.50
5.89
1.6
4.60
6.04
2.5
V
V
V+5 =+5.0V, V+3.3 =+3.3V
mA
+12 V Undervoltage
+12 V Overvoltage
+12 V Input Current
UV
OV
IB
10.25
14.53
10.50
14.90
0.8
10.60
15.27
1.5
V
V
V+12 =+12.0V
mA
ASTEC Semiconductor
95
AS23xx
Secondary Side Housekeeping Circuit
Electrica l Cha ra cteristics (cont’d )
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V;
+3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; –5 V = –5 V.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
–5 V (Not available on AS2333)
–5 V Undervoltage
–5 V Overvoltage
–5 V Input Current
–5 V Disable Voltage
–12 V
UV
OV
IB
– 3.80
– 6.00
– 4.00
– 6.25
–80
– 4.20
– 6.55
–150
2.4
V
V
V-5 =-5.0V
µA
V
VD
Minimum voltage to disable
2.3
–12 V Undervoltage
–12 V Overvoltage
–12 V Input Current
–12 V Disable Voltage
AC/HYST
UV
OV
IB
–9.20
–9.55
–15.04
–100
2.0
–9.80
–15.60
–200
2.2
V
V
–14.55
V-12 =-12.0V
µA
V
VD
Minimum voltage to disable
AC Undervoltage
AC Input Current
HYST High State Leakage
HYST Output Current
HYST Low Voltage
Outputs
UV
IB
TJ = 25° C
2.460
2.520
–0.5
0.01
3
2.540
–1
V
µA
µA
mA
V
IL
VHYST = 5 V; AC > 2.5 V
VHYST = 0.3 V; AC < 2.5 V
IHYST = 1 mA; AC < 2.5 V
1
IOL
VOL
1
0.3
POK High State Leakage
POK Output Current
IL
VPOK = 12 V; no faults
100
10
200
µA
IOL
VPOK = 0.4 V; VCC = 7 V undervoltage
condition
5
mA
FAULT High State Leakage
FAULT Output Current
IL
VFAULT = 12 V; OFF = High
0.01
1
µA
VOL
VFAULT = 0.4 V; no faults
VCC = 12 V
VCC = 5 V
3
1.3
10
4
mA
mA
CBD (Crow Bar Drive)
IOH
overvoltage condition
– 25
–35
mA
Minimum Output Current
CBD Output High Voltage
VOH
ICBD = 0 mA; T = 25 ° C
ICBD = 0 mA; T = 105 ° C; overvoltage
condition
2.0
1.4
2.5
3.0
3.3
V
V
CBD Pulldown Resistance
ROUT
ICBD = 1 mA; no faults
300
500
1000
1000
ASTEC Semiconductor
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Secondary Side Housekeeping Circuit
AS23xx
Electrica l Cha ra cteristics (cont’d )
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V;
+3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; –5 V = –5 V.
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Voltage Reference
Output Voltage
VREF
∆VREF
∆VREF
∆VREF
IREF = 0 mA, TJ = 25° C
VCC = 5 V to 15 V
IREF = 0 V to –5 mA
0 < TJ < 105° C
2.488
2.500
10
2.525
15
V
Line Regulation
mV
mV
mV
Load Regulation
Temperature Deviation*
Start-Up Functions
UVB Pull-up Current Source
UVB Clamp
10
15
10
15
IOH
VOH MAX
IUVB
VUVB = 2.0 V; no faults
–0.4
2.9
3
–1
3.1
8
–1.9
3.3
µA
V
IUVB = 10 µA; no faults
UVB Discharge Current
(AC shutdown)
VUVB = 2.0 V; FAULT = low;
AC < 2.5 V
mA
UVB Discharge Current
(FAULT shutdown)
IOL
VUVB = 2.0 V; FAULT = high;
AC > 2.5 V
2.5
10
mA
UVB Low Output Voltage
PG CAP Pull-up Current Source
PG CAP Clamp
VOL
IOH
IUVB = 100 µA; FAULT = low; AC < 2.5 V
VPGCAP = 2.0 V; no faults
0.2
–1.4
3.3
V
µA
V
–0.5
2.9
2
–1
3.1
6
VOH MAX
IOL
IPGCAP = 10 µA; no faults; AC > 2.5 V
PG CAP Discharge Current
VPGCAP = 2.0 V; undervoltage
condition
mA
PG CAP Low Output Voltage
OFF Input High Voltage
OFF Input Low Voltage
OFF Pull-up to VCC
VOL
VIH
IPGCAP = 100µA; undervoltage condition
0.2
V
V
2.0
VIL
0.8
100
–2.0
3.3
V
R
VOFF = 0 V
25
–0.5
2.9
50
–1
3.1
10
kΩ
µA
V
DELAY Pull-up Current Source
DELAY Clamp
IOH
VDELAY = 0 V; OFF = high
IDELAY = 10 µA; OFF = high
VDELAY = 2.0 V; OFF = low
IDELAY = 100µA; OFF = low
VOH MAX
IOL
DELAY Discharge Current
DELAY Low Output Voltage
2.5
mA
V
VOL
0.2
*Temperature deviation is defined as the maximum deviation of the reference over the given temperature range and does not imply an
incremental deviation at any given temperature.
Typ ica l Perform a nce Curves
Not Ava ila b le a t Tim e of Pub lishing
ASTEC Semiconductor
97
AS23xx
Secondary Side Housekeeping Circuit
Theory of Op era tion
the outputs of the PSU. Usually, just one or the
otheroutputisuseddependingonthePSU’scost
The AS23xx performs housekeeping functions
for power supplies, especially switching power
supplies for personal computers. The chip re-
sides on the secondary side of the power supply
(PSU), and it performs three primary functions:
and system definition. Both methods are in-
tended to protect the customer’s system, and the
customer, as the first priority.
1.2 Undervoltage Faults: POK and FAULT
An undervoltage condition is sometimes not con-
sidered a catastrophic or dangerous condition,
but always one which the customer should be
warned about. The POK signal is a logic line to
the customer’s system that is specified in most
PC type power supply systems. The AS23xx will
pull the POK signal low when a UV fault is
detected. A UV fault may or may not require the
system to shut down, so an undervoltage blank-
ing pin is provided (UVB). Grounding this pin will
preventUVfaultsfrompropogatingtotheFAULT
pin. CBD does not react to UV faults.
1) monitors the output voltages and reports
faults
2) sequences the start-up of the PSU
3) sequences the shutdown of the PSU
Section 1 - Output Voltages and Faults
1.0 Output Voltage Monitoring
The AS23xx monitors the standard voltage out-
puts for PC type power supplies. It has inputs for
+12V, +5V, +3.3V, -5Vand-12V. Theseinputs
are tied directly to the outputs of the PSU, and
therefore do not require external dividers to set
the error thresholds. These pins are monitored
forbothovervoltage(OV)andundervoltage(UV)
conditions. The spec’s for these thresholds are
listed in the data sheet.
1.3 Input Undervoltage: AC and HYST
Inaddition,thereisaspecialundervoltagedetec-
tion input for sensing the input voltage to the
powersupply, designatedastheACpin. Thispin
will cause the POK pin to go low if there is
insufficientvoltagetorunthePSUoutputs. Since
power supplies must maintain high voltage isola-
tion between the primary and secondary sides of
the system, the AC pin is usually tied to a divided
down and filtered representation of the second-
ary side switching waveform. Hysteresis for this
function, to provide immunity from line ripple, is
configured by the PSU designer and is imple-
mented with the HYST pin, which is an open
collector output of the AC comparator.
1.1 Overvoltage Faults: FAULT and CBD
An overvoltage condition in a power supply is
considered to be a catastrophic and dangerous
condition which must result in a safe, complete
and near-instantaneous shutdown of the sys-
tem. Overvoltages most often result from a
break in the system feedback and control cir-
cuitryorfromashortbetweenoutputs. Whenthe
AS23xx detects an overvoltage, the fault is
latched internally, and the FAULT and CBD pins
go high. The FAULT pin is an open collector
NPN output which is intended to drive an
optocoupler LED for feedback to the primary
side controller of the PSU. The CBD pin is an
NPN Darlington output which is intended to drive
an SCR crowbar circuit which will short circuit
Section 2 - PSU Start-up Sequences
2.0 System Start-up Sequence
When the power supply starts up, the AS23xx
must not erroneously report a FAULT. In addi-
tion, most PC type power supply specifications
ASTEC Semiconductor
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Secondary Side Housekeeping Circuit
AS23xx
require a specific timing sequence for the POK V if the VCC of the AS23xx is tied to the 12 V
signal. Some PSU systems also require an output or an auxilliary rail.
isolated, low voltage, low power remote turn-on
switch, rather than a large line cord switch.
2.4 POK Start-up Timing: PGCAP
Inadditionto2.3above, mostPCpowersupplies
requirethePOKpintoremainlowuntilalloutputs
2.1 VREF Enable of Chip Bias
Since the VCC of the AS23xx comes up in a finite have been good for at least 100 ms but not more
amount of time, and since the VREF of the chip than 500 ms. A cap to ground on the PGCAP pin
and the bias for the comparators are not within allows to the PSU designer to set the timing
specification until approximately 4.2 V of VCC is delay between the PSU outputs becoming good
available, the comparators for OV and UV and and the POK pin going high. The PGCAP pin
most other functions are disabled until VREF is providesa1 µAcurrentsourcetochargethecap,
within spec. This prevents the false detection of and when the cap charges above 2.5 V, the POK
a FAULT due to an erroneous VREF. Similarly, pin goes high. When an undervoltage occurs,
if VREF is too heavily loaded and gets pulled low the PGCAP pin discharges rapidly and the POK
out of spec, these functions will also shut off.
pin goes low. The POK pin does not respond to
overvoltages.
2.2 Blanking UV’s During Start-up: UVB
2.5 Isolated Remote On/Off Switching: OFF
and FAULT
As the power supply outputs come up, the
undervoltage FAULTs must be blanked to allow
the supply to complete its start-up. Putting a A low voltage, isolated remote on/off switch may
capacitor to ground on the UVB pin will allow the be implemented with the AS23xx OFF pin. If the
PSU designer to set a specific period of time chip VCC is run off an auxilliary rail, the FAULT
during which undervoltages will not propogate to signal may be used to start and stop the PSU.
the FAULT pin. The UVB pin provides a 1 µA When the OFF pin is pulled from high to low or
current source to charge the cap, and once the grounded, the FAULT pin resets to a low state,
UVB pin charges above 2.5 V, the undervoltage which may be used to drive an optocoupler to
sensing is enabled. UVB does not blank enable the primary side PWM controller. Allow-
undervoltages to the POK pin. The UVB pin is ing the OFF pin to go open circuit or high causes
clamped one diode above VREF, or about 3.1 V, the POK pin to go low immediately, and the
allowing fast discharge of the capacitor when the FAULT pin will go high after a time delay set by
system resets.
a cap to ground on the DELAY pin. This allows
the customer’s system to receive a POK warning
before the PSU actually shuts down.
2.3 POK Bias
The POK pin has some specific requirements
based on industry standard PC power supply
specifications. At start-up, the POK pin must not Section 3 - PSU Shutdown Sequences
rise above 0.4 V. The POK pin is an NPN open
collector whose base is tied to VCC via a simple
3.0 Shutdown Sequence
For normal shutdowns, the primary requirement
is that the POK signal should go low some
minimum time before the PSU outputs fall out of
spec.
resistor. Therefore, once VCC pulls above one
diode or about 0.6 V, the POK pin will go low and
saturate. If the POK pin external pull-up is to the
5 V output, the POK signal will not go above 0.4
ASTEC Semiconductor
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AS23xx
Secondary Side Housekeeping Circuit
3.1 Delaying Remote OFF: DELAY
3.2 AC Warning Prior to Primary Drop-out
In systems which use the OFF and FAULT pins
to provide remote on/off switching, the delay
between the OFF pin going high and the FAULT
signalgoinghighisprogrammablewithacapaci-
tor to ground on the DELAY pin as described in
2.5 above. The POK pin, on the other hand will
go high immediately after the OFF pin is open
circuited or pulled high, giving the system warn-
ing of the impending shutdown. The DELAY pin
provides a 1 µA current source to charge the
cap, and when the cap charges above 2.5 V, the
FAULT pin will go high.
In systems where the input line voltage is
switched, the AC pin threshold should be set so
that it causes POK to go low before the primary
bulk voltage reaches drop-out and the primary
PWMshutsoff. TheoutputoftheACcomparator
also causes the UVB pin to pull low, so that the
undervoltage sensing does not trip the FAULT
latch as the outputs fall below spec. Recall that
the AC pin senses a divided down and filtered
representation of the secondary side switching
waveform, which will provide a proportional rep-
resentation of the primary voltage via the turns
ratio of the transformer.
ASTEC reserves the right to make changes without further notice to any products described herein to improve reliability, function, or
design. ASTEC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does
it convey any license under its patent rights or the rights of others. ASTEC products are not authorized for use as components in life
support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify
ASTEC of any such intended end use whereupon ASTEC will determine availability and suitability of its products for the intended use.
ASTEC and the ASTEC logo are trademarks of ASTEC (BSR) PLC.
ASTEC SEMICONDUCTOR
255 Sinclair Frontage Road • Milpitas, California 95035 • Tel. (408) 263-8300 • FAX (408) 263-8340
ASTEC Semiconductor
100
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