AB-184 [ETC]

AB-184 - DRIVING VIDEO OUTPUT STAGES WITH MONOLITHIC INTEGRATED AMPLIFIERS ; AB - 184 - 驾驶视频输出级,带有单片集成放大器\n
AB-184
型号: AB-184
厂家: ETC    ETC
描述:

AB-184 - DRIVING VIDEO OUTPUT STAGES WITH MONOLITHIC INTEGRATED AMPLIFIERS
AB - 184 - 驾驶视频输出级,带有单片集成放大器\n

放大器 输出元件
文件: 总7页 (文件大小:89K)
中文:  中文翻译
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®
AP P LICATION BULLETIN  
Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706  
Tel: (602) 746-1111 • Twx: 910-952-111 • Telex: 066-6491 • FAX (602) 889-1510 • Immediate Product Info: (800) 548-6132  
DRIVING VIDEO OUTPUT STAGES  
WITH MONOLITHIC INTEGRATED AMPLIFIERS  
By Christian Henn, Burr-Brown International GmbH  
Increasingly powerful computers and the rapidly expanding  
process produces the correct color on the screen. For this  
reason, displaying the color white at the maximum ampli-  
tude is the toughest job for the video amplifier in graphic  
monitors.  
use of picture processing and CAD/CAM systems in almost  
all industry branches have combined to generate a greater  
and greater demand for higher resolution graphic monitors.  
Controlling the video output stages of these graphic moni-  
tors is a key to producing such high resolutions. Until  
recently, only highly complex, expensive systems have been  
available to drive hybrid video output stages. But using the  
monolithic amplifiers OPA623 and OPA2662 from Burr-  
Brown, new methods are possible that make complicated  
Table I summarizes the various timing requirements  
necessary to produce the most commonly used graphic  
formats. The TH ACTIVE can be calculated by multiplying the  
horizontal cycle time by 0.8, and it includes time for the  
electron ray to return from the right side to the left side of the  
screen during the horizontal retrace time. When calculating  
solutions a thing of the past. The OPA623 allows rise (tRISE  
)
t
RISE and tFALL, it was assumed that each was one third of the  
pixel time. The –3dB bandwidth (f–3dB) is dependent upon  
the rise time and can be calculated as 0.35/tRISE  
and fall (tFALL) times of 3ns and 2.3ns, respectively, at the  
output, while the OPA2662 is even more impressive at tRISE  
= 2.4ns and tFALL = 2.15ns. With this kind of performance,  
the OPA623 and OPA2662 can be used in graphic systems  
with resolutions of 1600 x 1200 pixel and more.  
.
The video signal levels at the interface between the video  
card and monitor are standardized at +0.7Vp for the video  
signal and –0.3Vp for the synchronization pulse. A high-  
resolution cathode ray tube (CRT) functions with bias volt-  
ages between +65V and +75V and a modulation voltage of  
HIGH-RESOLUTION PICTURE  
PROCESSING SYSTEMS: AN OVERVIEW  
The various standard resolutions range from the commonly  
used VGA standard with 640 x 400 pixels to the super VGA  
with 800 x 600 pixels to CAD/CAM and radar systems with  
over 1600 x 1200 pixels. But while radar and computer  
tomography systems generally use high-resolution 1600 x  
1200 color graphic monitors, monochrome displays with  
2k x 2k resolution and 500MHz bandwidth are now in  
development. To achieve such high resolutions, the moni-  
tors use horizontal deflection frequencies for electron rays  
between 64kHz and 96kHz, as well as data rates between  
100Mbit/s and 250Mbit/s, which are read out from the video  
RAM card. Raising the vertical deflection frequency to more  
than 70Hz causes the horizontal frequency and data rate to  
increase while the resolution remains the same. Controlling  
the pixels by the video controller adds to the demands on the  
video amplifier, and significantly increases the power con-  
sumption during video signal processing. Instead of a con-  
tinuous video signal, the video card produces pulse se-  
quences that return to zero between every two pulses. The  
amplitude of each pulse is equal to the luminance of the  
respective color (R, G, B). An additive optical mixing  
+0.7V  
Graphic Card  
0V  
TH ACTIVE  
–0.3V  
TH  
+65V  
50Vp-p Contrastmax  
Cathode Voltage  
+15V  
0V  
FIGURE 1. Pulse Sequences from a Signal Graphic Cathode.  
PIXEL/CLOCK  
SYSTEM  
STANDARDS  
RESOLUTIONS  
fH  
(Hz)  
fV  
(Hz)  
tH  
(µs)  
tACTIVE  
(ns)  
TIME/PIXEL  
(ns)  
FREQUENCY  
(Hz)  
tRISE/FALL  
(ns)  
–3dB BW  
(Hz)  
H x V  
VGA  
640 x 400  
800 x 600  
1280 x 1024  
1600 x 1200  
31.5k  
38k  
64k  
70  
70  
60  
70  
31.74  
26.31  
15.62  
13.15  
25.39  
21.04  
12.49  
10.52  
39.67  
26.30  
9.75  
25M  
38M  
102M  
152M  
13.22  
8.76  
3.25  
2.19  
26.47M  
40M  
107M  
160M  
Super VGA  
CAD/CAM  
Work Station  
76k  
6.57  
TABLE I. Timing Requirements.  
©1993 Burr-Brown Corporation  
AN-184  
Printed in U.S.A. November, 1993  
up to 50Vp-p with high luminance densities between the  
cathode and ground. For sufficient contrast, the total gain  
between the input and cathode must be between 70 and 166,  
depending upon the contrast control method in use. The  
cathode is a capacitive load of about 8pF, which rises to at  
least 12pF when combined with stray capacitances from the  
supply lines, connectors, and required protection circuitry.  
VIDEO OUTPUT STAGE  
Until a few years ago, the standard circuit for video output  
stages was a cascode stage with or without a subsequent  
complementary emitter follower. The advantages of this  
circuit are that it is easy to design and avoids the Miller  
effect (harmful collector-base capacitances) in the amplify-  
ing transistor. Inductances in series to the collector resistor  
and RC parts parallel to the emitter resistor allow users to  
adjust the circuit as required by their particular application.  
The disadvantages of the cascode stage are its asymmetrical  
transient response and high power dissipation at short rise  
and fall times.  
Gain  
70 to 166  
50VMAX  
2ns  
±300mAp-p  
25000V/µs  
1%  
Output Amplitude  
tRISE/tFALL (40V, 12pF)  
Driver Current  
Slew Rate  
Linearity  
We conducted several experiments with various configura-  
tions to test the ability of the OPA623 and OPA2662 to  
control a discrete cascode stage. As shown in Figure 3, a few  
of these configurations failed because there are no discrete  
cascode transistors effective for this application. The inte-  
grated dual current source OPA2662 can produce a charge  
current of up to 300mA in the emitter of a transistor like the  
BFQ262 at rise times of about 2ns, but internal transistor and  
emitter resistances and any package stray capacitances limit  
and delay the current conversion from the emitter to the  
collector of the BFQ262.  
TABLE II. Video Output Stage Requirements for a  
1600 x 1280 Graphic System.  
VIDEO AMPLIFIER CONCEPT  
Since the development of the first monitors, various types of  
amplifiers have been designed according to specific require-  
ments and applications. The type of amplifier structure  
shown in Figure 2 has become the standard for high-grade  
monitors.  
The amplifier at the front end of the circuit is equipped with  
a simple transconductance multiplier to control the signal.  
Since this type of multiplier has a small linear modulation  
range, it is necessary to reduce the signal in the amplifier  
from 0.7Vp to 0.3Vp. The following driver stage amplifies  
the signal 8 to 15 times and drives the output stages at  
approximately 4Vp-p. The output stage then amplifies the  
signal again to 50Vp-p max and provides the necessary  
driving power to charge the cathode and stray capacitances.  
At the back porch that occurs at the beginning of each line  
after the horizontal switch, the control circuit compares the  
cathode voltage to an adjustable bias and corrects any  
deviations from the bias. Depending on the type of amplifier  
structure, the bias point control drives either the input of the  
driver amplifier or the output stage. The entire video ampli-  
fier then reverses the video signal. A 0V signal at the input,  
which appears as a dark spot, is converted at the cathode to  
a voltage between +65V and +75V, depending upon the bias  
point of the cathode. A +0.7V signal, which corresponds to  
maximum luminance, is converted with maximum contrast  
control to a 50V modulation hub between the CRT bias point  
and ground. Figure 1 illustrates these conversions.  
Further tests were done using an output stage manufactured  
on a hybrid process, and these tests were successful. Figure  
6 shows the schematic of the output stage, which is available  
from Philips under the part number CR3425. Using the test  
configuration shown in Figure 7, it was possible to check the  
performance of the hybrid circuit by itself. The pulse genera-  
tor HP8130A drives the output stages via a terminated 50  
line with rise and fall times of 0.7ns each and a signal  
amplitude of 4Vp. The output stage is supplied from 80V,  
and 60mA quiescent current flows when no signal is being  
applied. The rise and fall times measured at a 50V signal hub  
and 12pF load capacitance are impressively low at 2.15ns.  
Figure 8 shows the pulse responses at 10ns/div and 2ns/div.  
AN ALTERNATIVE METHOD  
OF DRIVING THE OUTPUT STAGE  
With the hybrid circuit CR3425, a cost-effective, high-  
performance circuit is now available for high-resolution  
graphic monitors that effectively controls the output of the  
video output stage. Now, however, the problem is control-  
ling the input of the video output stage. What we need is a  
CK  
Input  
50Vp-p  
Preamplifier  
Driver Amplifier  
Output Stage  
CL  
1
75  
Contrast  
DC-Restoration  
Bias  
Sync Separation  
FIGURE 2. Video Output Stage Requirements for a 1600 x 1280 Graphic System.  
2
+80V  
50Vp-p  
12pF  
RC  
BFQ262  
BFQ252  
FIGURE 4. Cathode Voltage Control.  
12pF  
BFQ262  
14  
VB  
+80V  
+65V  
+40V  
+15V  
50 Vp-p  
11  
10  
–2V  
7
2
OPA2662  
VIN  
15  
4V  
2V  
0V  
10nF  
10Ω  
300  
3.7kΩ  
VIN  
220Ω  
220Ω  
20pF  
100pF  
8.2mA  
12pF  
FIGURE 5. Basic Configuration of the Driver Circuit.  
FIGURE 3. Video Output Stage.  
driver amplifier that takes the pulse after contrast control  
and amplifies it with no edge slopes, as well as controlling  
the complex input resistance in the output stage with a slew  
rate of over 1500V/µs for positive and negative signal  
transitions. The hybrid driver amplifiers currently on the  
market function only with NPN transistors in class A opera-  
tion. Nonfeedback amplifiers are relatively low-cost but  
have high power consumption and, more importantly, can  
hardly produce the 1280 x 1024 resolution required for  
positive signal edges.  
+80V  
Out  
The Current-Feedback Amplifier OPA623 and the Dual  
Current Source OPA2662, two monolithic ICs manufactured  
on a complementary bipolar process, offer reasonably priced,  
effective alternatives. These new ICs differ both in perfor-  
mance and in manufacturing costs. They are not, however,  
limited to video output stage control. The problem of con-  
trolling an input or load resistance is a much more general  
dilemma present in a wide variety of applications. The real  
trick is to find amplifiers that can operate stably with  
complex loads, have low power consumption, and are ca-  
pable of charging load capacitances with high currents in as  
little time as possible. In these categories as well, the  
OPA623 and OPA2662 prove themselves extremely viable  
options.  
In  
FIGURE 6. Internal Structure of the Video Output Stage  
CR3425.  
from 0.8Vp to 4Vp and drives the complex input resistance  
of the CR3425 output stage. Figure 10 shows the pulse  
response at the OPA623 output, and Figure 11 that at the  
output of the video output stage. The rise and fall times of  
the OPA623 are 1.85ns and 1.95ns, respectively. Thus the  
OPA623 can drive complex loads of 24+ 287|| 50pF at  
an output voltage of 4Vp and slew rate of about 1700V/µs  
(ca. 4Vp • 0.8ns/1.9ns). Using the OPA623, the output of the  
video output stage CR3425 can charge the 12pF load capaci-  
tor with 40V in 3ns and discharge 40V in 2.3ns. In contrast  
DRIVER AMPLIFIER USING THE OPA623  
The Wide-Band Current-Feedback Amplifier, OPA623, is  
available in 8-pin DIL and SO packages and delivers up to  
±70mA output current at a supply voltage of ±5V and low  
quiescent current of 4mA. Figure 9 shows the driver circuit  
using the OPA623. The OPA623 amplifies the video signal  
3
to direct control, control using the OPA623 results in an  
edge slope of 0.85ns for the rising edge and 0.15ns for the  
falling edge.  
base appears in low-impedance form at the emitter and  
produces a current flow toward ground via the emitter  
resistor. This current is then reflected by a factor of 3 to the  
collector. As shown in Figure 12, it’s easy to connect two  
current sources in parallel, which produces driving power of  
±150mA. A compensation network connected to the emit-  
ters provides even more current during the charge phase.  
Figure 13 shows the excellent test results using this configu-  
ration. At the output of the CR3425, the design produces rise  
and fall times of 2.4ns and 2.15ns, respectively, with cath-  
ode voltage variation of 50Vp-p. This variation is the maxi-  
DRIVER AMPLIFIER USING THE OPA2662  
The second test used the Dual Diamond Transistor OPA2662  
to drive the video output stage. This new wide-band IC  
contains two voltage-controlled current sources  
(transconductance amplifiers) in a 16-pin package. Each  
current source delivers or pulls up to ±75mA at its high-  
impedance collector. The voltage at the high-impedance  
+80V; 60mA  
tr = 0.7ns  
tf = 0.7ns  
tr = 2.15ns  
tf = 2.15ns  
4Vp  
50pF  
O
50Ω  
50Vp-p  
1
9
CR3425  
12pF  
50Ω  
287Ω  
FIGURE 7. Driver Circuit Using a Pulse Generator.  
t = 2.15µs  
0
2
4
6
8
10  
Time (ns)  
12  
14  
16  
18  
20  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
Time (ns)  
FIGURE 8. Test Circuit Response.  
tr = 1.85ns  
tf = 1.95ns  
tr = 0.7ns  
tf = 0.7ns  
0.8Vp  
+80V; 60mA  
tr = 3.0ns  
tf = 2.3ns  
+5V  
4Vp  
50pF  
O
50  
150Ω  
3
2
7
OPA623  
4
24Ω  
50Vp-p  
6
1
9
CR3425  
50Ω  
12pF  
287Ω  
–5V  
470Ω  
120Ω  
6.8pF  
FIGURE 9. Driver Circuit Using the OPA623.  
4
mum possible cathode modulation, during which most  
picture tubes are already in overdrive. Reducing the maxi-  
mum output voltage lowers the rise and fall times to less  
than 2ns, making it possible to process video pulses of 6ns.  
The shorter the pulse, the more important it is to achieve  
sufficient cathode voltage, since high resolutions are accom-  
panied by high horizontal deflection frequencies so that the  
turnaround time of the electron ray at the phosphor point  
becomes shorter and shorter. The rise time of a phosphor  
point is the time until it converts to the electron charge into  
a visible light (R, G, or B).  
CONCLUSION  
Only in the last few years has it become possible to use  
integrated amplifiers in video signal processing with high-  
resolution monitors. New developments in circuit technol-  
ogy and IC manufacturing processes, as well as the rapidly  
increasing demand for low-cost displays, have combined to  
accelerate advances in video design. Today, integrated RBG  
video amplifiers are already available with a bandwidth of  
100MHz. In addition to amplification and contrast control,  
these amplifiers offer additional functions such as clamping,  
blanking, and sync separation, and they can also drive the  
output stage.  
In comparison to direct control of the output stage by a  
generator, when controlled by the OPA2662, the rising edge  
has a small additional edge slope of 0.25ns and the falling  
edge is driven exactly as fast as with direct control. Consid-  
ering that most signal generators are quite expensive, this  
comparison speaks quite well for the OPA2662.  
Both driver circuit configurations shown here allow video  
output stage control that is less integrated but also more  
powerful, and the configurations achieve a level of perfor-  
mance previously possible only with complex, large, and  
t = 1.85µs  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
Time (ns)  
Time (ns)  
FIGURE 10. OPA623 Output.  
t = 2.30µs  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
Time (ns)  
Time (ns)  
FIGURE 11. Response of the Test Circuit Shown in Figure 6.  
5
expensive hybrid circuits. The lower cost, smaller driver  
circuit using the OPA623 can be used for 1600 x 1280  
resolutions, while the OPA2662 can be used for applications  
requiring resolutions of up to 2k x 2k. It should be noted,  
however, that at 2k x 2k both the driver circuit and the video  
output stage operate at their performance limit. At frequen-  
cies over 100MHz, separation of the three color channels in  
different video amplifiers is the only effective way to keep  
the crosstalk between the channels to less than 30dB. Fi-  
nally, a comparison of the two driver circuits demonstrates  
the superiority of a high-impedance current source over a  
low-impedance voltage source when controlling low-imped-  
ance, capacitive loads. Although the OPA623 with 350MHz  
appears at first glance a better choice than the OPA2662  
with 200MHz, the current-source output and higher drive  
capability of the OPA2662 give it an edge in practice.  
The next step will be to assemble both the monolithic  
integrated driver amplifier and the hybrid video output stage  
on the same substrate.  
Both driver circuits are available from Burr-Brown as as-  
sembled demo boards so that you can test the configurations  
for yourself.  
REFERENCES  
OPA623 Product Data Sheet  
Burr-Brown  
OPA2662 Product Data Sheet  
Burr-Brown  
CR3425 Product Data Sheet  
Philips  
+80V; 60mA  
tr = 2.4ns  
tf = 2.15ns  
50Vp-p  
OPA2662  
11  
tr = 0.7ns  
+0.23V  
1
9
CR3425  
tf = 0.7ns  
14  
15  
–0.23V  
12pF  
50  
150Ω  
150Ω  
7
2
10  
10nF  
10Ω  
50Ω  
220Ω  
220Ω  
20pF  
100pF  
FIGURE 12. Driver Circuit Using the OPA2662.  
t = 2.15µs  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
0
10  
20  
30  
40  
50  
60  
70  
80  
90  
100  
Time (ns)  
Time (ns)  
FIGURE 13. Test Circuit Response Curves.  
6
+80V  
+5V  
+5V  
C6  
C5  
47µF  
+
10nF  
R9  
C4  
100nF  
C8  
10nF  
3.9kΩ  
C7  
10nF  
L1  
10µH  
P1  
1kΩ  
C9  
2.2µF  
+
Black Level  
1
9
Out  
50Vp-p  
CR3425  
D1  
4148  
R5  
CL  
12pF  
2
3
7
8
240+ 47Ω  
C2  
C3  
R2  
100nF  
150Ω  
R6  
24Ω  
3
7
In  
6
0.8Vp-p  
OPA623  
25pF to 33pF  
R1  
R8  
2
50Ω  
100kΩ  
4
R4  
470Ω  
–5V  
C10  
10nF  
R3  
120Ω  
C1  
6.8pF  
C11  
2.2µF  
+
–5V  
FIGURE 14. Driver Circuit 1.  
80V  
C6  
C5  
47µF  
+
10nF  
+5V  
C7  
L1  
10nF  
R9  
10µH  
C4  
2kΩ  
100nF  
R0  
0
500Ω  
1
9
Out  
50Vp-p  
CR3425  
Black Level  
CL  
12pF  
2
3
7
8
11  
14  
D1  
4148  
7
2
(1)  
(1)  
+5V  
R3  
150Ω  
R2  
150Ω  
10  
15  
C3  
100nF  
C9  
R5  
0
10nF  
In  
C8  
10nF  
0.8Vp-p  
R1  
R8  
C10  
50Ω  
100kΩ  
2.2µF  
R6  
220Ω  
R6a  
220Ω  
R7  
10Ω  
C2  
22pF  
1
3
6
4
5
16  
–5V  
(1)  
C1  
100pF  
OPA2662  
RQC  
750Ω  
C12  
10nF  
8
9
C11  
2.2µF  
R6  
0
NOTE: (1) The Diamond Transistors of the OPA2662 require appropriate  
power supply connections like shown at the right side.  
–5V  
FIGURE 15. Driver Circuit 2.  
7

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