93LC56I/P_技术文档

93LC46/56/66

M

1K/2K/4K 2.5V Microwire^®Serial EEPROM

Features

Description

• Single supply with programming operation down

The Microchip Technology Inc. 93LC46/56/66 are 1K,

2K and 4K low voltage serial Electrically Erasable

PROMs (EEPROM). The device memory is configured

as x8 or x16 bits depending on the external logic of lev-

els of the ORG pin. Advanced CMOS technology

makes these devices ideal for low power non-volatile

memory applications. The 93LC Series is available in

standard 8-pin PDIP and surface mount SOIC pack-

ages. The rotated pin-out 93LC46X/56X/66X are

offered in the “SN” package only.

to 2.5V

• Low power CMOS technology

• 100 µA typical active READ current at 2.5V

• 3 µA typical standby current at 2.5V

• ORG pin selectable memory configuration

• 128 x 8- or 64 x 16-bit organization (93LC46)

• 256 x 8- or 128 x 16-bit organization (93LC56)

• 512 x 8 or 256 x 16 bit organization (93LC66)

• Self-timed ERASE and WRITE cycles

Package Types

PDIP/SOIC

(including auto-erase)

• Automatic ERAL before WRAL

• Power on/off data protection circuitry

• Industry standard 3-wire serial I/O

• Device status signal during ERASE/WRITE

cycles

• Sequential READ function

• 1,000,000 E/W cycles guaranteed

• Data retention > 200 years

• 8-pin PDIP/SOIC

(SOIC in JEDEC standards)

CS

CLK

DI

DO

VCC

NU

1

2

8

7

3

4

6

5

ORG

VSS

ROTATED SOIC

NU

VCC

CS

ORG

VSS

DO

DI

1

2

3

4

8

7

6

5

• Temperature ranges supported:

- Industrial (I):

-40°C to +85°C

CLK

Block Diagram

VCC

VSS

ADDRESS

DECODER

MEMORY

ARRAY

ADDRESS

COUNTER

DO

OUTPUT

BUFFER

DATA REGISTER

DI

MODE

DECODE

LOGIC

ORG

CS

CLOCK

CLK

REGISTER

2002 Microchip Technology Inc.

DS21712A-page 1

93LC46/56/66

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings†

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temp. with power applied ..........................................................................................................-40°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions

for extended periods may affect device reliability.

DC CHARACTERISTICS

VCC = +2.5V to +5.5V

DC CHARACTERISTICS

Industrial (I):

TAMB = -40°C to +85°C

Param.

No.

Sym

Characteristic

Min

Typ

Max

Units

Conditions

VCC ≥ 2.7V

D1

D2

D3

D4

VIH1

VIH2

VIL1

VIL2

VOL1

VOL2

VOH1

VOH2

ILI

High level input voltage

2.0

0.7 VCC

-0.3

—

2.4

VCC-0.2

—

VCC +1

0.8

0.2 VCC

0.4

0.3

—

±10

V

Low level input voltage

Low level output voltage

High level output voltage

VCC ≥ 2.7V

IOL = 2.1 mA, VCC = 4.5V

IOL = 100 µA, VCC = 2.5V

IOL = 400 µA, VCC = 4.5V

IOL = 100 µA, VCC = 2.5V

VIN = 0.1V to VCC

VOUT = 0.1V to VCC

D5

D6

D7

Input leakage current

Output leakage current

Pin capacitance

(all inputs/outputs)

µA

pF

ILO

—

±10

7

CIN,

VIN/VOUT = 0V (Note 1 & 2)

COUT

TAMB = 25°C, FCLK = 1 MHz

D8

D9

ICC write Operating current

—

3

mA

FCLK = 2 MHz, VCC = 5.5V

(Note 2)

ICC read

—

100

1

mA

µA

F^CLK= 2 MHz, VCC = 5.5V

F^CLK= 1 MHz, VCC = 3.0V

F^CLK= 1 MHz, VCC = 2.5V

500

—

D10

ICCS

Standby current

—

3

100

30

—

µA

CLK = CS = 0V; VCC = 5.5V

CLK = CS = 0V; VCC = 3.0V

CLK = CS = 0V; VCC = 2.5V

ORG, DI = VSS or VCC

Note 1: This parameter is tested at TAMB = 25°C and FCLK = 1 MHz.

2: This parameter is periodically sampled and not 100% tested.

DS21712A-page 2

2002 Microchip Technology Inc.

93LC46/56/66

AC CHARACTERISTICS

Param.

VCC = +2.5V to +5.5V

Industrial (I):

TAMB = -40°C to +85°C

Sym

Characteristic

Min

Typ

Max

Units

Conditions

No.

1

FCLK

Clock frequency

—

2

1

MHz VCC ≥ 4.5V

MHz VCC < 4.5V

2

3

4

5

6

7

8

9

10

11

12

13

14

15

TCKH

TCKL

TCSS

TCSH

TCSL

TDIS

TDIH

TPD

TCZ

TSV

TWC

TEC

TWL

—

Clock high time

Clock low time

250

50

—

4

—

ns

Chip select setup time

Chip select hold time

Chip select low time

Data input setup time

Data input hold time

Data output delay time

Data output disable time

Status valid time

ns

ms

Relative to CLK

0

250

100

—

1M

—

Relative to CLK

CL = 100 pF

CL = 100 pf (Note 2)

CL = 100 pF

ERASE/WRITE mode

ERAL mode (VCC=5V ±10%)

WRAL mode (VCC=5V ±10%)

400

100

500

10

15

30

1M

Program cycle time

8

16

—

Endurance

cycles 25°C, VCC = 5.0V, Block

Mode (Note 3)

Note 1: This parameter is tested at TAMB = 25°C and FCLK = 1 MHz.

2: This parameter is periodically sampled and not 100% tested.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-

cation, please consult the Total Endurance Model which can be obtained on Microchip’s website:

www.microchip.com.

FIGURE 1-1:

SYNCHRONOUS DATA TIMING

VIH

VIL

VIH

CS

4

7

2

3

5

CLK

VIL

8

VIH

VIL

DI

10

9

VOH

DO

(READ)

VOL

VOH

11

DO

STATUS VALID

(WRITE)

VOL

2002 Microchip Technology Inc.

DS21712A-page 3

93LC46/56/66

TABLE 1-1:

INSTRUCTION SET FOR 93LC46: ORG = 1 (X 16 ORGANIZATION)

Req. CLK

Cycles

Instruction

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A5 A4 A3 A2 A1 A0

1 1 X X X X

—

D15 - D0

High-Z

25

9

A5 A4 A3 A2 A1 A0

1 0 X X X X

(RDY/BSY)

High-Z

—

9

A5 A4 A3 A2 A1 A0

0 1 X X X X

D15 - D0

—

25

9

0 0 X X X X

TABLE 1-2:

Instruction

INSTRUCTION SET FOR 93LC46: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X

—

D7 - D0

High-Z

18

10

18

10

A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X

(RDY/BSY)

High-Z

—

A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X

D7 - D0

—

0 0 X X X X X

TABLE 1-3:

INSTRUCTION SET FOR 93LC56: ORG = 1 (X 16 ORGANIZATION)

Instruction

SB

Opcode

Address

Data In

Data Out

Req. CLK

Cycles

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

X A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X

—

D15 - D0

High-Z

27

11

27

11

X A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X

(RDY/BSY)

High-Z

—

X A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X

D15 - D0

—

0 0 X X X X X X

TABLE 1-4:

Instruction

INSTRUCTION SET FOR 93LC56: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

X A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X X

—

D7 - D0

High-Z

20

12

20

12

X A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X X

(RDY/BSY)

High-Z

—

X A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X X

D7 - D0

—

0 0 X X X X X X X

DS21712A-page 4

2002 Microchip Technology Inc.

93LC46/56/66

TABLE 1-5:

Instruction

INSTRUCTION SET FOR 93LC66: ORG = 1 (X 16 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X

—

D15 - D0

High-Z

27

11

27

11

A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X

(RDY/BSY)

High-Z

—

A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X

D15 - D0

—

0 0 X X X X X X

TABLE 1-6:

Instruction

INSTRUCTION SET FOR 93LC66: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A8 A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X X

—

D7 - D0

High-Z

20

12

20

12

A8 A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X X

(RDY/BSY)

High-Z

—

A8 A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X X

D7 - D0

—

0 0 X X X X X X X

2002 Microchip Technology Inc.

DS21712A-page 5

93LC46/56/66

After power-up, the device is automatically in the

EWDS mode. Therefore, an EWEN instruction must be

performed before any ERASE or WRITE instruction

can be executed.

2.0

FUNCTIONAL DESCRIPTION

When the ORG pin is connected to VCC, the (x16) orga-

nization is selected. When it is connected to ground,

the (x8) organization is selected. Instructions,

addresses and write data are clocked into the DI pin on

the rising edge of the clock (CLK). The DO pin is nor-

mally held in a high-Z state except when reading data

from the device, or when checking the READY/BUSY

status during a programming operation. The ready/

busy status can be verified during an Erase/Write oper-

ation by polling the DO pin; DO low indicates that pro-

gramming is still in progress, while DO high indicates

the device is ready. The DO will enter the high-Z state

on the falling edge of the CS.

2.4

READ

The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy

zero bit precedes the 16-bit (x16 organization) or 8-bit

(x8 organization) output string. The output data bits will

toggle on the rising edge of the CLK and are stable

after the specified time delay (TPD). Sequential read is

possible when CS is held high. The memory data will

automatically cycle to the next register and output

sequentially.

2.1

START Condition

2.5

Erase/Write Enable and Disable

(EWEN,EWDS)

The START bit is detected by the device if CS and DI

are both HIGH with respect to the positive edge of CLK

for the first time.

Before a START condition is detected, CS, CLK, and DI

may change in any combination (except to that of a

START condition), without resulting in any device oper-

ation (READ, WRITE, ERASE, EWEN, EWDS, ERAL,

and WRAL). As soon as CS is HIGH, the device is no

longer in the standby mode.

The 93LC46/56/66 power up in the Erase/Write Disable

(EWDS) state. All programming modes must be pre-

ceded by an Erase/Write Enable (EWEN) instruction.

Once the EWEN instruction is executed, programming

remains enabled until an EWDS instruction is executed

or VCC is removed from the device. To protect against

accidental data disturb, the EWDS instruction can be

used to disable all Erase/Write functions and should

follow all programming operations. Execution of a

READ instruction is independent of both the EWEN

and EWDS instructions.

An instruction following a START condition will only be

executed if the required amount of opcode, address

and data bits for any particular instruction is clocked in.

After execution of an instruction (i.e., clock in or out of

the last required address or data bit) CLK and DI

become don't care bits until a new start condition is

detected.

2.6

ERASE

The ERASE instruction forces all data bits of the spec-

ified address to the logical “1” state. CS is brought low

following the loading of the last address bit. This falling

edge of the CS pin initiates the self-timed programming

cycle.

The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical “0” indicates that program-

ming is still in progress. DO at logical “1” indicates that

the register at the specified address has been erased

and the device is ready for another instruction.

2.2

Data In/Data Out (DI/DO)

It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible

for a “bus conflict” to occur during the “dummy zero”

that precedes the READ operation, if A0 is a logic

HIGH level. Under such a condition the voltage level

seen at Data Out is undefined and will depend upon the

relative impedances of Data Out and the signal source

driving A0. The higher the current sourcing capability of

A0, the higher the voltage at the Data Out pin.

The ERASE cycle takes 4 ms per word typical.

2.7

WRITE

2.3

Data Protection

The WRITE instruction is followed by 16-bits (or by 8

bits) of data which are written into the specified

address. After the last data bit is put on the DI pin, CS

must be brought low before the next rising edge of the

CLK clock. This falling edge of CS initiates the self-

timed auto-erase and programming cycle.

The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns

low (Tcsl) and before the entire write cycle is complete.

DO at logical “0” indicates that programming is still in

progress. DO at logical “1” indicates that the register at

During power-up, all programming modes of operation

are inhibited until VCC has reached a level greater than

1.4V. During power-down, the source data protection

circuitry acts to inhibit all programming modes when

VCC has fallen below 1.4V at nominal conditions.

The EWEN and EWDS commands give additional pro-

tection against accidentally programming during nor-

mal operation.

DS21712A-page 6

2002 Microchip Technology Inc.

93LC46/56/66

the specified address has been written with the data

specified and the device is ready for another instruc-

tion.

2.9

Write All (WRAL)

The WRAL instruction will write the entire memory

array with the data specified in the command. The

WRAL cycle is completely self-timed and commences

at the falling edge of the CS. Clocking of the CLK pin is

not necessary after the device has entered the self

clocking mode. The WRAL command does include an

automatic ERAL cycle for the device. Therefore, the

WRAL instruction does not require an ERAL instruction

but the chip must be in the EWEN status. The WRAL

instruction is guaranteed at 5V ±10%.

The WRITE cycle takes 4 ms per word typical.

2.8

Erase All (ERAL)

The ERAL instruction will erase the entire memory

array to the logical “1” state. The ERAL cycle is identi-

cal to the ERASE cycle except for the different opcode.

The ERAL cycle is completely self-timed and com-

mences at the falling edge of the CS. Clocking of the

CLK pin is not necessary after the device has entered

the self clocking mode. The ERAL instruction is guar-

anteed at 5V ±10%.

The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns

low (Tcsl).

The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL) and before the entire write cycle is complete.

The WRAL cycle takes 16 ms typical.

The ERAL cycle takes (8 ms typical).

FIGURE 2-1:

READ TIMING

CS

CLK

DI

•••

A0

0

An

1

0

HIGH-Z

DO

Dx ••• D0 Dx

•••

D0 Dx

••• D0

FIGURE 2-2:

EWEN TIMING

6

CS

1

0

1

X

•••

X

DI

2002 Microchip Technology Inc.

DS21712A-page 7

93LC46/56/66

FIGURE 2-3:

EWDS TIMING

6

CS

CLK

•••

1

0

X

6

DI

FIGURE 2-4:

WRITE TIMING

CS

CLK

0

1

An

A0 Dx

D0

•••

DI

11

HIGH-Z

BUSY

READY

DO

12

FIGURE 2-5:

WRAL TIMING

6

CS

CLK

DI

0

1

X

1

0

•••

Dx

•••

X

D0

10

11

BUSY

HIGH-Z

READY

DO

HIGH-Z

14

Ensured by Characterization at VCC = 4.5V to +5.5V.

DS21712A-page 8

2002 Microchip Technology Inc.

93LC46/56/66

FIGURE 2-6:

ERASE TIMING

6

CS

CHECK STATUS

CLK

DI

1

An

An-1 An-2

A0

•••

1

11

10

HIGH-Z

BUSY

READY

DO

HIGH-Z

12

FIGURE 2-7:

ERAL TIMING

6

CS

CHECK STATUS

CLK

DI

1

0

1

0

X

•••

11

10

HIGH-Z

DO

BUSY

READY

HIGH-Z

Ensured by Characterization at Vcc = 4.5V to +5.5V.

13

2002 Microchip Technology Inc.

DS21712A-page 9

93LC46/56/66

3.0

PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

ROTATED

SOIC

Name

PDIP

Description

Chip Select

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

Memory Configuration

Not Utilized

+1.8V to 5.5V Power Supply

TSSOP

CS

CLK

DI

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

3

4

5

6

7

8

1

2

DO

VSS

ORG

NU

VCC

data bits before an instruction is executed (see instruc-

3.1

Chip Select (CS)

tion set truth table). CLK and DI then become don't care

inputs waiting for a new start condition to be detected.

A HIGH level selects the device. A LOW level deselects the

device and forces it into standby mode. However, a program-

ming cycle which is already initiated and/or in progress will

be completed, regardless of the CS input signal. If CS is

brought LOW during a program cycle, the device will go into

standby mode as soon as the programming cycle is com-

pleted.

Note: CS must go LOW between consecutive

instructions.

3.3

Data In (DI)

Data In is used to clock in a START bit, opcode,

CS must be LOW for 250 ns minimum (TCSL) between con-

secutive instructions. If CS is LOW, the internal control logic

is held in a RESET status.

address, and data synchronously with the CLK input.

3.4

Data Out (DO)

Data Out is used in the READ mode to output data syn-

chronously with the CLK input (TPD after the positive

edge of CLK).

This pin also provides READY/BUSY status informa-

tion during ERASE and WRITE cycles. READY/BUSY

status information is available on the DO pin if CS is

brought HIGH after being LOW for minimum chip select

LOW time (TCSL) and an ERASE or WRITE operation

has been initiated.

The status signal is not available on DO, if CS is held

LOW or HIGH during the entire WRITE or ERASE

cycle. In all other cases DO is in the HIGH-Z mode. If

status is checked after the WRITE/ERASE cycle, a

pull-up resistor on DO is required to read the READY

signal.

3.2

Serial Clock (CLK)

The Serial Clock is used to synchronize the communi-

cation between a master device and the 93LC46/56/66.

Opcode, address, and data bits are clocked in on the

positive edge of CLK. Data bits are also clocked out on

the positive edge of CLK.

CLK can be stopped anywhere in the transmission

sequence (at HIGH or LOW level) and can be contin-

ued anytime with respect to clock HIGH time (TCKH)

and clock LOW time (TCKL). This gives the controlling

master freedom in preparing opcode, address, and

data.

CLK is a “Don't Care” if CS is LOW (device deselected).

If CS is HIGH, but START condition has not been

detected, any number of clock cycles can be received

by the device without changing its status (i.e., waiting

for START condition).

CLK cycles are not required during the self-timed

WRITE (i.e., auto ERASE/WRITE) cycle.

3.5

Organization (ORG)

When ORG is connected to VCC, the (x16) memory

organization is selected. When ORG is tied to VSS, the

(x8) memory organization is selected. ORG can only be

floated for clock speeds of 1 MHz or less for the (x16)

memory organization. For clock speeds greater than

1 MHz, ORG must be tied to VCC or VSS.

After detection of a start condition the specified number

of clock cycles (respectively LOW to HIGH transitions

of CLK) must be provided. These clock cycles are

required to clock in all required opcode, address, and

DS21712A-page 10

2002 Microchip Technology Inc.

93LC46/56/66

4.0

4.1

PACKAGING INFORMATION

Package Marking Information

8-Lead PDIP (300 mil)

Example:

XXXXXXXX

XXXXXNNN

93LC46

I/PNNN

YYWW

8-Lead SOIC (150 mil)

Example:

XXXXXXXX

XXXXYYWW

93LC46

I/SNYYWW

NNN

8-Lead Rotated SOIC (150 mil)

Example:

XXXXXXXX

XXXXYYWW

93LC46X

I/SNYYWW

NNN

Legend: XX...X Customer specific information*

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line thus limiting the number of available characters

for customer specific information.

*

Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

2002 Microchip Technology Inc.

DS21712A-page 11

93LC46/56/66

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

1

α

E

A2

A

L

c

A1

β

B1

B

p

eB

Units

Dimension Limits

INCHES*

NOM

MILLIMETERS

MIN

MAX

MIN

NOM

8

MAX

n

p

A

A2

A1

E

E1

D

L

c

B1

B

Number of Pins

Pitch

Top to Seating Plane

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

Tip to Seating Plane

Lead Thickness

Upper Lead Width

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

8

.100

.155

.130

2.54

3.94

3.30

.140

.170

.145

3.56

2.92

4.32

3.68

.115

.015

.300

.240

.360

.125

.008

.045

.014

.310

5

0.38

7.62

6.10

9.14

3.18

0.20

1.14

0.36

7.87

5

.313

.250

.373

.130

.012

.058

.018

.370

10

.325

.260

.385

.135

.015

.070

.022

.430

15

7.94

6.35

9.46

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

9.78

3.43

0.38

1.78

0.56

10.92

15

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-018

DS21712A-page 12

2002 Microchip Technology Inc.

93LC46/56/66

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

B

n

1

h

α

45×

c

A2

A

f

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

A

A2

A1

E

E1

D

h

L

f

Number of Pins

Pitch

Overall Height

8

.050

.061

.056

.007

.237

.154

.193

.015

.025

4

1.27

1.55

1.42

0.18

6.02

3.91

4.90

0.38

0.62

4

.053

.069

1.35

1.75

Molded Package Thickness

Standoff

.052

.004

.228

.146

.189

.010

.019

0

.061

.010

.244

.157

.197

.020

.030

8

1.32

0.10

5.79

3.71

4.80

0.25

0.48

0

1.55

0.25

6.20

3.99

5.00

0.51

0.76

8

§

Overall Width

Molded Package Width

Overall Length

Chamfer Distance

Foot Length

Foot Angle

c

Lead Thickness

Lead Width

.008

.013

0

.009

.017

12

.010

.020

15

0.20

0.33

0

0.23

0.42

12

0.25

0.51

15

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

2002 Microchip Technology Inc.

DS21712A-page 13

93LC46/56/66

NOTES:

DS21712A-page 14

2002 Microchip Technology Inc.

93LC46/56/66

Systems Information and Upgrade Hot Line

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip

World Wide Web (WWW) site.

The web site is used by Microchip as a means to make

files and information easily available to customers. To

view the site, the user must have access to the Internet

and a web browser, such as Netscape or Microsoft

Explorer. Files are also available for FTP download

from our FTP site.

The Systems Information and Upgrade Line provides

system users a listing of the latest versions of all of

Microchip's development systems software products.

Plus, this line provides information on how customers

can receive any currently available upgrade kits.The

Hot Line Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

013001

ConnectingtotheMicrochipInternetWebSite

The Microchip web site is available by using your

favorite Internet browser to attach to:

www.microchip.com

The file transfer site is available by using an FTP ser-

vice to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of

services. Users may download files for the latest

Development Tools, Data Sheets, Application Notes,

User's Guides, Articles and Sample Programs. A vari-

ety of Microchip specific business information is also

available, including listings of Microchip sales offices,

distributors and factory representatives. Other data

available for consideration is:

• Latest Microchip Press Releases

• Technical Support Section with Frequently Asked

Questions

• Design Tips

• Device Errata

• Job Postings

• Microchip Consultant Program Member Listing

• Links to other useful web sites related to

Microchip Products

• Conferences for products, Development Systems,

technical information and more

• Listing of seminars and events

2002 Microchip Technology Inc.

DS21712A-page 15

93LC46/56/66

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this Data Sheet.

To:

Technical Publications Manager

Reader Response

Total Pages Sent

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

Literature Number:

DS21712A

Device:

93LC46/56/66

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this data sheet easy to follow? If not, why?

4. What additions to the data sheet do you think would enhance the structure and subject?

5. What deletions from the data sheet could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

8. How would you improve our software, systems, and silicon products?

DS21712A-page 16

2002 Microchip Technology Inc.

93LC46/56/66

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO.

Device

X

/XX

Examples:

Temperature

Range

Package

a)

b)

c)

d)

93LC46-I/P:

1K, 128x8 or 64x16 Serial

EEPROM, PDIP package

93LC46-I/SN: 1K, 128x8 or 64x16 Serial

EEPROM, SOIC package

93LC46T-I/SN: 1K, 128x8 or 64x16 Serial

EEPROM, SOIC package, tape and reel

93LC46X-I/SN: 1K, 128x8 or 64x16 Serial

EEPROM, Rotated SOIC package

Device:

93LC46:

1K 2.5V Microwire Serial EEPROM

1K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

1K 2.5V Microwire Serial EEPROM

(Tape and Reel)

93LC46X:

93LC46T:

93LC46XT: 1K 2.5V Microwire Serial EEPROM

(Tape and Reel)

a)

b)

c)

d)

93LC56-I/P:

2K, 256x8 or 128x16 Serial

93LC56:

2K 2.5V Microwire Serial EEPROM

2K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

2K 2.5V Microwire Serial EEPROM

(Tape and Reel)

EEPROM, PDIP package

93LC56X:

93LC56-I/SN: 2K, 256x8 or 128x16 Serial

EEPROM, SOIC package

93LC56T-I/SN: 2K, 256x8 or 128x16 Serial

EEPROM, SOIC package, tape and reel

93LC56X-I/SN: 2K, 256x8 or 128x16 Serial

EEPROM, Rotated SOIC package

93LC56T:

93LC56XT: 2K 2.5V Microwire Serial EEPROM

(Tape and Reel)

93LC66:

4K 2.5V Microwire Serial EEPROM

4K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

4K 2.5V Microwire Serial EEPROM

(Tape and Reel)

93LC66X:

a)

b)

c)

d)

93LC66-I/P:

4K, 512x8 or 256x16 Serial

93LC66T:

EEPROM, PDIP package

93LC66XT: 4K 2.5V Microwire Serial EEPROM

(Tape and Reel)

93LC66-I/SN: 4K, 512x8 or 256x16 Serial

EEPROM, SOIC package

93LC66T-I/SN: 4K, 512x8 or 256x16 Serial

EEPROM, SOIC package, tape and reel

93LC66X-I/SN: 4K, 512x8 or 256x16 Serial

EEPROM, Rotated SOIC package

Temperature Range:

Package:

I

=

-40°C to +85°C

P

=

Plastic DIP (300 mil body), 8-lead

Plastic SOIC (150 mil Body), 8-lead

SN

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-

mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

2002 Microchip Technology Inc.

DS21712A-page17

93LC46/56/66

NOTES:

DS21712A-page 18

2002 Microchip Technology Inc.

Information contained in this publication regarding device

applications and the like is intended through suggestion only

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

No representation or warranty is given and no liability is

assumed by Microchip Technology Incorporated with respect

to the accuracy or use of such information, or infringement of

patents or other intellectual property rights arising from such

use or otherwise. Use of Microchip’s products as critical com-

ponents in life support systems is not authorized except with

express written approval by Microchip. No licenses are con-

veyed, implicitly or otherwise, under any intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, FilterLab,

KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PIC-

START, PRO MATE, SEEVAL and The Embedded Control Solu-

tions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,

In-Circuit Serial Programming, ICSP, ICEPIC, microPort,

Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,

MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode

and Total Endurance are trademarks of Microchip Technology

Incorporated in the U.S.A.

Serialized Quick Turn Programming (SQTP) is a service mark

of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received QS-9000 quality system

certification for its worldwide headquarters,

design and wafer fabrication facilities in

Chandler and Tempe, Arizona in July 1999. The

Company’s quality system processes and

procedures are QS-9000 compliant for its

®

PICmicro 8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs and microperipheral

products. In addition, Microchip’s quality

system for the design and manufacture of

development systems is ISO 9001 certified.

2002 Microchip Technology Inc.

DS21712A - page 19

M

WORLDWIDE SALES AND SERVICE

Japan

AMERICAS

ASIA/PACIFIC

Microchip Technology Japan K.K.

Benex S-1 6F

Corporate Office

Australia

2355 West Chandler Blvd.

Microchip Technology Australia Pty Ltd

Suite 22, 41 Rawson Street

Epping 2121, NSW

3-18-20, Shinyokohama

Kohoku-Ku, Yokohama-shi

Kanagawa, 222-0033, Japan

Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Chandler, AZ 85224-6199

Tel: 480-792-7200 Fax: 480-792-7277

Technical Support: 480-792-7627

Web Address: http://www.microchip.com

Australia

Tel: 61-2-9868-6733 Fax: 61-2-9868-6755

Korea

Rocky Mountain

China - Beijing

Microchip Technology Korea

168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku

Seoul, Korea 135-882

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7966 Fax: 480-792-7456

Microchip Technology Consulting (Shanghai)

Co., Ltd., Beijing Liaison Office

Unit 915

Bei Hai Wan Tai Bldg.

Atlanta

Tel: 82-2-554-7200 Fax: 82-2-558-5934

No. 6 Chaoyangmen Beidajie

Beijing, 100027, No. China

Tel: 86-10-85282100 Fax: 86-10-85282104

500 Sugar Mill Road, Suite 200B

Atlanta, GA 30350

Singapore

Microchip Technology Singapore Pte Ltd.

200 Middle Road

Tel: 770-640-0034 Fax: 770-640-0307

China - Chengdu

Boston

#07-02 Prime Centre

Microchip Technology Consulting (Shanghai)

Co., Ltd., Chengdu Liaison Office

Rm. 2401, 24th Floor,

2 Lan Drive, Suite 120

Westford, MA 01886

Tel: 978-692-3848 Fax: 978-692-3821

Singapore, 188980

Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Ming Xing Financial Tower

Chicago

Microchip Technology Taiwan

11F-3, No. 207

No. 88 TIDU Street

333 Pierce Road, Suite 180

Itasca, IL 60143

Chengdu 610016, China

Tung Hua North Road

Taipei, 105, Taiwan

Tel: 86-28-6766200 Fax: 86-28-6766599

Tel: 630-285-0071 Fax: 630-285-0075

China - Fuzhou

Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

Dallas

Microchip Technology Consulting (Shanghai)

Co., Ltd., Fuzhou Liaison Office

Unit 28F, World Trade Plaza

4570 Westgrove Drive, Suite 160

Addison, TX 75001

EUROPE

Tel: 972-818-7423 Fax: 972-818-2924

No. 71 Wusi Road

Detroit

Denmark

Fuzhou 350001, China

Tri-Atria Office Building

Microchip Technology Nordic ApS

Regus Business Centre

Lautrup hoj 1-3

Tel: 86-591-7503506 Fax: 86-591-7503521

32255 Northwestern Highway, Suite 190

Farmington Hills, MI 48334

Tel: 248-538-2250 Fax: 248-538-2260

China - Shanghai

Microchip Technology Consulting (Shanghai)

Co., Ltd.

Ballerup DK-2750 Denmark

Tel: 45 4420 9895 Fax: 45 4420 9910

Kokomo

Room 701, Bldg. B

France

2767 S. Albright Road

Kokomo, Indiana 46902

Tel: 765-864-8360 Fax: 765-864-8387

Los Angeles

Far East International Plaza

No. 317 Xian Xia Road

Microchip Technology SARL

Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

Shanghai, 200051

Tel: 86-21-6275-5700 Fax: 86-21-6275-5060

Batiment A - ler Etage

18201 Von Karman, Suite 1090

Irvine, CA 92612

China - Shenzhen

91300 Massy, France

Microchip Technology Consulting (Shanghai)

Co., Ltd., Shenzhen Liaison Office

Rm. 1315, 13/F, Shenzhen Kerry Centre,

Renminnan Lu

Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Tel: 949-263-1888 Fax: 949-263-1338

Germany

New York

Microchip Technology GmbH

Gustav-Heinemann Ring 125

D-81739 Munich, Germany

Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

150 Motor Parkway, Suite 202

Hauppauge, NY 11788

Shenzhen 518001, China

Tel: 631-273-5305 Fax: 631-273-5335

Tel: 86-755-2350361 Fax: 86-755-2366086

San Jose

Hong Kong

Italy

Microchip Technology Inc.

2107 North First Street, Suite 590

San Jose, CA 95131

Microchip Technology Hongkong Ltd.

Unit 901-6, Tower 2, Metroplaza

223 Hing Fong Road

Microchip Technology SRL

Centro Direzionale Colleoni

Palazzo Taurus 1 V. Le Colleoni 1

20041 Agrate Brianza

Tel: 408-436-7950 Fax: 408-436-7955

Kwai Fong, N.T., Hong Kong

Tel: 852-2401-1200 Fax: 852-2401-3431

Toronto

Milan, Italy

6285 Northam Drive, Suite 108

Mississauga, Ontario L4V 1X5, Canada

Tel: 905-673-0699 Fax: 905-673-6509

India

Tel: 39-039-65791-1 Fax: 39-039-6899883

Microchip Technology Inc.

India Liaison Office

United Kingdom

Arizona Microchip Technology Ltd.

505 Eskdale Road

Divyasree Chambers

1 Floor, Wing A (A3/A4)

No. 11, O’Shaugnessey Road

Bangalore, 560 025, India

Tel: 91-80-2290061 Fax: 91-80-2290062

Winnersh Triangle

Wokingham

Berkshire, England RG41 5TU

Tel: 44 118 921 5869 Fax: 44-118 921-5820

03/01/02

*DS21712A*

DS21712A-page 20

2002 Microchip Technology Inc.


型号：	93LC56I/P
厂家：	ETC
描述：	1K/2K/4K 2.5 V Serial EEPROM(397.55 k) 1K / 2K / 4K 2.5 V串行EEPROM （ 397.55 K）\n 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件：	总20页 (文件大小：383K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

93LC56I/P [ETC]

相关型号：

93LC56I/SN

93LC56T

93LC56T-E/SL

93LC56T-E/SM

93LC56T-E/SN

93LC56T-I/P

93LC56T-I/SL

93LC56T-I/SM

93LC56T-I/SN

93LC56T/P

93LC56T/SL

93LC56T/SM