74F132SJX [ETC]
Quad 2-input NAND Gate ; 四2输入与非门\n
| 型号： | 74F132SJX |
| 厂家： | 
ETC |
| 描述： | Quad 2-input NAND Gate
|
| 文件： | 总5页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
April 1988
Revised September 2000
74F132
Quad 2-Input NAND Schmitt Trigger
ture. The Schmitt Trigger uses positive feedback to effec-
tively speed-up slow input transitions, and provide different
input threshold voltages for positive and negative-going
transitions. This hysteresis between the positive-going and
negative-going input threshold (typically 800 mV) is deter-
mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.
General Description
The F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL out-
put levels. They are capable of transforming slowly chang-
ing input signals into sharply defined, jitter-free output
signals. In addition, they have a greater noise margin than
conventional NAND gates.
Each circuit contains a 2-input Schmitt Trigger followed by
level shifting circuitry and a standard FAST output struc-
Ordering Code:
Order Number Package Number
Package Description
74F132SC
74F132SJ
74F132PC
M14A
M14D
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Function Table
Unit Loading/Fan Out
Inputs
Outputs
A
L
B
L
O
H
H
H
L
U.L.
Input IIH/IIL
Pin Names Description
HIGH/LOW Output IOH/IOL
L
H
L
An, Bn
On
Inputs
1.0/1.0
50/33.3
20 µA/−0.6 mA
−1 mA/20 mA
H
H
Outputs
H
H = HIGH Voltage Level
L = LOW Voltage Level
FAST is a registered trademark of Fairchild Semiconductor Corporation
© 2000 Fairchild Semiconductor Corporation
DS009477
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
3-STATE Output
−0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
twice the rated IOL (mA)
4000V
ESD Last Passing Voltage (Min)
DC Electrical Characteristics
Min
Typ
Max
VCC
Symbol
VT+
Parameter
Positive-going Threshold
Negative-going Threshold
Units
Conditions
1.5
0.7
0.4
2.0
1.1
V
V
V
V
V
5.0
5.0
5.0
Min
Min
VT−
+
−
∆VT
VCD
VOH
Hysteresis (VT − VT )
Input Clamp Diode Voltage
Output HIGH
−1.2
I
I
I
I
IN = −18 mA
10% VCC
5% VCC
2.5
2.7
OH = −1 mA
OH = −1 mA
OL = 20 mA
Voltage
VOL
IIH
Output LOW Voltage
Input HIGH Current
10% VCC
0.5
5.0
7.0
50
V
Min
Max
Max
Max
µA
µA
µA
V
IN = 2.7V
IN = 7.0V
IBVI
ICEX
VID
Input HIGH Current Breakdown Test
Output HIGH Leakage Current
Input Leakage Test
V
VOUT = VCC
ID = 1.9 µA
All Other Pins Grounded
IOD = 150 mV
All Other Pins Grounded
IN = 0.5V
VOUT = 0V
I
4.75
V
0.0
0.0
IOD
Output Leakage Circuit Current
V
3.75
µA
IIL
Input LOW Current
−0.6
−150
17.0
18.0
mA
mA
mA
mA
Max
Max
Max
Max
V
IOS
ICCH
ICCL
Output Short-Circuit Current
Power Supply Current
Power Supply Current
−60
V
O = HIGH
O = LOW
V
AC Electrical Characteristics
T
A = +25°C
T
A = 0°C to +70°C
CC = +5.0V
L = 50 pF
Max
V
CC = +5.0V
V
Symbol
Parameter
Units
C
L = 50 pF
C
Min
4.0
5.0
Typ
Max
Min
3.5
5.0
tPLH
tPHL
Propagation Delay
An, Bn to On
10.5
12.5
12.0
13.0
ns
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2
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
3
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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4
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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