2N7002LT1/D [ETC]
Small Signal MOSFET 115 mA， 60 Volts ; 小信号MOSFET 115毫安， 60伏\n
| 型号： | 2N7002LT1/D |
| 厂家： | 
ETC |
| 描述： | Small Signal MOSFET 115 mA， 60 Volts
|
| 文件： | 总8页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2N7002LT1
Preferred Device
Small Signal MOSFET
115 mAmps, 60 Volts
N–Channel SOT–23
MAXIMUM RATINGS
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Rating
Drain–Source Voltage
Symbol
Value
60
Unit
Vdc
V
DSS
115 mAMPS
60 VOLTS
Drain–Gate Voltage (R
= 1.0 MΩ)
V
DGR
60
Vdc
GS
Drain Current
– Continuous T = 25°C (Note 1.)
– Continuous T = 100°C (Note 1.)
– Pulsed (Note 2.)
I
±ā115
±ā75
±ā800
mAdc
R
= 7.5 W
D
DS(on)
I
D
C
C
I
DM
N–Channel
3
Gate–Source Voltage
– Continuous
V
±ā20
±ā40
Vdc
Vpk
GS
– Non–repetitive (t ≤ 50 µs)
V
GSM
p
THERMAL CHARACTERISTICS
Characteristic
1
Symbol
Max
Unit
Total Device Dissipation FR–5 Board
P
D
225
1.8
mW
mW/°C
(Note 3.) T = 25°C
A
2
Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation
R
556
300
°C/W
θJA
3
P
mW
mW/°C
D
Alumina Substrate,(Note 4.) T = 25°C
A
1
Derate above 25°C
2.4
2
Thermal Resistance, Junction to Ambient
Junction and Storage Temperature
R
417
°C/W
°C
θJA
SOT–23
CASE 318
STYLE 21
T , T
J stg
–ā55 to
+150
1. The Power Dissipation of the package may result in a lower continuous drain
current.
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
3. FR–5 = 1.0 x 0.75 x 0.062 in.
MARKING DIAGRAM
& PIN ASSIGNMENT
4. Alumina = 0.4 x 0.3 x 0.025 in 99.5% alumina.
Drain
3
702
W
1
Gate
2
Source
702
W
= Device Code
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
3000 Tape & Reel
2N7002LT1
2N7002LT3
SOT–23
SOT–23 10,000 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
December, 2000 – Rev. 4
2N7002LT1/D
2N7002LT1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
V
60
–
–
Vdc
(BR)DSS
(V
GS
= 0, I = 10 µAdc)
D
Zero Gate Voltage Drain Current
(V = 0, V = 60 Vdc)
T
T
= 25°C
= 125°C
I
–
–
–
–
1.0
500
µAdc
nAdc
nAdc
J
J
DSS
GS DS
Gate–Body Leakage Current, Forward
(V = 20 Vdc)
I
–
–
100
GSSF
GS
Gate–Body Leakage Current, Reverse
(V = –ā20 Vdc)
I
–
–
–100
GSSR
GS
ON CHARACTERISTICS (Note 2.)
Gate Threshold Voltage
V
I
1.0
–
–
2.5
–
Vdc
mA
Vdc
GS(th)
(V
DS
= V , I = 250 µAdc)
GS
D
On–State Drain Current
(V ≥ 2.0 V , V
500
D(on)
= 10 Vdc)
Static Drain–Source On–State Voltage
DS DS(on) GS
V
DS(on)
(V
GS
(V
GS
= 10 Vdc, I = 500 mAdc)
–
–
–
–
3.75
0.375
D
= 5.0 Vdc, I = 50 mAdc)
D
Static Drain–Source On–State Resistance
r
Ohms
DS(on)
(V
GS
= 10 V, I = 500 mAdc)
T
C
T
C
T
C
T
C
= 25°C
= 125°C
= 25°C
= 125°C
–
–
–
–
–
–
–
–
7.5
13.5
7.5
D
(V
GS
= 5.0 Vdc, I = 50 mAdc)
D
13.5
Forward Transconductance
(V ≥ 2.0 V , I = 200 mAdc)
g
FS
80
–
–
mmhos
DS DS(on)
D
DYNAMIC CHARACTERISTICS
Input Capacitance
C
–
–
–
–
–
–
50
25
pF
pF
pF
iss
(V
DS
= 25 Vdc, V
= 0, f = 1.0 MHz)
GS
Output Capacitance
(V = 25 Vdc, V
C
oss
= 0, f = 1.0 MHz)
DS
GS
Reverse Transfer Capacitance
(V = 25 Vdc, V = 0, f = 1.0 MHz)
C
5.0
rss
DS
GS
SWITCHING CHARACTERISTICS (Note 2.)
Turn–On Delay Time
t
t
–
–
–
–
20
40
ns
ns
d(on)
(V
DD
G
= 25 Vdc, I ^ 500 mAdc,
D
R
= 25 Ω, R = 50 Ω, V
= 10 V)
L
gen
Turn–Off Delay Time
d(off)
BODY–DRAIN DIODE RATINGS
Diode Forward On–Voltage
V
–
–
–
–
–
–
–1.5
–115
–800
Vdc
SD
(I = 11.5 mAdc, V
S
= 0 V)
GS
Source Current Continuous
(Body Diode)
I
mAdc
mAdc
S
Source Current Pulsed
I
SM
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%.
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2
2N7002LT1
TYPICAL ELECTRICAL CHARACTERISTICS
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.0
V
= 10 V
T
= 25°C
DS
A
25°C
-ā55°C
0.8
0.6
0.4
0.2
V
= 10 V
9 V
GS
125°C
8 V
7 V
6 V
5 V
4 V
3 V
0
1.0 2.0 3.0 4.0 5.0
6.0
7.0 8.0 9.0 10
0
1.0 2.0 3.0 4.0
5.0
6.0 7.0 8.0
9.0 10
V , DRAIN SOURCE VOLTAGE (VOLTS)
DS
V , GATE SOURCE VOLTAGE (VOLTS)
GS
Figure 1. Ohmic Region
Figure 2. Transfer Characteristics
2.4
1.2
1.05
1.1
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
V = V
DS GS
V
I
= 10 V
GS
I
D
= 1.0 mA
= 200 mA
D
1.10
1.0
0.95
0.9
0.85
0.8
0.75
0.7
-ā60
-ā20
+ā20
+ā60
+ā100
+ā140
-ā60
-ā20
+ā20
+ā60
+ā100
+ā140
T, TEMPERATURE (°C)
T, TEMPERATURE (°C)
Figure 3. Temperature versus Static
Drain–Source On–Resistance
Figure 4. Temperature versus Gate
Threshold Voltage
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3
2N7002LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
150°C – 25°C
P
=
= 225 milliwatts
D
556°C/W
determined by T
temperature of the die, R
, the maximum rated junction
, the thermal resistance from
J(max)
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225
milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Cladt. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
θJA
the device junction to ambient, and the operating
temperature, T . Using the values provided on the data
A
sheet for the SOT–23 package, P can be calculated as
D
follows:
T
– T
A
J(max)
P
=
D
R
θJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T of 25°C,
A
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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4
2N7002LT1
PACKAGE DIMENSIONS
SOT–23 (TO–236)
CASE 318–08
ISSUE AF
NOTES:
ąă1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
ąă2. CONTROLLING DIMENSION: INCH.
ąă3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
A
L
3
INCHES
DIM MIN MAX
MILLIMETERS
S
C
B
MIN
2.80
1.20
0.89
0.37
1.78
MAX
3.04
1.40
1.11
1
2
A
B
C
D
G
H
J
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
V
G
0.50
2.04
0.100
0.177
0.69
1.02
2.64
0.60
0.0005 0.0040 0.013
0.0034 0.0070 0.085
K
L
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
0.35
0.89
2.10
0.45
S
V
H
J
D
K
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
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5
2N7002LT1
Notes
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6
2N7002LT1
Notes
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7
2N7002LT1
Thermal Clad is a registered trademark of the Bergquist Company.
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are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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2N7002LT1/D
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