24LC64I/SN [ETC]
64K I2CT Serial EEPROM(406.89 k) ; 64K I2CT串行EEPROM （ 406.89 K）\n
| 型号： | 24LC64I/SN |
| 厂家： | 
ETC |
| 描述： | 64K I2CT Serial EEPROM(406.89 k)
|
| 文件： | 总24页 (文件大小：395K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
24AA64/24LC64
M
64K I2C™ Serial EEPROM
Device Selection Table
Description
The Microchip Technology Inc. 24AA64/24LC64
(24XX64*) is a 64 Kbit Electrically Erasable PROM.
The device is organized as eight blocks of 1K x 8-bit
memory with a 2-wire serial interface. Low voltage
design permits operation down to 1.8V with standby
and active currents of only 1 µA and 1 mA respectively.
It has been developed for advanced, low power appli-
cations such as personal communications or data
acquisition. The 24XX64 also has a page-write capabil-
ity for up to 32 bytes of data. Functional address lines
allow up to eight devices on the same bus, for up to
512 Kbits address space. The 24XX64 is available in
the standard 8-pin PDIP, surface mount SOIC, TSSOP
and MSOP packages.
Part
VCC
Max Clock
Temp
Number
Range
Frequency
Ranges
(1)
24AA64
24LC64
1.8-5.5
2.5-5.5
400 kHz
I
400 kHz
I, E
Note 1: 100 kHz for VCC <2.5V
Features
• Single supply with operation down to 1.8V
• Low power CMOS technology
- 1 mA active current typical
- 1 µA standby current (max.) (I-temp)
• Organized as 8 blocks of 8K bit (64K bit)
• 2-wire serial interface bus, I2C™ compatible
• Cascadable for up to eight devices
• Schmitt trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
Package Types
PDIP/SOIC/TSSOP/MSOP
ROTATED TSSOP
(24AA64X/24LC64X)
A0
A1
A2
1
2
3
4
8 Vcc
7 WP
8
7
6
5
1
2
3
4
• 100 kHz (24AA64) and 400 kHz (24LC64) com-
patibility
WP
Vcc
A0
SCL
SDA
Vss
A2
6
5
SCL
SDA
• Self-timed write cycle (including auto-erase)
• Page-write buffer for up to 32 bytes
• 2 ms typical write cycle time for page-write
• Hardware write protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
A1
Vss
Block Diagram
A0 A1 A2WP
HV GENERATOR
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP, and MSOP package
• Available temperature ranges:
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
EEPROM
ARRAY
XDEC
PAGE LATCHES
- Industrial (I):
- Automotive (E):
-40°C to +85°C
-40°C to +125°C
I/O
SCL
YDEC
SDA
VCC
VSS
SENSE AMP
R/W CONTROL
*24XX64 is used in this document as a generic part number for the 24AA64/24LC64 devices.
2002 Microchip Technology Inc.
DS21189E-page 1
24AA64/24LC64
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temp. with power applied ..........................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
1.1
DC Characteristics
VCC = +1.8V to +5.5V
DC CHARACTERISTICS
Industrial (I):
TAMB = -40°C to +85°C
Automotive (E): TAMB = -40°C to +125°C
Param.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
No.
D1
D2
D3
D4
VIH
—
VIL
WP, SCL and SDA pins
High level input voltage
Low level input voltage
Hysteresis of Schmitt
trigger inputs
—
—
—
—
—
—
—
0.3 VCC
—
—
V
V
—
—
—
(Note 1)
0.7 VCC
—
0.05 VCC
VHYS
V
D5
D6
D7
D8
VOL
ILI
ILO
Low level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
—
—
—
—
—
—
—
—
0.40
±10
±10
10
V
IOL = 3.0 mA, VCC = 2.5V
VIN =.1V to VCC
VOUT =.1V to VCC
µA
µA
pF
CIN,
VCC = 5.0V (Note 1)
COUT
TAMB = 25°C, FCLK = 1 MHz
D9
D10
D11
ICC write Operating current
ICC read
—
—
—
—
0.1
0.05
.01
—
3
1
1
5
mA
mA
µA
µA
VCC = 5.5V, SCL = 400 kHz
—
ICCS
Standby current
Industrial
Automotive
SDA = SCL = VCC
WP = VSS
Note 1: This parameter is periodically sampled and not 100% tested.
2: Typical measurements taken at room temperature.
DS21189E-page 2
2002 Microchip Technology Inc.
24AA64/24LC64
1.2
AC Characteristics
VCC = +1.8V to +5.5V
AC CHARACTERISTICS
Industrial (I):
TAMB = -40°C to +85°C
TAMB = -40°C to +125°C
Automotive (E):
Param.
Sym
Characteristic
Clock frequency
Min
Max
Units
Conditions
No.
1
2
3
4
FCLK
THIGH
TLOW
TR
—
—
600
4000
1300
4700
—
—
400
100
—
—
—
—
300
1000
kHz
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
Clock high time
Clock low time
ns
ns
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
SDA and SCL rise time
(Note 1)
5
6
TF
SDA and SCL fall time
—
300
ns
ns
(Note 1)
THD:STA START condition hold time
600
—
2.5V ≤ VCC ≤ 5.5V
4000
—
1.8V ≤ VCC < 2.5V (24AA64)
7
TSU:STA START condition setup time
600
4700
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
8
9
THD:DAT Data input hold time
TSU:DAT Data input setup time
0
100
250
—
—
—
ns
ns
(Note 2)
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
10
11
12
TSU:STO STOP condition setup time
600
—
—
ns
ns
ns
2.5V ≤ VCC ≤ 5.5V
4000
1.8V ≤ VCC < 2.5V (24AA64)
TAA
Output valid from clock
—
900
2.5V ≤ VCC ≤ 5.5V
(Note 2)
—
3500
1.8V ≤ VCC < 2.5V (24AA64)
TBUF
Bus free time: Time the bus
must be free before a new
transmission can start
1300
4700
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
13
14
15
16
TOF
TSP
TWC
—
Output fall time from VIH min- 20+0.1CB
250
250
50
ns
ns
2.5V ≤ VCC ≤ 5.5V
imum to VIL maximum
—
—
1.8V ≤ VCC ≤ 2.5V (24AA64)
Input filter spike suppression
(SDA and SCL pins)
(Notes 1 and 3)
Write cycle time (byte or
page)
—
5
ms
—
Endurance
1M
—
cycles 25°C, VCC = 5.0V, Block Mode
(Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on Microchip’s website:
www.microchip.com.
2002 Microchip Technology Inc.
DS21189E-page 3
24AA64/24LC64
FIGURE 1-1: BUS TIMING DATA
5
4
2
3
SCL
7
8
9
10
6
SDA
14
IN
12
11
SDA
OUT
FIGURE 1-2: BUS TIMING START/STOP
D4
SCL
6
7
10
SDA
START
STOP
DS21189E-page 4
2002 Microchip Technology Inc.
24AA64/24LC64
3.4
Data Valid (D)
2.0
FUNCTIONAL DESCRIPTION
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device
and is theoretically unlimited, although only the last six-
teen will be stored when doing a write operation. When
an overwrite does occur it will replace data in a first-in
first-out (FIFO) fashion.
The 24XX64 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, and a device
receiving data as receiver. The bus has to be controlled
by a master device which generates the serial clock
(SCL), controls the bus access and generates the
START and STOP conditions, while the 24XX64 works
as slave. Both master and slave can operate as trans-
mitter or receiver, but the master device determines
which mode is activated.
3.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
Accordingly, the following bus conditions have been
defined (Figure 3-1).
3.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
Note: The 24XX64 does not generate any
acknowledge bits if an internal program-
ming cycle is in progress.
3.1
Bus not Busy (A)
The device that acknowledges, has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX64) will leave the data line
HIGH to enable the master to generate the STOP con-
dition.
Both data and clock lines remain HIGH.
3.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.
3.3
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must be ended with a STOP condition.
FIGURE 3-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A)
(B)
(D)
(D)
(C) (A)
SCL
SDA
START
STOP
ADDRESS OR
DATA
CONDITION
CONDITION
ACKNOWLEDGE ALLOWED
VALID
TO CHANGE
2002 Microchip Technology Inc.
DS21189E-page 5
24AA64/24LC64
FIGURE 3-2: CONTROL BYTE FORMAT
3.6
Device Addressing
Read/Write Bit
A control byte is the first byte received following the
start condition from the master device (Figure 3-2). The
control byte consists of a four bit control code; for the
24XX64 this is set as 1010 binary for read and write
operations. The next three bits of the control byte are
the chip select bits (A2, A1, A0). The chip select bits
allow the use of up to eight 24XX64 devices on the
same bus and are used to select which device is
accessed. The chip select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1, and A0 pins for the device to respond. These bits
are in effect the three most significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a one a read operation is
selected, and when set to a zero a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 3-3). Because
only A12...A0 are used, the upper three address bits
are don’t care bits. The upper address bits are trans-
ferred first, followed by the less significant bits.
Chip Select
Control Code
Bits
S
1
0
1
0
A2 A1 A0 R/W ACK
Slave Address
Acknowledge Bit
Start Bit
3.7
Contiguous Addressing Across
Multiple Devices
The chip select bits A2, A1, A0 can be used to expand
the contiguous address space for up to 512K bits by
adding up to eight 24XX64's on the same bus. In this
case, software can use A0 of the control byte as
address bit A13, A1 as address bit A14, and A2 as
address bit A15. It is not possible to sequentially read
across device boundaries.
Following the start condition, the 24XX64 monitors the
SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appropri-
ate device select bits, the slave device outputs an
acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX64 will select a read or
write operation.
FIGURE 3-3: ADDRESS SEQUENCE BIT ASSIGNMENTS
CONTROL BYTE
ADDRESS HIGH BYTE
ADDRESS LOW BYTE
A
A
2
A
1
A
0
A
A
A
9
A
8
A
7
A
0
•
•
•
•
•
•
1
0
1
0
R/W
X
X
X
10
12 11
CONTROL
CODE
CHIP
X = Don’t Care Bit
SELECT
BITS
DS21189E-page 6
2002 Microchip Technology Inc.
24AA64/24LC64
4.0
4.1
WRITE OPERATIONS
Byte Write
Note: Page write operations are limited to writ-
ing bytes within a single physical page,
regardless of the number of bytes actu-
ally being written. Physical page bound-
aries start at addresses that are integer
multiples of the page buffer size (or
‘page size’) and end at addresses that
are integer multiples of [page size - 1]. If
a page write command attempts to write
across a physical page boundary, the
result is that the data wraps around to
the beginning of the current page (over-
writing data previously stored there),
instead of being written to the next page
as might be expected. It is therefore
necessary for the application software to
prevent page write operations that
would attempt to cross a page boundary.
Following the start condition from the master, the
control code (four bits), the chip select (three bits), and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow after it has generated an acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the high-order byte of the word
address and will be written into the address pointer of
the 24XX64. The next byte is the least significant
address byte. After receiving another acknowledge sig-
nal from the 24XX64 the master device will transmit the
data word to be written into the addressed memory
location. The 24XX64 acknowledges again and the
master generates a stop condition. This initiates the
internal write cycle, and during this time the 24XX64
will not generate acknowledge signals (Figure 4-1). If
an attempt is made to write to the array with the WP pin
held high, the device will acknowledge the command
but no write cycle will occur, no data will be written and
the device will immediately accept a new command.
After a byte write command, the internal address
counter will point to the address location following the
one that was just written.
4.3
Write Protection
The WP pin allows the user to write protect the entire
array (0000-1FFF) when the pin is tied to VCC. If tied to
VSS or left floating, the write protection is disabled. The
WP pin is sampled at the STOP bit for every write com-
mand (Figure 3-1) Toggling the WP pin after the STOP
bit will have no effect on the execution of the write
cycle.
4.2
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX64 in the same way as
in a byte write. But instead of generating a stop condi-
tion, the master transmits up to 31 additional bytes
which are temporarily stored in the on-chip page buffer
and will be written into memory after the master has
transmitted a stop condition. After receipt of each word,
the five lower address pointer bits are internally incre-
mented by one. If the master should transmit more than
32 bytes prior to generating the stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the stop condition is received, an inter-
nal write cycle will begin (Figure 4-2). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command but no write
cycle will occur, no data will be written and the device
will immediately accept a new command.
2002 Microchip Technology Inc.
DS21189E-page 7
24AA64/24LC64
FIGURE 4-1: BYTE WRITE
S
BUS ACTIVITY
MASTER
T
A
R
T
S
T
CONTROL
BYTE
ADDRESS
ADDRESS
LOW BYTE
HIGH BYTE
DATA
O
P
A A A
SDA LINE
X X X
S 1 0 1 0
0
P
2 1 0
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
X = don’t care bit
FIGURE 4-2: PAGE WRITE
S
T
S
T
CONTROL
BYTE
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE
BUS ACTIVITY
MASTER
A
R
T
DATA BYTE 0
DATA BYTE 31
O
P
A A A
SDA LINE
X X X
P
S 1 0 1 0
0
2 1 0
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
X = don’t care bit
DS21189E-page 8
2002 Microchip Technology Inc.
24AA64/24LC64
FIGURE 5-1: ACKNOWLEDGE POLLING
FLOW
5.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition followed by the control byte for a
write command (R/W = 0). If the device is still busy with
the write cycle, then no ACK will be returned. If no ACK
is returned, then the start bit and control byte must be
re-sent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next read or write command. See Figure 5-1 for
flow diagram.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
NO
Acknowledge
(ACK = 0)?
YES
Next
Operation
2002 Microchip Technology Inc.
DS21189E-page 9
24AA64/24LC64
6.3
Sequential Read
6.0
READ OPERATION
Sequential reads are initiated in the same way as a ran-
dom read except that after the 24XX64 transmits the
first data byte, the master issues an acknowledge as
opposed to the stop condition used in a random read.
This acknowledge directs the 24XX64 to transmit the
next sequentially addressed 8-bit word (Figure 6-3).
Following the final byte transmitted to the master, the
master will NOT generate an acknowledge but will gen-
erate a stop condition. To provide sequential reads the
24XX64 contains an internal address pointer which is
incremented by one at the completion of each opera-
tion. This address pointer allows the entire memory
contents to be serially read during one operation. The
internal address pointer will automatically roll over from
address 1FFF to address 0000 if the master acknowl-
edges the byte received from the array address 1FFF.
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
6.1
Current Address Read
The 24XX64 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.
Upon receipt of the control byte with R/W bit set to one,
the 24XX64 issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a stop condition and the
24XX64 discontinues transmission (Figure 6-1).
6.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
24XX64 as part of a write operation (R/W bit set to 0).
After the word address is sent, the master generates a
start condition following the acknowledge. This termi-
nates the write operation, but not before the internal
address pointer is set. Then the master issues the
control byte again but with the R/W bit set to a one. The
24XX64 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a stop condition which
causes the 24XX64 to discontinue transmission
(Figure 6-2). After a random read command, the inter-
nal address counter will point to the address location
following the one that was just read.
FIGURE 6-1: CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
CONTROL
BYTE
S
T
DATA (n)
O
P
T
SDA LINE
S
P
A
C
K
N
O
BUS ACTIVITY
A
C
K
DS21189E-page 10
2002 Microchip Technology Inc.
24AA64/24LC64
FIGURE 6-2: RANDOM READ
S
S
T
A
R
T
BUS ACTIVITY
MASTER
T
A
R
T
S
CONTROL
BYTE
ADDRESS
ADDRESS
LOW BYTE
CONTROL
BYTE
DATA
BYTE
T
O
P
HIGH BYTE
A A A
A A A
SDA LINE
X X X
S 1 0 1 0
0
S 1 0 1 0
1
P
2 1 0
2 1 0
A
C
K
A
C
K
A
C
K
N
O
A
C
K
A
C
K
BUS ACTIVITY
X = Don’t Care Bit
FIGURE 6-3: SEQUENTIAL READ
S
BUS ACTIVITY
CONTROL
T
DATA n
DATA n + 1
DATA n + 2
DATA n + X
MASTER
SDA LINE
O
BYTE
P
P
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
BUS ACTIVITY
2002 Microchip Technology Inc.
DS21189E-page 11
24AA64/24LC64
7.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 7-1.
TABLE 7-1: PIN FUNCTION TABLE
ROTATED
TSSOP
Name
PDIP
SOIC
TSSOP
MSOP
Description
A0
A1
A2
VSS
SDA
SCL
WP
VCC
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
3
4
5
6
7
8
1
2
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write Protect Input
+1.8V to 5.5V Power Supply
7.1
A0, A1, A2 Chip Address Inputs
7.3
Serial Clock (SCL)
The A0,A1,A2 inputs are used by the 24XX64 for mul-
tiple device operation. The levels on these inputs are
compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
This input is used to synchronize the data transfer from
and to the device.
7.4
Write Protect (WP)
Up to eight devices may be connected to the same bus
by using different chip select bit combinations. These
inputs must be connected to either VCC or VSS.
This pin can be connected to either VSS, VCC or left
floating. An internal pull-down resistor on this pin will
keep the device in the unprotected state if left floating.
If tied to VSS or left floating, normal memory operation
is enabled (read/write the entire memory 0000-1FFF).
7.2
Serial Data (SDA)
This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pullup
resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz)
If tied to VCC, WRITE operations are inhibited. Read
operations are not affected.
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
DS21189E-page 12
2002 Microchip Technology Inc.
24AA64/24LC64
8.0
8.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
XXXXXNNN
24LC64
I/PNNN
YYWW
YYWW
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
24LC64
I/SNYYWW
NNN
NNN
8-Lead SOIC (208 mil)
Example:
XXXXXXXX
XXXXXXXX
24LC64
I/SM
YYWWNNN
YYWWNNN
Example:
8-Lead TSSOP
4L64
IYWW
NNN
XXXX
XYWW
NNN
Rotated TSSOP
marking will be
“4LBX”
Example:
8-Lead MSOP
XXXXXX
YWWNNN
4L64I
YWWNNN
Legend: XX...X Customer specific information*
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
2002 Microchip Technology Inc.
DS21189E-page 13
24AA64/24LC64
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
A
A2
A1
E
E1
D
L
c
B1
B
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
8
.100
.155
.130
2.54
3.94
3.30
.140
.170
.145
3.56
2.92
4.32
3.68
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21189E-page 14
2002 Microchip Technology Inc.
24AA64/24LC64
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45×
c
A2
A
f
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
A
A2
A1
E
E1
D
h
L
f
Number of Pins
Pitch
Overall Height
8
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
.053
.069
1.35
1.75
Molded Package Thickness
Standoff
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.32
0.10
5.79
3.71
4.80
0.25
0.48
0
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
2002 Microchip Technology Inc.
DS21189E-page 15
24AA64/24LC64
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)
E
E1
p
D
2
n
1
B
α
c
A2
A
φ
A1
L
β
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
A
A2
A1
E
E1
D
Number of Pins
Pitch
Overall Height
8
.050
.075
.074
.005
.313
.208
.205
.025
4
1.27
.070
.080
1.78
1.75
1.97
1.88
0.13
7.95
5.28
5.21
0.64
4
2.03
Molded Package Thickness
.069
.002
.300
.201
.202
.020
0
.008
.014
0
.078
.010
.325
.212
.210
.030
8
.010
.020
15
1.98
0.25
8.26
5.38
5.33
0.76
8
0.25
0.51
15
Standoff
§
0.05
7.62
5.11
5.13
0.51
0
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
L
φ
c
B
α
.009
.017
12
0.20
0.36
0
0.23
0.43
12
Mold Draft Angle Top
Mold Draft Angle Bottom
β
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
Drawing No. C04-056
DS21189E-page 16
2002 Microchip Technology Inc.
24AA64/24LC64
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
f
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
Overall Height
8
.026
0.65
A
.043
1.10
0.95
0.15
6.50
4.50
3.10
0.70
8
Molded Package Thickness
Standoff
A2
A1
E
E1
D
L
f
c
.033
.035
.004
.251
.173
.118
.024
4
.006
.010
5
.037
.006
.256
.177
.122
.028
8
.008
.012
10
0.85
0.05
6.25
4.30
2.90
0.50
0
0.09
0.19
0
0.90
0.10
6.38
4.40
3.00
0.60
4
0.15
0.25
5
§
.002
.246
.169
.114
.020
0
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
.004
.007
0
0.20
0.30
10
B
α
β
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
2002 Microchip Technology Inc.
DS21189E-page 17
24AA64/24LC64
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
p
E1
D
2
B
n
1
α
A2
A
A1
c
φ
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
NOM
MIN
MAX
MIN
MAX
n
p
Number of Pins
Pitch
8
8
.026
0.65
Overall Height
Molded Package Thickness
A
A2
A1
E
E1
D
.044
1.18
.030
.034
.038
.006
.200
.122
.122
.028
.039
0.76
0.05
0.86
0.97
0.15
.5.08
3.10
3.10
0.70
1.00
Standoff
§
.002
.184
.114
.114
.016
.035
Overall Width
Molded Package Width
Overall Length
Foot Length
Footprint (Reference)
Foot Angle
.193
.118
.118
.022
.037
4.90
3.00
3.00
0.55
0.95
4.67
2.90
2.90
0.40
0.90
L
F
φ
0
6
0
6
c
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
.004
.010
.006
.012
.008
.016
0.10
0.25
0.15
0.30
0.20
0.40
B
α
β
7
7
7
7
*Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
Drawing No. C04-111
DS21189E-page 18
2002 Microchip Technology Inc.
24AA64/24LC64
Systems Information and Upgrade Hot Line
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
013001
ConnectingtotheMicrochipInternetWebSite
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP ser-
vice to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
2002 Microchip Technology Inc.
DS21189E-page 19
24AA64/24LC64
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
To:
Technical Publications Manager
Reader Response
Total Pages Sent
RE:
From:
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
Literature Number:
DS21189E
Device:
24AA64/24LC64
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
DS21189E-page 20
2002 Microchip Technology Inc.
24AA64/24LC64
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Examples:
Temperature Package
Range
a) 24AA64-I/P: Industrial Temperature,
PDIP package
b) 24AA64-I/SN: Industrial Temperature,
SOIC package
Device:
24AA64:
1.8V, 64 Kbit I2C Serial EEPROM
24AA64T: 1.8V, 64 Kbit I2C Serial EEPROM
(Tape and Reel)
c)
24AA64-I/SM: Industrial Temperature,
SOIC (208 mil) package
24AA64X
1.8V, 64 Kbit I2C Serial EEPROM in
alternate pinout (ST only)
d)
24AA64X-I/ST: Industrial Temperature,
Rotated TSSOP package
24AA64XT 1.8V, 64 Kbit I2C Serial EEPROM in
alternate pinout (ST only)
24LC64:
2.5V, 64 Kbit I2C Serial EEPROM
a) 24LC64-I/P: Industrial Temperature,
PDIP package
b) 24LC64-E/SN: Extended Temperature,
24LC64T: 2.5V, 64 Kbit I2C Serial EEPROM
(Tape and Reel)
24LC64X
2.5V, 64 Kbit I2C Serial EEPROM in
alternate pinout (ST only)
SOIC package
24LC64-E/SM: Extended Temperature,
SOIC (208 mil) package
24LC64X-I/ST : Extended Temperature,
Rotated TSSOP package
c)
d)
24LC64XT 2.5V, 64 Kbit I2C Serial EEPROM in
alternate pinout (ST only)
Temperature
Range:
I
E
=
=
-40°C to +85°C
-40°C to +125°C
Package:
P
=
=
=
=
=
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
Plastic SOIC (208 mil body), 8-lead
Plastic TSSOP (4.4 mm), 8-lead
SN
SM
ST
MS
Plastic Micro Small Outline (MSOP), 8-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 Microchip Technology Inc.
DS21189E-page21
24AA64/24LC64
NOTES:
DS21189E-page 22
2002 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, MPLAB, PIC, PICmicro, PICMASTER, PICSTART,
PRO MATE, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microID,
microPort, Migratable Memory, MPASM, MPLIB, MPLINK,
MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A.
Serialized Quick Term Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21189E - page 23
M
WORLDWIDE SALES AND SERVICE
Japan
AMERICAS
ASIA/PACIFIC
Microchip Technology Japan K.K.
Benex S-1 6F
Corporate Office
Australia
2355 West Chandler Blvd.
Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Korea
Rocky Mountain
China - Beijing
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-7456
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
Atlanta
Tel: 82-2-554-7200 Fax: 82-2-558-5934
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
Tel: 770-640-0034 Fax: 770-640-0307
China - Chengdu
Boston
#07-02 Prime Centre
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
Singapore, 188980
Tel: 65-334-8870 Fax: 65-334-8850
Taiwan
Ming Xing Financial Tower
Chicago
Microchip Technology Taiwan
11F-3, No. 207
No. 88 TIDU Street
333 Pierce Road, Suite 180
Itasca, IL 60143
Chengdu 610016, China
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 86-28-6766200 Fax: 86-28-6766599
Tel: 630-285-0071 Fax: 630-285-0075
China - Fuzhou
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Dallas
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
4570 Westgrove Drive, Suite 160
Addison, TX 75001
EUROPE
Tel: 972-818-7423 Fax: 972-818-2924
No. 71 Wusi Road
Detroit
Denmark
Fuzhou 350001, China
Tri-Atria Office Building
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Tel: 86-591-7503506 Fax: 86-591-7503521
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
Kokomo
Room 701, Bldg. B
France
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
Far East International Plaza
No. 317 Xian Xia Road
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Batiment A - ler Etage
18201 Von Karman, Suite 1090
Irvine, CA 92612
China - Shenzhen
91300 Massy, France
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Tel: 949-263-1888 Fax: 949-263-1338
Germany
New York
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Shenzhen 518001, China
Tel: 631-273-5305 Fax: 631-273-5335
Tel: 86-755-2350361 Fax: 86-755-2366086
San Jose
Hong Kong
Italy
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Tel: 408-436-7950 Fax: 408-436-7955
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
Toronto
Milan, Italy
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
India
Tel: 39-039-65791-1 Fax: 39-039-6899883
Microchip Technology Inc.
India Liaison Office
United Kingdom
Arizona Microchip Technology Ltd.
505 Eskdale Road
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
01/18/02
*DS21189E*
DS21189E-page 24
2002 Microchip Technology Inc.
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