1200P [ETC]
InGenius High-CMRR Balanced Input Line Receiver; InGenius高CMRR平衡输入线路接收器型号: | 1200P |
厂家: | ETC |
描述: | InGenius High-CMRR Balanced Input Line Receiver |
文件: | 总10页 (文件大小:158K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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InGenius High-CMRR
Balanced Input Line Receiver
T H A T C o r p o r a t i o n
THAT 1200, 1203, 1206
FEATURES
APPLICATIONS
·
High common-mode rejection
(typical 90 dB at 60 Hz) maintained
under real-world conditions
·
·
·
Balanced input stages
Summing amplifiers
Transformer front-end
replacements
·
·
Excellent solution for hum and
groundloop suppression
·
ADC front-ends
Transformer-like noise rejection in
an 8-pin IC, at fraction of
transformer cost and size
Description
The THAT 1200 series of InGenius balanced
Developed by Bill Whitlock of Jensen Trans-
formers, the patented InGenius input stage uses a
unique bootstrap circuit to raise its common-
mode input impedance into the megohm range,
but without the noise penalty that comes from
high-valued resistors. InGenius line receivers
maintain their high CMRR over a wide range of
source impedance imbalances — even when fed
from single-ended sources.
line receivers are designed to overcome a serious
limitation of conventional balanced input stages
— notoriously poor common mode rejection in
real world applications. While conventional input
stages may exhibit good rejection characteristics
in the lab and on paper, they perform poorly
when fed from even slightly unbalanced source
impedances — a common situation in almost any
pro sound environment.
Pin Name
Ref
DIP Pin
SO Pin
1
2
3
4
5
6
7
8
3
4
OA1
In-
R1
R2
IN-
IN+
+1
Vcc
Vee
In+
5
Rc
Rd
Ra
Rb
Vee
6
OA4
+1
OA3
CM In
Vout
Vcc
11
12
13
14
-
Vout
+
OA2
+1
R3
R4
R5
CM Out
REF
Table 1. 1200-series pin assignments
Gain
0 dB
Plastic DIP
1200P
Plastic SO
1200S
CM IN
CM OUT
-3 dB
-6 dB
1203P
1203S
Cb
1206P
1206S
Figure 1. THAT1200-series equivalent circuit diagram
Table 2. Ordering information
Protected under U.S. Patent No. 5,568,561 and other patents pending.
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InGenius is a trademark of THAT Corporation.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A
Page 2
InGenius Balanced Line Receiver
Preliminary Information
SPECIFICATIONS1
Absolute Maximum Ratings (TA = 25°C)
Positive Supply Voltage (VCC
Negative Supply Voltage (VEE
Positive Input Voltage (VIN+
Negative Input Voltage (VIN-
Output Short-Circuit Duration (tSH
)
+18 V
-18 V
Power Dissipation (PD) (TA = 75°C)
Operating Temperature Range (TOP
TBD mW
0 to +70°C
-40 to +125°C
150°C
)
)
)
+18 V
Storage Temperature Range (TST
Junction Temperature (TJ)
)
)
-18 V
)
Continuous
Lead Temperature (Soldering 60 seconds)
TBD °C
Recommended Operating Conditions
Parameter
Symbol
VCC
Conditions
Min
+3
Typ
Max
+18
Units
V
Positive Supply Voltage
Negative Supply Voltage
VEE
-3
-18
V
Electrical Characteristics2
Parameter
Symbol
ICC
IB
Conditions
No signal
Min
Typ
4.7
Max
8.0
Units
mA
Supply Current
—
—
Input Bias Current
No signal; Either input
connected to GND
700
1,400
nA
Input Offset Current
Input Offset Voltage
Input Voltage Range
IB-OFF
VOFF
No signal
No signal
—
—
140
10
nA
mV
V
—
—
VIN-CM
VIN-DIFF
Common mode
Differential (equal and opposite swing)
THAT 1200
12.5
13.0
—
21.0
24.0
24.0
21.5
24.5
24.5
—
—
—
dBu
dBu
dBu
THAT 1203
THAT 1206
Input Impedance
ZIN-DIFF
ZIN-CM
Differential
Common mode
60 Hz
48.0
with bootstrap
10.0
kW
MW
MW
20 kHz
3.2
no bootstrap
36.0
60 Hz
kW
kW
20 kHz
36.0
1. All specifications are subject to change without notice.
2. Unless otherwise noted, TA=25°C, VCC = +15V, VEE = -15V
3. 0 dBu = 0.775Vrms.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A
Preliminary Information
Page 3
Electrical Characteristics (Cont’d)
Parameter
Symbol
CMR1
Conditions
Min
Typ
Max
Units
Common Mode Rejection
Matched source impedances; VCM = 10V
DC
70
70
—
90
90
85
—
—
—
dB
dB
dB
60 Hz
20 kHz
Common Mode Rejection
Power Supply Rejection5
CMR2
PSR
600W unmatched source impedances4; VCM
= 10V
60 Hz
—
—
70
65
—
—
dB
dB
20 kHz
At 60 Hz, with VCC = -VEE
THAT1200
—
—
—
82
80
80
—
—
—
dB
dB
dB
THAT1203
THAT1206
Power Supply Rejection6
Total Harmonic Distortion
PSRCM
THD
At CM output, at 60 Hz
—
—
63
—
—
dB
%
VIN-DIFF = 10 dBV; BW = 20 kHz; f = 1 kHz
RL =2 kW
0.0005
Output Noise
en(OUT)
BW = 20 kHz
THAT1200
THAT1203
THAT1206
—
—
—
-106
-105
-107
—
—
—
dBu
dBu
dBu
Output Noise
Slew Rate
Slew Rate
enCM(OUT)
SR
At CM output
—
7*
-106
12
—
—
—
dBu
V/µs
V/µs
RL = 10 kW; CL = 300 pF
SRCM
With CM input signal
12.5*
21
R
Lcm = 10 kW; CLcm = 50 pF
Small Signal Bandwidth
BW-3dB
RL = 10 kW; CL = 10 pF
THAT1200
—
—
—
22
27
34
—
—
—
MHz
MHz
MHz
THAT1203
THAT1206
RL = 2 kW; CL = 300 pF
THAT1200
—
—
—
17
18
20
—
—
—
MHz
MHz
MHz
THAT1203
THAT1206
Small Signal Bandwidth
BWCM-3dB
At CM output; RLcm = 10 kW
C
C
Lcm = 10 pF
Lcm = 50 pF
—
—
20
18
—
—
MHz
MHz
Output Gain Error
GER(OUT)
VO
f = 1 kHz; RL = 2 kW
—
0
0.05
dB
Output Voltage Swing
At max differential input
THAT1200
21
21
18
21.5
21.5
18.5
—
—
—
dBu
dBu
dBu
THAT1203
THAT1206
4. See test circuit in Figure 2.
5. Defined with respect to the differential gain.
6. Defined with respect to the common mode gain between any input and common mode output.
* Guaranteed by design
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 4
InGenius Balanced Line Receiver
Preliminary Information
Electrical Characteristics (Cont’d)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Output Short Circuit Current
Minimum Resistive Load
Maximum Capacitive Load
ISC
ICMSC
RL = RLcm = 0 W
At CM output
—
—
25
10
—
—
mA
mA
RLmin
2
—
—
—
—
kW
kW
RLCMmin
At CM output
At CM output
10
CLmax
CLCMmax
—
—
—
—
300
50
pF
pF
Cb
100u
CM Out
Gnd
R5
100R
C1
56p
In-
R3
600R
Vcc
C4
In+
8
2
In-
CMout
7
100n
Main Out
Gnd
R6
100R
Vcc
Ref
5
3
Out
CMin
6
Vee
R2
200k
R1
R4
2k
1
In+
200k
4
U1
THAT120x
C3
C2
300p
100n
Vee
Ext. DC Source
Gnd
Figure 2. THAT1200-series test circuit
Applications
RFI Protection
the low end of the audio spectrum. Its voltage rating
is dependent on the topology of the surrounding cir-
cuitry, as described in the following paragraphs.
Figure 3 shows the THAT 1200 configured with
robust RFI input protection. In applications where
RFI rejection is of less concern, the circuit shown Fig-
ure 4 provides a less aggressive approach.
AC signals presented to the input stage cause the
two ends of capacitor Cb to swing in tandem so that
virtually no voltage appears across the capacitor.
Consequently, capacitors with small DC working volt-
ages may be used when the previous stage is AC cou-
pled to the input of the THAT 1200.
Bootstrap coupling capacitor
Referring to Figure 3, electrolytic capacitor Cb
provides the feedback path for the boostrap circuit.
The capacitor value is chosen to be high enough to
present a sufficiently small impedance to signals at
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A
Preliminary Information
Page 5
C
b
220uF
Vcc
J1
XLR-F
+
D1
12V
2
1
(see text)
3
Vcc
D4
D3
R1
3 1
5 42
2
5
3
8
IN-
7
U1
100R
CM
C2
OUT
470pF
VCC
OUT
R3
6
CM
IN
OUT
4k7
VEE
4
C3
470pF
C4
REF
1
100pF
R2
IN+
100R
D6
D5
Vee
D2
12V
Vee
optional RFI protection
Figure 3. THAT1200P typical application circuit
If, however, there is the possibility of a DC voltage
appearing across the inputs of the line receiver, a
portion of that voltage will appear directly across the
terminals of capacitor Cb. In that case, choose the
capacitor’s voltage rating so that it is capable of han-
dling the expected level of DC voltage. If the polarity
of the DC voltage is unknown, or may swing to either
polarity, the use of a non-polarized electolytic is
highly recommended.
C
b
Vcc
+
J1
XLR-F
D1
12V
2
1
3
Vcc
220uF
D4
D3
3
8
1
5 4 2
2
IN-
7
U1
CM
OUT
OUT
VCC
VEE
6
5
3
CM
IN
100pF NPO
100pF NPO
C1
C2
OUT
REF
IN+
4
1
D5
D6
D2
12V
Vee
Vee
Figure 4. THAT1200P showing simplified RFI protection scheme
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 6
InGenius Balanced Line Receiver
Preliminary Information
THAT1206
Vcc
THAT1206
Vcc
Vee
or THAT1246
Ref
THAT1246
Ref
+
Gnd
In-
CM Out
Cb
+
N/C
Vcc
CM out or N/C
Cb
Gnd
In-
In+
Vcc
Vout
In-
In-
In+
Vee
Vcc
Vout
Connect
for
In+
Vee
Connect
for
THAT1246
In+
Vee
Vout
THAT1246
CM in
Sense
CM in or Sense
Vee
Figure 6. Dual PCB layout for THAT 1206 and THAT 1246
Surface mount versions
Figure 5. Dual PCB layout for THAT 1206 and THAT 1246
DIP version
tionally, proper ESD handling precautions must be
observed until the IC is properly affixed to the PCB.
Dual Layout Option
The THAT 1246 is
a conventional balanced
line-receiver that is pin-for-pin compatible with the
Analog Devices SSM2143 and Burr-Brown INA137.
Though the THAT 1200 series is not pin-compatible
with the THAT 1246, the PCB layouts shown in Fig-
ures 5 and 6 provide manufacturers with the option
to stuff a PCB with any of these input stages. Note
that these figures are not to scale. The interconnects
should be as short as practicable constrained only by
component size and relevant manufacturing consid-
erations.
Vcc
R
IN+
R'
Vee
CM IN
Vcc
R'
R
IN-
When a THAT 1200 series IC is installed, capaci-
tor Cb is connected between CM In and CM Out.
When the THAT 1246 (or SSM2143 or INA137) is
used, capacitor Cb is removed, and a jumper con-
nects the Vout and Sense pins.
Vee
Figure 7. Internal input protection circuitry (see text)
Part No.
R
R’
Input Protection
Figure 7 shows the internal overvoltage protection
circuitry at the IN+, IN-, and CM IN pins. The values
of R and R’ vary with actual part number as shown in
Table 3.
THAT 1200
THAT 1203
THAT 1206
500W
7kW
7kW
23.5kW
17kW
17kW
Table 3. Input resistance values
While the internal protection circuitry shown is
adequate to keep the combination of signal and com-
mon mode voltages from driving the internal inputs
beyond the power supply rails, the circuitry does not
provide adequate protection against most ESD inci-
dents. Since these ICs will very often connect directly
to the outside world, it is mandatory that additional,
external protection from ESD be provided. Any un-
protected InGenius input will fail when subjected to
ESD if this protection circuitry is omitted. Addi-
Diodes D1-D6 in figures 3 and 4 show our recom-
mended approach to protecting the 1200 series from
ESD damage. This arrangement of 1N4148s and
12V Zener diodes permits the maximum allowable
input signal to reach the IC's input pins, but directs
high-energy ESD impulses to the rails. So long as the
supply rails are adequately decoupled, most ESD
events will be diminished to harmless levels.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A
Preliminary Information
Page 7
Theory of Operation
Conventional high-CMRR balanced input stages
cancel common-mode interference using a differential
amplifier with matched (trimmed) resistance ele-
ments (Figure 8). When driven from a true voltage
source, these conventional stages offer extremely high
CMRR (>80dB). However, when driven from real-
world sources, the CMRR of these stages degrades
rapidly for even small source impedance imbalances.
+Vin
-Vin
Ri1
Ri2
+
Vout
-
The reason why this occurs is easily shown. Fig-
ure 9 shows that a voltage divider is formed between
the impedance of the external signal source and the
input impedance of the differential amplifier. For
perfectly balanced source impedances (Rs1 = Rs2),
Figure 8. Basic differential amplifier
and
perfectly
balanced
input
impedances
(Ri1 = Ri2), the voltage dividers formed at each node
Rs2
Rs1
Ri1
(
and
) will be equal to each other,
+Vin
-Vin
Ri1
Ri2
Ri1+ Rs1
Ri2+ Rs2
so the conventional input stage will maintain high
CMRR.
+
Rs1¹Rs2
Vout
-
However, if the source impedances are not pre-
cisely equal, the voltage divider action will result in
unequal signals at the plus and minus inputs of the
input stage. In this case, no amount of CMRR is suf-
ficient to reject the differential voltage that is gener-
ated by the impedance mismatch.
Rs2
Figure 9. Basic differential amplifier showing
mismatched source impedances
To illustrate, consider Figure 10. A common
mode input signal is shown as Vcm. It couples to the
positive and negative input of the balanced line re-
ceiver via Rs1 and Rs2, repectively. Typically, con-
ventional balanced line receivers have common-mode
input impedances of approximately 10 kW. In such
cases, a source impedance imbalance of only 10 W
can degrade CMRR to about 65 dB. A 10 W mis-
match may be easily caused by tolerances in coupling
capacitors or output resistors, and variations in con-
tact and wire resistance. The situation becomes even
worse when a conventional balanced line receiver is
driven from an unbalanced source.
Rs1
+Vin
-Vin
Ri1
Ri2
+
Rs1¹Rs2
Vout
-
Vcm
Rs2
Figure 10. Basic differential amplifier driven
by common-mode input signal
The best solution to this problem is to increase
the line receiver’s common-mode input impedance
enough to minimize the imbalanced voltage divider
effect, preferably on the order of several megohms.
However, with a conventional differential amplifier,
this requires the use of high resistances in the cir-
cuit. High resistance carries with it a high noise pen-
An alternative approach is to use the classic in-
strumentation amplifier configuration shown in Fig-
ure 11. In this circuit, the common-mode input
impedance is the parallel combination of Ri1 and
Ri2. Unfortunately for this approach, to achieve
multi-megohm input impedances, the input devices
used in the input amplifiers must have extremely low
alty,
making
this
straightforward
approach
impractical for quality audio devices.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 8
InGenius Balanced Line Receiver
Preliminary Information
bias currents since their input bias flows through Ri1
and Ri2. Because of the difficulty of maintaining low
noise with low input bias currents, FET op amps
may be employed, but they impose their own limita-
tions, as described further on.
+
In
+
OA1
Ri1
-
+
OA3
-
Out
The THAT 1200 series of balanced line receivers
overcomes this problem by way of an AC bootstrap
technique, shown in simplified form in Figure 12. By
driving the lower end of R2 to nearly the same AC
voltage as the upper end, AC current flow through R2
is greatly reduced, effectively increasing its value. At
DC, of course, the input impedance Z is simply R1 +
R2. If gain G is unity, for frequencies within the
passband of the high-pass filter formed by Cb and
R1, the effective value of the input impedance is in-
creased to infinity at sufficiently high frequencies.
-
+
OA2
-
In
Ri2
Figure 11. Instrumentation amplifier
Input impedance Z, at frequency f, is described
the following equation:
Z
R2
f
2
C
b
1+ ( fn
)
Zi = (R1 + R2)
f
2
1+ (1- G)2( fD
)
R1
G = 1
where
1
1
fN =
,
fD =
2p(RR11+´RR22)C
2pR1C
Figure 12. InGenius bootstrap topology
The effectiveness of this topology is limited by the
For example, if R1 and R2 are 10 kW each, ZDC is
20 kW. This resistance provides a DC path for am-
plifier bias current as well as leakage current that
might flow from a signal source. At higher frequen-
cies, the bootstrap greatly increases the input imped-
unity gain precision of OA4 and the input imped-
ances of OA1 and OA2, all of which are optimized in
THAT’s integrated circuit process. Note that OA1
and OA2 isolate OA3 from external source imped-
ances. Therefore, the performance of the differential
amplifier OA3 and its associated components are not
affected by imbalances in the source impedances.
ance, limited ultimately by how close gain
G
approaches unity. With the THAT 1200 input stages,
common-mode input impedances of several meg-
ohms across much of the audio spectrum can be ex-
pected.
Alternatives
In the following section we will compare other so-
lutions for minimizing CMRR degradation in the
presence of source impedance mismatch, and con-
trast them with THAT’s InGenius topology.
Figure 1 shows a complete equivalent circuit for
the THAT 1200-series ICs.
OA1 and OA2 are
high-impedance buffers feeding differential amplifier
OA3 in an instrumentation amplifier configuration.
The common mode signal is extracted at the junction
of Rc and Rd, buffered by OA4, and fed back to both
inputs via capacitor Cb and resistors Ra and Rb.
The junction of Ra, Rb and R5 is driven to the same
potential as the common-mode input voltage. Hence
no common-mode current flows in resistors Ra and
Rb. Since, ideally, no current flows, the input imped-
ance to common mode signals is infinite.
Precision 4-resistor op amp stage
This stage (Figure 8) was discussed earlier. To
summarize, this solution offers high common-mode
rejection only when the source impedances are per-
fectly balanced, or a tiny fraction of the common-
mode input impedance. Because differential- and
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
600033 Rev 0A
Preliminary Information
Page 9
common-mode input impedances are inextricably
linked, and of similar magnitude, it is not possible to
increase common-mode input impedance without
compromising noise performance.
Second, this design requires at least two IC pack-
ages — a dual FET op amp and the precision input
stage.
Third, while the large-value input resistances are
shunted when there is a source connected to the
input, there is no guarantee that long cables will al-
ways be properly terminated. With an unterminated
cable plugged into the associated XLR jack, Ri1 and
Ri2 are no longer shunted and become not only large
noise sources themselves, but will do little to reduce
pickup on the cable.
3-op amp instrumentation amplifier
This topology, shown in Figure 11, was also dis-
cussed earlier. It relies on input buffers OA1 and
OA2 to raise the common-mode and differential-
mode input impedances. The following diff amp,
OA3 (which can be of the precision 4-resistor op amp
type), is then used to reject the common-mode signal
while extracting the differential signal.
The THAT 1200-series input stages avoid these
problems altogether. They exhibit high common-
mode input impedance as a result of their boot-
strapped topology, while maintaining reasonable dif-
ferential input resistances that can be left unshunted
with no fear of stray pickup or excessive noise contri-
bution.
This approach will require reasonably low values
for Ri1 and Ri2 (< 100 kW or so) unless the OA1 and
OA2 use FETs at their inputs. This would limit the
common-mode input impedance to a few hundred
kilohms.
Transformers
When true electrical isolation is required, a trans-
former may be the only solution. Transformers suit-
able for pro audio, however, tend to be costly and
take up valuable board real estate. In addition, some
transformers can color the sound in ways that elec-
tronic solutions do not.
If FET-input devices are used for OA1 and OA2,
Ri1 and Ri2 can be made quite large — on the order
of 10 megohms. Unlike the resistors in the conven-
tional diff amp stage, these resistors will be shunted
by the driving source impedance, and so contribute
negligible noise.
Fortunately, it is usually not the case that galvanic
isolation is required, and in most cases it is the
common-mode signal rejection properties of a trans-
former that is sought after. By providing the high
common-mode input impedance of a transformer
with the size and cost of an 8-pin integrated circuit,
the THAT 1200-series provides designers with an al-
ternative that provides excellent interference rejection
in real-world applications.
At first glance, this might seem to be an excellent
solution. However, there are disadvantages to this
approach. First, the designer must select a FET-
input op amp that is low-noise and that exhibits no
phase inversion (sign reversal) with large differential-
and common-mode signal swings. This, of course,
results in a cost penalty that is somewhat exacer-
bated by the price premium for high-value resistors.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 10
InGenius Balanced Line Receiver
Preliminary Information
Package Information
The THAT 1200 series is available in both 8-pin
mini-DIP and 16-pin SOIC packages. The package
dimensions are shown in Figures 13 and 14, while
pinouts are given in Table 1.
E
F
C
J
B
F
1
B
C
G
A
H
1
K
D
G
H
A
J
D
E
ITEM
MILLIMETERS
9.52 0.10
6.35 0.10
7.49/8.13
0.46
INCHES
A
B
C
D
E
F
G
H
J
K
0.375 0.004
0.250 0.004
0.295/0.320
0.018
INCHES
ITEM MILLIMETERS
0.398/O.406
0.291/0.299
0.398/0.414
0.014/0.018
0.050
0.096/0.104
0.009/0.013
0.020/0.040
0.004/0.012
A
B
C
D
E
F
G
H
J
10.11/10.31
7.40/7.60
10.11/10.51
0.36/0.46
1.27
2.44/2.64
0.23/0.32
0.51/1.01
0.10/0.30
2.54
0.100
0.145/0.170
0.010
0.125 0.004
0.320/0.370
0.130 0.004
3.68/4.32
0.25
3.18 0.10
8.13/9.40
3.30 0.10
Figure 13. -P (DIP) version package outline drawing
Figure 14. -S (SO) version package outline drawing
Information furnished by THAT Corporation is believed to be accurate and reliable. However no responsibil-
ity is assumed by THAT Corporation for its use nor for any infringements of patents or other rights of third par-
ties which may result from its use.
LIFE SUPPORT POLICY
THAT Corporation products are not designed for use in life support equipment where malfunction of such
products can reasonably be expected to result in personal injury or death. The buyer uses or sells such prod-
ucts for life suport application at the buyer’s own risk and agrees to hold harmless THAT Corporation from all
damages, claims, suits or expense resulting from such use.
CAUTION: THIS IS AN ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE.
It can be damaged by the currents generated by electrostatic discharge. Static charge and therefore danger-
ous voltages can accumulate and discharge without detection causing a loss of function or performance to occur.
The transistors in this device are unprotected in order to maximize performance and flexibility. They are
more sensitive to ESD damage than many other ICs which include protection devices at their inputs.
Use ESD preventative measures when storing and handling this device. Unused devices should be stored in
conductive packaging. Packaging should be discharged before the devices are removed. ESD damage can occur
to these devices even after they are installed in a board-level assembly. Circuits should include specific and ap-
propriate ESD protection.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
相关型号:
1201
Appliance inlet for low voltage, Snap-in Mounting, Front Side, Solder or Quick-connect Terminal
SCHURTER
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