11825-818 [ETC]

Three-PLL Clock Generator IC; 三-PLL时钟发生器IC
11825-818
型号: 11825-818
厂家: ETC    ETC
描述:

Three-PLL Clock Generator IC
三-PLL时钟发生器IC

晶体 时钟发生器 外围集成电路 光电二极管
文件: 总7页 (文件大小:61K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
FS6322-05  
AMERICAN MICROSYSTEMS, INC.  
Three-PLL Clock Generator IC  
July 2000  
1.0 Features  
2.0 Description  
The FS6322 is a ROM-based CMOS clock generator IC  
designed to minimize cost and component count in a va-  
riety of electronic systems.  
Three PLLs with deep reference, feedback, and post  
dividers to provide precision clock frequencies  
Multiple outputs provide several clocking options  
Outputs may be tristated for board testing  
Three low-jitter phase-locked loops (PLLs) drive up to five  
low-skew clock outputs to provide a high degree of flexi-  
bility. The device is packaged in a 16-pin SOIC to mini-  
mize board space.  
S0, S1, and S2 inputs modify output frequencies for  
design flexibility  
3.3V operation  
High-resolution divider capability permits generation of  
desired frequencies.  
Accepts 5 to 30MHz crystals (see Frequency Table  
for specific reference frequencies required)  
Custom frequency patterns, pinouts, and packages  
are available. Contact your local AMI Sales Repre-  
sentative for more information.  
Figure 1: Pin Configuration  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CLK_C  
VDD  
OE  
S2  
VSS  
VDD  
S1  
XOUT/REFIN  
XIN  
S0  
CLK_E  
CLK_D  
CLK_F  
VSS  
CLK_A  
CLK_B  
16-pin (0.150”) SOIC  
Figure 2: Block Diagram  
OE  
XIN  
Crystal  
CLK_A  
CLK_B  
CLK_C  
CLK_D  
CLK_E  
CLK_F  
Oscillator  
XOUT  
PLL A  
PLL B  
PLL C  
Clock  
Logic  
Device  
Control  
S2:S0  
FS6322-05  
7.11.00  
ISO9001  
FS6322-05  
Three-PLL Clock Generator IC  
July 2000  
Table 1: Pin Descriptions  
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,  
DO = Digital Output; P = Power/Ground; # = Active Low pin  
PIN  
TYPE  
NAME  
DESCRIPTION  
1
2
DO  
P
CLK_C  
VDD  
C clock output  
Power supply (3.3V nominal – see version specific information)  
3
P
VSS  
Ground  
4
AI  
XOUT / REFIN  
XIN  
Crystal oscillator drive / external reference input  
5
AO  
DO  
DO  
DO  
DO  
DO  
P
DIU  
DIU  
P
Crystal oscillator feedback  
6
CLK_E  
CLK_D  
CLK_F  
CLK_B  
CLK_A  
VSS  
E clock output  
7
D clock output  
8
F clock output  
9
A clock output  
10  
11  
12  
13  
14  
15  
16  
B clock output  
Ground  
S0  
Frequency select control input  
S1  
Frequency select control input  
VDD  
Power supply (5V to 3.3V)  
DIU  
DIU  
S2  
Frequency select control input  
OE  
Output enable input: logic-high enables outputs; logic-low tristates outputs (high impedance)  
Table 2: Frequency Table – FS6322-05 (3.3volt)  
(all frequencies in MHz)  
CLK_A  
(pin 10)  
CLK_B  
(pin 9)  
CLK_C  
(pin 1)  
CLK_D  
(pin 7)  
CLK_E  
(pin 6)  
CLK_F  
(pin 8)  
S2  
S1  
S0  
FREF  
16.0000  
11.0592  
13.5000  
13.5000  
13.5000  
13.5000  
13.5000  
13.5000  
25.00000  
24.57600  
36.86400  
33.86880  
33.86880  
33.86880  
33.86880  
33.86880  
10.00000  
11.28960  
18.43200  
16.93440  
73.72800  
67.73760  
49.15200  
36.86400  
1.84320  
1.84320  
0.00000  
33.33336  
27.00000  
27.00000  
27.00000  
27.00000  
27.00000  
27.00000  
0.00000  
25.00002  
33.86880  
33.86880  
27.00000  
27.00000  
27.00000  
27.00000  
0.00000  
20.00002  
54.00000  
54.00000  
54.00000  
54.00000  
54.00000  
54.00000  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16.93440  
16.93440  
49.15200  
45.15840  
32.76800  
24.57600  
2
7.11.00  
FS6322-05  
AMERICAN MICROSYSTEMS, INC.  
Three-PLL Clock Generator IC  
July 2000  
3.0 Electrical Specifications  
Table 3: Absolute Maximum Ratings  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at  
these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance,  
functionality, and reliability.  
PARAMETER  
Supply Voltage, dc (VSS = ground)  
SYMBOL  
MIN.  
MAX.  
UNITS  
VDD  
VI  
VSS-0.5  
VSS-0.5  
VSS-0.5  
-50  
7
VDD+0.5  
VDD+0.5  
50  
V
V
Input Voltage, dc  
Output Voltage, dc  
VO  
IIK  
V
Input Clamp Current, dc (VI < 0 or VI > VDD  
)
mA  
mA  
°C  
°C  
°C  
°C  
kV  
Output Clamp Current, dc (VI < 0 or VI > VDD  
)
IOK  
TS  
TA  
TJ  
-50  
50  
Storage Temperature Range (non-condensing)  
Ambient Temperature Range, Under Bias  
Junction Temperature  
-65  
150  
-55  
125  
150  
Lead Temperature (soldering, 10s)  
260  
Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)  
2
CAUTION: ELECTROSTATIC SENSITIVE DEVICE  
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy elec-  
trostatic discharge.  
Table 4: Operating Conditions  
PARAMETER  
SYMBOL  
CONDITIONS/DESCRIPTION  
3.3V ± 10%  
MIN.  
TYP.  
MAX.  
UNITS  
Supply Voltage  
VDD  
3
3.3  
3.6  
V
Ambient Operating Temperature Range  
Crystal Resonator Frequency  
Output Load Capacitance  
TA  
fXIN  
CL  
0
5
70  
30  
20  
°C  
MHz  
pF  
3
7.11.00  
FS6322-05  
Three-PLL Clock Generator IC  
July 2000  
Table 5: DC Electrical Specifications  
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization  
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical. Negative currents indicate current flows out of the device.  
PARAMETER  
SYMBOL  
CONDITIONS/DESCRIPTION  
MIN.  
TYP.  
MAX.  
UNITS  
Overall  
Supply Current, Dynamic, with Loaded  
Outputs  
fXTAL = 27MHz; CL = 0pF, VDD = 3.3V  
FS6322-05: S[2:0]=[100]  
IDD  
20  
mA  
Digital Inputs (OE, S2, S0)  
High-Level Input Voltage  
VIH  
VIL  
2.4  
VDD+0.3  
V
V
Low-Level Input Voltage  
VSS-0.3  
-1  
0.8  
1
High-Level Input Current  
Low-Level Input Current (pull-up)  
Digital Inputs (S1)  
IIH  
IIL  
VIN = VDD  
VIN = 0V  
µA  
µA  
-8  
High-Level Input Voltage  
Low-Level Input Voltage  
VIH  
VIL  
2.4  
VDD+0.3  
V
V
VSS-0.3  
-1  
0.8  
1
High-Level Input Current  
Low-Level Input Current (pull-up)  
Crystal Oscillator  
IIH  
IIL  
VIN = VDD  
VIN = 0V  
µA  
µA  
-16  
As seen by a crystal connected to XIN and  
XOUT  
Crystal Loading Capacitance  
CL(xtal)  
16  
pF  
Crystal Drive Level  
200  
uW  
RXTAL=20Ω  
Clock Outputs (CLKA, CLKB)  
Output Current High  
IOH  
IOL  
VO = 2.4V  
-4  
4
mA  
mA  
mA  
mA  
Output Current Low  
VO = 0.4V  
Short Circuit Source Current *  
Short Circuit Sink Current *  
IOSH  
IOSL  
zOH  
zOL  
VO = 0V; shorted for 30s, max.  
VO = 3.3V; shorted for 30s, max.  
VO = 0.5VDD; output driving high  
VO = 0.5VDD; output driving low  
-35  
40  
45  
45  
Output Impedance *  
4
7.11.00  
FS6322-05  
AMERICAN MICROSYSTEMS, INC.  
Three-PLL Clock Generator IC  
July 2000  
Table 6: AC Timing Specifications  
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization  
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical.  
CLOCK  
(MHz)  
PARAMETER  
SYMBOL  
CONDITIONS/DESCRIPTION  
MIN.  
TYP.  
MAX.  
UNITS  
Clock Output (CLK_X)  
Crystal oscillator derived outputs  
Measured @1.4V; CL = 20pF  
Duty Cycle *  
43  
45  
51  
51  
57  
55  
%
%
PLL derived outputs  
Measured @1.4V; CL = 20pF  
Duty Cycle *  
Rise Time *  
Fall Time *  
tr  
tf  
VO = 0.4V to 2.4V; CL = 20pF  
VO = 2.4V to 0.4V; CL = 20pF  
2.2  
1.8  
ns  
ns  
From rising edge to next rising edge at VDD/2, CL =  
20pF  
Jitter, Period (RMS) *  
50  
ps  
ps  
tj(1σ)  
tj(P)  
From rising edge to next rising edge at VDD/2, CL =  
20pF  
Jitter, Period (peak-peak) *  
400  
PLL-derived outputs  
Jitter, Cumulative (RMS)*  
Phase Noise *  
tj(LT)  
100  
-80  
ps  
From 0-500µs at VDD/2, CL = 20pF  
compared to ideal clock source  
PLL derived outputs  
@ 100KHz offset from fundamental  
dbC/Hz  
5
7.11.00  
FS6322-05  
Three-PLL Clock Generator IC  
July 2000  
4.0 Package Information  
Table 7: 16-pin SOIC (0.150") Package Dimensions  
DIMENSIONS  
INCHES MILLIMETERS  
16  
MIN.  
MAX.  
MIN.  
MAX.  
A
A1  
A2  
B
0.061  
0.004  
0.055  
0.013  
0.068  
0.0098  
0.061  
0.019  
1.55  
0.102  
1.40  
1.73  
0.249  
1.55  
E
H
R
AMERICAN MICROSYSTEMS, INC.  
0.33  
0.49  
1
C
D
E
0.0075 0.0098  
0.191  
9.80  
0.249  
9.98  
ALL RADII:  
0.005" TO 0.01"  
0.386  
0.150  
0.393  
0.157  
h x 45°  
7° typ.  
B
e
3.81  
3.99  
e
0.050 BSC  
1.27 BSC  
C
A2  
A
H
h
0.230  
0.010  
0.016  
0°  
0.244  
0.016  
0.035  
8°  
5.84  
0.25  
0.41  
0°  
6.20  
0.41  
0.89  
8°  
D
L
θ
A1  
L
BASE PLANE  
SEATING PLANE  
Θ
Table 8: 16-pin SOIC (0.150") Package Characteristics  
PARAMETER  
SYMBOL  
CONDITIONS/DESCRIPTION  
Air flow = 0 m/s  
TYP.  
UNITS  
Thermal Impedance, Junction to Free-Air  
16-pin 0.150” SOIC  
95  
°C/W  
ΘJA  
Corner lead  
4.0  
3.0  
0.4  
0.5  
Lead Inductance, Self  
L11  
nH  
Center lead  
Lead Inductance, Mutual  
Lead Capacitance, Bulk  
L12  
Any lead to any adjacent lead  
Any lead to VSS  
nH  
pF  
C11  
6
7.11.00  
FS6322-05  
AMERICAN MICROSYSTEMS, INC.  
Three-PLL Clock Generator IC  
July 2000  
5.0 Ordering Information  
OPERATING  
TEMPERATURE RANGE  
SHIPPING  
CONFIGURATION  
ORDERING CODE  
DEVICE NUMBER  
PACKAGE TYPE  
16-pin (0.150”) SOIC  
(Small Outline Package)  
11825-808  
11825-818  
FS6322-05  
FS6322-05  
Tape and Reel  
Tubes  
0°C to 70°C (Commercial)  
0°C to 70°C (Commercial)  
16-pin (0.150”) SOIC  
(Small Outline Package)  
Copyright © 2000 American Microsystems, Inc.  
Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI  
makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom  
of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI re-  
serves the right to discontinue production and change specifications and prices at any time and without notice. AMI’s products are  
intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental require-  
ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recom-  
mended without additional processing by AMI for such applications.  
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796,  
WWW Address: http://www.amis.com E-mail: tgp@amis.com  
7
7.11.00  

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