5962-8866_技术文档

REVISIONS

LTR

DESCRIPTION

DATE (YR-MO-DA)

91-11-26

APPROVED

Ray Monnin

A

B

Changes in accordance with NOR 5962-R076-92.

93-0217

M. A. Frye

Redrawn with changes. Add devices 05 through 09. Add vendor

CAGE number 6Y440 to device types 01 through 04, N package only,

device types 05 through 09 X,Y,T, U and N. Add vendor CAGE

number 04713 to device types 02,03, and 04, X package only. Add

vendor CAGE number 65786 to device types 03 through 06 packages

X, Y, U, N, and M, and to device types 07 and 08, packages Y, U, N,

and M. Add vendor CAGE number 61772 to devices 05 and 06,

packages X, Y, M, N and U. Add vendor CAGE number 0K6N4 to

device types 03 through 08 packages Y,U,N, and M. Remove vendor

CAGE numbers 0BK02 and 0BYV4 from the drawing. Editorial

changes throughout.

95-04-14

07-10-02

M. A. Frye

C

D

Changes in accordance with NOR 5962-R098-95

Boilerplate update, part of 5 year review. ksr

Robert M. Heber

THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

D

1

D

2

D

3

D

4

D

5

D

6

D

7

D

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D

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D

SHEET

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PREPARED BY

Kenneth S. Rice

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

http://www.dscc.dla.mil

CHECKED BY

Ray Monnin

STANDARD

MICROCIRCUIT

DRAWING

APPROVED BY

Michael A. Frye

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

MICROCIRCUIT, MEMORY, DIGITAL,

CMOS, 32K X 8 STATIC RAM (SRAM),

MONOLITHIC SILICON

DRAWING APPROVAL DATE

88-09-27

REVISION LEVEL

D

AMSC N/A

SIZE

A

CAGE CODE

67268

5962-88662

SHEET

1 OF 14

DSCC FORM 2233

APR 97

.

5962-E598-07

1. SCOPE

1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in

accordance with MIL-PRF-38535, appendix A.

1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:

5962-88662

01

X_

A

Drawing number

Device type

(see 1.2.1)

Case outline

(see 1.2.2)

Lead finish

(see 1.2.3)

1.2.1 Device type(s). The device type(s) identify the circuit function as follows:

Device type

Generic number 1/

Circuit function

Access time

01

02

03

04

05

06

07

08

09

32K X 8 CMOS SRAM

100 ns

70 ns

55 ns

45 ns

35 ns

25 ns

20 ns

15 ns

12 ns

1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:

Outline letter

Descriptive designator

Terminals

Package style

X

Y

Z

U

T

N

M

GDIP1-T28 or CDIP2-T28

CQCC1-N32

28

32

28

Dual in-line

Rectangular leadless chip carrier

Flat pack

Rectangular leadless chip carrier

Flat pack

Dual in-line

Flat pack

CDFP3-F28

CQCC3-N28

CDFP4-F28

CDIP3-T28 or GDIP4-T28

GDFP2-F28

1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.

1.3 Absolute maximum ratings.

Supply voltage range (V_CC) ---------------------------------------

Input voltage range -------------------------------------------------

Ambient storage temperature ------------------------------------

Thermal resistance, junction-to-case (Θ_JC) ------------------

Junction temperature (T_J) -----------------------------------------

Power dissipation ---------------------------------------------------

Lead temperature (soldering, 10 seconds)--------------------

-0.5 V dc to +7.0 V dc 2/

-0.5 V dc to +6.0 V dc

-65°C to +150°C

See MIL-STD-1835

+150°C 3/

1.0 W

+260°C

1.4 Recommended operating conditions.

Supply voltage range (V_CC) --------------------------------------

Ground voltage (V_SS) ----------------------------------------------

Input high voltage range (V_IH) -----------------------------------

Input low voltage range (V_IL) -------------------------------------

Operating case temperature (T_C) -------------------------------

4.5 V dc to 5.5 V dc 2/

0 V dc

2.2 V dc to V_CC+0.5 V dc

-0.5 V dc to 0.8 V dc

-55°C to +125°C

1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin and will also be listed in

MIL-HDBK-103.

2/ All voltages referenced to V_SS

.

3/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in

accordance with method 5004 of MIL-STD-883.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

2

DSCC FORM 2234

APR 97

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATION

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-883

-

Test Method Standard Microcircuits.

MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103 - List of Standard Microcircuit Drawings.

MIL-HDBK-780 - Standard Microcircuit Drawings.

(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from

the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of

this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-

38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity

approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make

modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These

modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535

is required to identify when the QML flow option is used.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535, appendix A and herein.

3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.2 Truth table. The truth table shall be as specified on figure 2.

3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.

3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only.

Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the

internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor

testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements

as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

SIZE

STANDARD

MICROCIRCUIT DRAWING

A

5962-88662

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

3

DSCC FORM 2234

APR 97

TABLE I. Electrical performance characteristics.

Conditions

│

Test

│Symbol │ -55°C ≤ T_C≤ +125°C

│ Group A │ Device

│subgroups │ Types

│

Limits

│Unit

│

V_SS= 0 V,

│

4.5 V ≤ V_CC≤ 5.5 V

│

│ Min

│ Max

│

│ unless otherwise specified

│

Input leakage current

│I_LI

│

│V_CC= maximum

│V_IN= GND to V_CC

│ 1,2,3

│ All

│ 10

│μA

│

│I_LO

│

│μA

│

Output leakage

current

│V_CC= maximum

│V_OUT= GND to V_CC

│

│ 1,2,3

│ All

│ 10

│

│ CE ≥ V_IH, WE ≤ V_IL

│

Output low voltage

Output high voltage

│V_OL

│V_CC= 4.5 V, I_OL= 8 mA

│V_IL= 0.8 V, V_IH= 2.2 V

│

│V_CC= 4.5 V, I_OH= -4 mA

│V_IL= 0.8 V, V_IH= 2.2 V

│

│ 1,2,3

│ All

│

│ 0.4

│ V

│

│ V

│

│ mA

│

│V_OH

│ 1,2,3

│ All

│ 2.4

│

Operating supply

current

│I_CC1

│V_CC= 5.5 V, f = f_max1/

│

│ 1,2,3

│ 01,02

│ 105

│

│ CE = V_IL, outputs open

│

│ 03-05

│ 06

│ 07

│ 08

│ 09

│ 01-06

│ 07

│ 08

│ 09

│

│ 150

│ 160

│ 170

│ 180

│ 190

│ 35

│ 40

│ 50

│ 60

│

│ all other inputs at V_IL

│

Standby power supply │I_CC2

│CE ≥ V_IH, outputs open

│ 1,2,3

│ mA

current (TTL)

│

│V_CC= 5.5 V

│

Standby power supply │I_CC3

│CE ≥ (V_CC-0.2 V), f = 0 MHz │ 1,2,3

│ All

│

│ 20

│

│ mA

current (CMOS)

│

│ outputs open, V_CC= 5.5 V

│

│ all other inputs

│

│ ≤ 0.2 V or ≥ (V_CC-0.2 V)

│

Input capacitance

Output capacitance

│C_I2/ │V_I= 5.0 V or GND

4

│ All

│

│ 11

│

│ pF

│

│f = 1 MHz, T_C= +25°C

│See 4.3.1c

│

│ All

│

│ pF

│

│C_O2/ │V_O= 5.0 V or GND

│

│ 11

│

│f = 1 MHz, T_C= +25°C

│See 4.3.1c

See footnotes at end of table.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

4

DSCC FORM 2234

APR 97

TABLE I. Electrical performance characteristics - Continued.

Conditions

│

Test

│Symbol │ -55°C ≤ T_C≤ +125°C

│ Group A │ Device

│subgroups │ Types

│

Limits

│Unit

│

V_SS= 0 V, 3/

│

4.5 V ≤ V_CC≤ 5.5 V

│

│ Min

│ Max

│

│ unless otherwise specified

│

Read cycle time

│t_AVAV

│

│ 9,10,11 │ 01

│100

│

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

│ 70

│

│ 55

│

│ 45

│

│ 35

│

│ 25

│

│ 20

│

│ 15

│

│ 12

│

Address access time

│t_AVQV

│

│ 9,10,11 │ 01

│

│ 100

│

│ ns

│

│ 02

│

│ 70

│

│ 55

│

│ 45

│

│ 35

│

│ 25

│

│ 20

│

│ 15

│

│ 12

│

│ 100

│

│ 70

│

│ 55

│

│ 45

│

│ 35

│

│ 25

│

│ 20

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

Chip-enable access

time

│t_ELQV

│

│ 9,10,11 │ 01

│

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

│ 15

│

│ 12

│

See footnotes at end of table.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

5

DSCC FORM 2234

APR 97

TABLE I. Electrical performance characteristics - Continued.

Conditions

│

Test

│Symbol │ -55°C ≤ T_C≤ +125°C

│ Group A │ Device

│subgroups │ Types

│

Limits

│Unit

│

V_SS= 0 V, 3/

│

4.5 V ≤ V_CC≤ 5.5 V

│

│ Min

│ Max

│

│ unless otherwise specified

│

Output hold from

address change

│t_AVQX

│

│ 9,10,11 │ 01-08

│

3

2

│

│ ns

│

09

│

Output enable to

output valid

│t_OLQV

│ 9,10,11 │ 01

│ 60

│

│ ns

│

5/

│

│ 02,03

│ 35

│

│ 20

│

│ 15

│

│ 10

│

│ 04, 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

8

│

6

│

Chip select to output

in low Z

│t_ELQX

│ 9,10,11 │ 01-08

3

2

│ ns

│

│ 2/ 4/

│

09

│

Chip deselect to

output in high Z 5/

│t_EHQZ

│ 9,10,11 │ 01-03, 05 │

│ 35

│ 20

│ 15

│ 10

│ ns

│

│ 2/ 4/

│

│ 04

│ 06

│ 07,08

│ 09

│

7

│

Output disable to

output in high Z 5/

│t_OHQZ

│ 9,10,11 │ 01-03, 05 │

│ 35

│ 20

│ 15

│ 10

│ ns

│

│ 2/ 4/

│

│ 04

│ 06

│ 07,08

│ 09

│

7

│

Write enable to output │t_WLQZ

│ 9,10,11 │ 01

│ 50

│

│ 35

│ 20

│ 15

│ 10

│ ns

│

in high Z

5/

│ 2/ 4/

│

│ 02,03,05 │

│

│ 04

│ 06

│ 07,08

│ 09

│

7

│

│ 01-04,

│

Output enable to

output in low Z

│t_OLQX

│ 9,10,11 │ 06-09

0

2

│ ns

│

│ 2/ 4/

│

│ 05

│

Data valid to end of

write 5/

│t_DVWH

│ 9,10,11 │ 01-03

│ 35

│ ns

│

│t_DVEH

│

│ 04,05 │ 20

│ 06

│ 07,08

│ 09

│

│ 15

│ 10

│ 8

│

See footnotes at end of table.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

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DSCC FORM 2234

APR 97

TABLE I. Electrical performance characteristics - Continued.

Conditions

│

Test

│Symbol │ -55°C ≤ T_C≤ +125°C

│ Group A │ Device

│subgroups │ Types

│

Limits

│Unit

│

V_SS= 0 V, 3/

│

4.5 V ≤ V_CC≤ 5.5 V

│

│ Min

│ Max

│

│ unless otherwise specified

│

Data hold time

│t_WHDX

│ 9,10,11 │ 01-04

│

│100

│

│ 70

│

│ 55

│

│ 45

│

│ 35

│

│ 25

│

│ 20

│

│ 15

│

│ 12

│

│ 90

│

│ 60

│

│ 50

│

│ 40

│

│ 30

│

3

0

│ ns

│

│t_EHDX

│

│ 05-09

│

│ ns

│

Output active from

end of write

│t_WHQX

│ 9,10,11 │ 01-06

3

0

│ 2/ 4/

│

│ 07-09

│

Write cycle time

│t_AVAV

│ 9,10,11 │ 01

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

Chip select to end

of write

│t_ELWH

│

│ 9,10,11 │ 01

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

│ 20

│

│ 15

│

│ 12

│

│ 10

│

See footnotes at end of table.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

7

DSCC FORM 2234

APR 97

TABLE I. Electrical performance characteristics - Continued.

Conditions

│

Test

│Symbol │ -55°C ≤ T_C≤ +125°C

│ Group A │ Device

│subgroups │ Types

│

Limits

│Unit

│

V_SS= 0 V, 3/

│

4.5 V ≤ V_CC≤ 5.5 V

│

│ Min

│

│ Max

│

│ unless otherwise specified

│

│ 85

│

│ 60

│

│ 50

│

│ 40

│

│ 30

│

│ 20

│

│ 15

│

│ 12

│

│ 10

│

│ 55

│

│ 45

│

│ 40

│

│ 35

│

│ 30

│

Address valid to end

of write

│t_AVWH

│

│ 9,10,11 │ 01

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

Address-setup time

Write pulse width

│t_AVWL

│ 9,10,11 │ All

0

│ ns

│

│t_WLWH

│ 9,10,11 │ 01

│ ns

│

│ 02

│

│ 03

│

│ 04

│

│ 05

│

│ 06

│

│ 07

│

│ 08

│

│ 09

│

│ 20

│

│ 15

│

│ 12

│

│ 10

│

Write recovery time

│t_WHAX

│t_EHAX

│

│ 9,10,11 │ 01-08

│

0

2

│ ns

│

09

│

1/ f_max= 1/t_AVAV(minimum)

2/ This parameter tested initially and after any design or process change which could affect this parameter, and therefore shall

be guaranteed to the limits specified in table I.

3/ For load circuits see figure 3 and for timing waveforms see figure 4.

4/ Transition is measured ±500 mV from steady-state voltage.

5/ This parameter has been tightened for device type 04. Any date code product prior to the date of Revision C of this drawing

may not meet this limit. See Revision B for the electrical parameter value that applies to prior date code product.

SIZE

STANDARD

MICROCIRCUIT DRAWING

A

5962-88662

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

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DSCC FORM 2234

APR 97

Device types

Case outlines

All

X, Z, U, T,

N, and M

Y

Terminal

number

Terminal

symbol

1

2

A₁₄

A₁₂

A₇

NC

A₁₄

A₁₂

A₇

3

4

A₆

5

A₅

6

A₄

7

A₃

8

A₂

9

A₁

10

11

12

13

14

15

16

17

18

19

A₀

I/O₁

I/O₂

I/O₃

GND

I/O₄

I/O₅

I/O₆

I/O₇

I/O₈

NC

I/O₁

I/O₂

I/O₃

GND

NC

I/O₄

I/O₅

I/O₆

I/O₇

I/O₈

20

21

22

CE

A₁₀

OE

A₁₁

A₉

23

24

25

26

CE

A₁₀

A₈

OE

NC

A₁₃

A₁₁

A₉

27

WE

V_CC

---

28

29

30

31

32

A₈

A₁₃

---

WE

V_CC

---

FIGURE 1. Terminal connections.

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I/O

Function

CE

WE

OE

Standby (I

)

H

X

H

L

X

H

L

High Z

CC2

≥ V_CC-0.2 V

Standby (I

CC3

Output disable

Read

L

High Z

Data out

Data in

Write

X

FIGURE 2. Truth tables (unprogrammed).

Output load

(for t_OLQX,t_ELQX,t_OHQZ,

t

_WLQZ,t_EHQZ,t_WHQX)

NOTE: Including scope and jig (minimum values).

AC testing conditions

Input pulse levels

GND to 3.0 V

5 ns

Input rise and fall times

Input timing reference levels

Output reference levels

1.5 V

FIGURE 3. Output load circuit.

SIZE

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DSCC FORM 2234

APR 97

Timing waveform of read cycle no. 1 (1)

Timing waveform of read cycle no. 2 (1, 2, 4)

Timing waveform of read cycle no. 3 (1, 3, 4)

NOTES:

1. WE is high for read cycle.

2. Device is continuously selected. CE = V_IL.

3. Address valid prior to or coincident with CE transition low.

4. OE = V_IL.

5. Transition is measured ±500 mV from steady state with 5 pF load (including scope and jig).

FIGURE 4. Timing waveforms.

SIZE

STANDARD

MICROCIRCUIT DRAWING

A

5962-88662

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

11

DSCC FORM 2234

APR 97

NOTES:

1. WE must be high during all address transitions.

2. A write occurs during the overlap (t_ELWHor t_WLWH) of a low CE and a low WE .

3. t_WHAXis measured from the earlier of CE or WE going high to the end of the write cycle.

4. During this period, the I/O pins are in the output state, and input signals must not be applied.

5. If the CE low transition occurs simultaneously with or after the WE low transition, the outputs remain in the high

impedance state.

6. Transition is measured ±500 mV from steady state with a 5 pF load (including scope and jig).

7. If OE is low during a WE controlled write cycle, the write pulse width must be the larger of t_WLWHor (t_WLQZ

+ t_DVWH) to allow the I/O drivers to turn off and data to be placed on the bus for required t_DVWH. If OE is low during a WE

controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified t_WLWH

.

FIGURE 4. Timing waveforms - Continued.

SIZE

STANDARD

A

5962-88662

MICROCIRCUIT DRAWING

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

12

DSCC FORM 2234

APR 97

TABLE II. Electrical test requirements.

MIL-STD-883 test requirements

1/ 2/ 3/

Subgroups

(per method

5005, table I)

Interim electrical parameters

(method 5004)

---

Final electrical test parameters

(method 5004)

1*, 2, 3, 7*, 8A, 8B,

9, 10,11

Group A test requirements

(method 5005)

1,2,3,4**,7,8A,8B,

9, 10,11

Groups C and D end-point electrical

parameters (method 5005)

2, 3, 7, 8A, 8B

1/ * indicates PDA applies to subgroups 1 and 7.

2/ ** see 4.3.1c.

3/ See 4.3.1d.

3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed

in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN

number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.

3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance

to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in

accordance with MIL-PRF-38535 to identify when the QML flow option is used.

3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to

listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,

appendix A and the requirements herein.

3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided

with each lot of microcircuits delivered to this drawing.

3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.

3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's

facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the

reviewer.

4. VERIFICATION

4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,

appendix A.

4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices

prior to quality conformance inspection. The following additional criteria shall apply:

a. Burn-in test, method 1015 of MIL-STD-883.

(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control

and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs, outputs,

biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883.

SIZE

STANDARD

MICROCIRCUIT DRAWING

A

5962-88662

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

13

DSCC FORM 2234

APR 97

(2) T_A= +125°C, minimum.

b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter

tests prior to burn-in are optional at the discretion of the manufacturer.

4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-

883 including groups A, B, C, and D inspections. The following additional criteria shall apply.

4.3.1 Group A inspection.

a. Tests shall be as specified in table II herein.

b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.

c. Subgroup 4 (C_INand C_OUTmeasurement) shall be measured only for the initial test and after process or design changes

which may affect capacitance. Sample size is fifteen devices with no failures and all input and output terminals tested.

c. Subgroups 7 and 8 tests sufficient to verify the truth table.

4.3.2 Groups C and D inspections.

a. End-point electrical parameters shall be as specified in table II herein.

b. Steady-state life test conditions, method 1005 of MIL-STD-883.

(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level

control and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs,

outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-

STD-883.

(2) T_A= +125°C, minimum.

(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.

5. PACKAGING

5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.

6. NOTES

6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications

(original equipment), design applications, and logistics purposes.

6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-

prepared specification or drawing.

6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for

the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.

6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system

application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be

used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC

5962) should contact DSCC-VA, telephone (614) 692-0544.

6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone

(614) 692-0547.

6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-

103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-

VA.

SIZE

STANDARD

MICROCIRCUIT DRAWING

A

5962-88662

DEFENSE SUPPLY CENTER COLUMBUS

COLUMBUS, OHIO 43218-3990

REVISION LEVEL

D

SHEET

14

DSCC FORM 2234

APR 97

STANDARD MICROCIRCUIT DRAWING BULLETIN

DATE: 07-10-02

Approved sources of supply for SMD 5962-88662 are listed below for immediate acquisition information only and shall

be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised

to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate

of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next

dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of

supply at http://www.dscc.dla.mil/Programs/Smcr/.

Vendor

CAGE

number

Vendor

similar PIN 2/

Standard

microcircuit

drawing PIN 1/

5962-8866201XA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S100DB

P4C1256-100DWMB

MT5C2568CW-100883C

QP7C198-100DMB

6206-100/BXAJC

3/

EDH8832C-10DMHR

5962-8866201YA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S100L32B

P4C1256-100L32MB

MT5C2568ECW-100883C

QP7C198-100LMB

6206-100M/BUAJC

EDH8832C-10DMHR

3/

5962-8866201ZA

5962-8866201UA

3/

IDT71256S100EB

OW62256CZ3-10

3DTT2

0EU86

0C7V7

3/

P4C1256-100L28MB

MT5C2568EC-100883C

QP7C199-100LMB

IDT71256S100L28B

EDI8834C100L28B

3/

5962-8866201TA

5962-8866201NA

3DTT2

0EU86

0C7V7

3/

P4C1256-100FSMB

MT5C2568F-100883C

QP7C199-100FMB

EDI8834C100FB

61772

3DTT2

0EU86

0C7V7

60264

3/

IDT71256S100TDB

P4C1256-100DMB

MT5C2568C-70883C

QP7C199-100DMB

MS132K8C100CN

EDI8834C100QB

5962-8866201NC

5962-8866201MA

3DTT2

P4C1256-100CMB

3DTT2

0C7V7

3/

P4C1256-100FMB

QP7C199-100KMB

IDT71256S100XEB

5962-8866202XA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S70DB

P4C1256-70DWMB

MT5C2568CW-70883C

QP7C198-70DMB

6206-70/BXAJC

3/

EDI8834C70CB

See footnotes at end of table.

Page 1 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866202YA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S70L32B

P4C1256-70L32MB

MT5C2568ECW-70883C

QP7C198-70LMB

6206-70M/BUAJC

EDI8834C70LB

3/

5962-8866202ZA

5962-8866202UA

3/

IDT71256S70EB

OW62256CZ3-70

3DTT2

0EU86

0C7V7

3/

P4C1256-70L28MB

MT5C2568EC-70883C

QP7C199-70LMB

IDT71256S70L28B

EDI8834C70L28B

3/

5962-8866202TA

5962-8866202NA

3DTT2

0EU86

0C7V7

3/

P4C1256-70FSMB

MT5C2568F-70883C

QP7C199-70FMB

EDI8834C70FB

61772

3DTT2

0C7V7

60264

0EU86

3/

IDT71256S70TDB

P4C1256-70DMB

QP7C199-70DMB

MS132K8C70CN

MT5C2568C-70883C

EDI8834C70QB

5962-8866202NC

5962-8866202MA

3DTT2

P4C1256-70CMB

3DTT2

0C7V7

3/

P4C1256-70FMB

QP7C199-70KMB

IDT71256S70XEB

5962-8866203XA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S55DB

P4C1256-55DWMB

MT5C2568CW-55883C

QP7C198-55DMB

6206-55/BXAJC

3/

EDI8834C55CB

3/

L7C199HMB55

5962-8866203YA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S55L32B

P4C1256-55L32MB

MT5C2568ECW-55883C

QP7C198-55LMB

6206-55M/BUAJC

EDI8834C55LB

3/

L7C199TMB55

3/

PDM41256S55L32B

5962-8866203ZA

3/

IDT71256S55EB

OW62256CZ3-55

See footnotes at end of table.

Page 2 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866203UA

3DTT2

0EU86

0C7V7

3/

P4C1256-55L28MB

MT5C2568EC-55883C

QP7C199-55LMB

IDT71256S55L28B

EDI8834C55L28B

IDT71256S55L28B

PDM41256S55L28B

L7C199KMB55

3/

5962-8866203TA

5962-8866203NA

3DTT2

0EU86

0C7V7

3/

P4C1256-55FSMB

MT5C2568F-55883C

QP7C199-55FMB

EDI8833C55FB

3/

L7C199FMB55

61772

3DTT2

0C7V7

60264

0EU86

3/

IDT71256S55TDB

P4C1256-55DMB

QP7C199-55DMB

MS132K8C55CN

MT5C2568C-55883C

EDI8834C55QB

3/

L7C199DMB55

3/

PDM41256S55DB

5962-8866203NC

5962-8866203MA

3DTT2

P4C1256-55CMB

3DTT2

0C7V7

3/

P4C1256-55FMB

QP7C199-55KMB

IDT71256S55XEB

PDM41256S55EB

3/

5962-8866204XA

5962-8866204YA

61772

0C7V7

0EU86

3DTT2

3/

IDT71256S45DB

QP7C198-45DMB

MT5C2568CW-45883C

P4C1256-45DWMB

6206-45/BXAJC

3/

L7C199HMB45

EDI8834C45CB

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S45L32B

P4C1256-45L32MB

MT5C2568ECW-45883C

QP7C198-45LMB

6206-45M/BUAJC

EDI8834C45LB

3/

L7C199TMB45

3/

PDM41256S45L32B

5962-8866204ZA

3/

IDT71256S45EB

OW62256CZ3-45

See footnotes at end of table.

Page 3 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866204UA

3DTT2

0EU86

0C7V7

3/

P4C1256-45L28MB

MT5C2568EC-45883C

QP7C199-45LMB

IDT71256S45L28B

EDI8834C45L28B

PDM41256S45L28B

L7C199KMB-45

3/

5962-8866204TA

5962-8866204NA

3DTT2

0EU86

0C7V7

3/

P4C1256-45FSMB

MT5C2568F-45883C

QP7C199-45FMB

EDI8833C45FB

3/

L7C199FMB-45

61772

3DTT2

0C7V7

60264

0EU86

3/

IDT71256S45TDB

P4C1256-45DMB

QP7C199-45DMB

MS132K8C45CN

MT5C2568C-45883C

EDI8834C45QB

3/

PDM41256S45DB

L7C199DMB-45

5962-8866204NC

5962-8866204MA

3DTT2

P4C1256-45CMB

3DTT2

0C7V7

3/

P4C1256-45FMB

QP7C199-45KMB

IDT71256S45XEB

PDM41256S55EB

L7C199FMB45

5962-8866205XA

5962-8866205YA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S35DB

P4C1256-35DWMB

MT5C2568CW-35883C

QP7C198-35DMB

L7C199HMB35

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S35L32B

P4C1256-35L32MB

MT5C2568ECW-35883C

QP7C198-35LMB

L7C199TMB35

3/

PDM41256S35L32B

5962-8866205UA

3DTT2

0EU86

0C7V7

3/

P4C1256-35L28MB

MT5C2568EC-35883C

QP7C199-35LMB

IDT71256S35L28B

PDM41256S35L28B

L7C199KMB35

See footnotes at end of table.

Page 4 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866205TA

3DTT2

0EU86

0C7V7

3/

P4C1256-35FSMB

MT5C2568F-35883C

QP7C199-35FMB

L7C199FMB35

5962-8866205NA

61772

3DTT2

0C7V7

60264

0EU86

3/

IDT71256S35TDB

P4C1256-35DMB

QP7C199-35DMB

MS132K8C35CN

MT5C2568C-35883C

PDM41256S35DB

L7C199FMB35

3/

5962-8866205NC

5962-8866205MA

3DTT2

P4C1256-35CMB

3DTT2

0C7V7

3/

P4C1256-35FMB

QP7C199-35KMB

IDT71256S35XEB

PDM41256S35EB

3/

5962-8866206XA

5962-8866206YA

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S25DB

P4C1256-25DWMB

MT5C2568CW-25883C

QP7C198-25DMB

L7C199HMB25

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S25L32B

P4C1256-25L32MB

MT5C2568ECW-25883C

QP7C198-25LMB

L7C199TMB25

3/

PDM41256S25L32B

5962-8866206UA

3DTT2

0EU86

0C7V7

3/

P4C1256-25L28MB

MT5C2568EC-25883C

QP7C199-25LMB

IDT71256S25L28B

PDM41256S25L28B

L7C199KMB25

5962-8866206TA

5962-8866206NA

3DTT2

0EU86

0C7V7

3/

P4C1256-25FSMB

MT5C2568F-25883C

QP7C199-25FMB

L7C199FMB25

61772

3DTT2

0C7V7

60264

0EU86

3/

IDT71256S25TDB

P4C1256-25DMB

QP7C199-25DMB

MS132K8C25CN

MT5C2568C-25883C

PDM41256S25DB

L7C199FMB25

3/

See footnotes at end of table.

Page 5 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866206NC

5962-8866206MA

3DTT2

P4C1256-25CMB

3DTT2

0C7V7

3/

P4C1256-25FMB

QP7C199-25KMB

IDT71256S25XEB

PDM41256S25EB

3/

5962-8866207XA

5962-8866207YA

61772

3DTT2

0EU86

0C7V7

IDT71256S20DB

P4C1256-20DWMB

MT5C2568CW-20883C

QP7C198-20DMB

61772

3DTT2

0EU86

0C7V7

3/

IDT71256S20L32B

P4C1256-20L32MB

MT5C2568ECW-20883C

QP7C198-20LMB

PDM41256S20L32B

5962-8866207UA

3DTT2

0EU86

0C7V7

3/

P4C1256-20L28MB

MT5C2568EC-20883C

QP7C199-20LMB

PDM41256S20L28B

5962-8866207TA

5962-8866207NA

3DTT2

0EU86

0C7V7

P4C1256-20FSMB

MT5C2568F-20883C

QP7C199-20FMB

3DTT2

0C7V7

60264

0EU86

3/

P4C1256-20DMB

QP7C199-20DMB

MS132K8C20CN

MT5C2568C-20883C

PDM41256S20DB

5962-8866207NC

5962-8866207MA

3DTT2

P4C1256-20CMB

3DTT2

0C7V7

3/

P4C1256-20FMB

QP7C199-20KMB

PDM41256S20EB

5962-8866208XA

5962-8866208YA

3DTT2

0EU86

0C7V7

P4C1256-15DWMB

MT5C2568CW-15883C

QP7C198-15DMB

3DTT2

0EU86

0C7V7

3/

P4C1256-15L32MB

MT5C2568ECW-15883C

QP7C198-15LMB

PDM41256S15L32B

5962-8866208UA

3DTT2

0EU86

0C7V7

3/

P4C1256-15L28MB

MT5C2568EC-15883C

QP7C199-15LMB

PDM41256S15L28B

See footnotes at end of table.

Page 6 of 8

STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.

Standard

microcircuit

drawing PIN 1/

Vendor

CAGE

number

Vendor

similar PIN 2/

5962-8866208TA

5962-8866208NA

3DTT2

0EU86

0C7V7

P4C1256-15FSMB

MT5C2568F-15883C

QP7C199-15FMB

3DTT2

0C7V7

60264

0EU86

3/

P4C1256-15DMB

QP7C199-15DMB

MS132K8C15CN

MT5C2568C-15883C

PDM41256S15DB

5962-8866208MA

5962-8866209XA

5962-8866209YA

3DTT2

0C7V7

3/

P4C1256-15FMB

QP7C199-15KMB

PDM41256S15EB

3DTT2

0EU86

0C7V7

P4C1256-12DWMB

MT5C2568CW-12883C

QP7C198-12DMB

3DTT2

0EU86

0C7V7

P4C1256-12L32MB

MT5C2568ECW-12883C

QP7C198-12LMB

5962-8866209UA

5962-8866209TA

5962-8866209NA

3DTT2

0EU86

0C7V7

P4C1256-12L28MB

MT5C2568EC-12883C

QP7C199-12LMB

3DTT2

0EU86

0C7V7

P4C1256-12FSMB

MT5C2568F-12883C

QP7C199-12FMB

3DTT2

0C7V7

60264

0EU86

P4C1256-12DMB

QP7C199-12DMB

MS132K8C12CN

MT5C2568C-12883C

5962-8866209MA

3DTT2

0C7V7

P4C1256-12FMB

QP7C199-12KMB

1/ The lead finish shown for each PIN representing a hermetic package

is the most readily available from the manufacturer listed for that

part. If the desired lead finish is not listed, contact the Vendor to

determine its availability.

2/ Caution: Do not use this number for item acquisition. Items

acquired to this number may not satisfy the performance

requirements of this drawing.

3/ Not available from an approved source.

Page 7 of 8

Vendor CAGE

number

Vendor name

and address

61772

0C7V7

0EU86

3DTT2

60264

Integrated Device Technology, Inc.

6024 Silver Creek Valley Road

San Jose, CA 95138

QP Semiconductor

2945 Oakmead Village Court

Santa Clara, CA 95051

Austin Semiconductor Inc.

8701 Cross Park Dr.

Austin, TX 78754-4566

Pyramid Semiconductor Corporation

1340 Bordeaux Drive

Sunnyvale, CA 94089

Minco Technology Labs, Inc.

1805 Rutherford Lane

Austin, TX 78754-5101

The information contained herein is disseminated for convenience only and the

Government assumes no liability whatsoever for any inaccuracies in the

information bulletin.

Page 8 of 8


型号：	5962-8866
厂家：	ETC
描述：	MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 32K X 8 STATIC RAM (SRAM), MONOLITHIC SILICON 静态存储器
文件：	总22页 (文件大小：170K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

5962-8866 [ETC]

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