AD62550A [ESMT]
Class-D Audio Power Amplifier with USB / I2S Interface; D类音频功率放大器带USB / I2S接口型号: | AD62550A |
厂家: | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. |
描述: | Class-D Audio Power Amplifier with USB / I2S Interface |
文件: | 总3页 (文件大小:244K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ESMT
AD62550A
Class-D Audio Power Amplifier with USB / I2S Interface
82dB (PSNR), 78dB (DR) with Chock filter
z Anti-pop design
Features
z Compliant with USB Specification v1.1, and USB
2.0 full speed
z Over-temperature protection
z Under-voltage shutdown
z Short-circuit detection
z 12 MHz Crystal Input
z 32-pin LQFP(Pb free)
z Embedded high efficiency, high performance class
D stereo amplifier
z Support I2S input and I2S output interface of
master mode
Sampling frequencies(Fs):48kHz
z +6dB enhancement(Theater function)
z Support both bus-powered and self-powered
operation
z Supports Win Me//2000/XP and MacOS
z True plug-and-play application, no driver is
required for basic USB speaker application
z Support volume/mute control with external button
z Built-in 5V to 3.3V regulator for internal device
operation
Description
AD62550A is a single chip of Class-D audio
amplifier with USB/I2S interface. When using the
power supplied from the USB port, AD62550A can
drive a pair of up to 1W speakers due to the built-in,
high efficiency and high performance class D
amplifiers. The device also has an I2S input port and
I2S output port. The I2S input port allows other
external audio sources to use the class D amplifier
to share the speakers. The I2S output port allows
other high performance audio device (i.e.
AD8356A/AD8256A) to be controlled by AD62550A.
z Total efficiency
80% for 8Ω load @ -1dB 1kHz sine wave input
z Loudspeaker PSNR & DR (A-weighting)
80dB (PSNR), 78dB (DR) with Bead filter
Functional Block Diagram
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.3
1/14
ESMT
AD62550A
Pin Assignment
Pin Description
Pin
Name
MSDA
MSCL
Type
I/O
O
O
O
O
O
I
Description
I2C’s SDA of Master mode
I2C’s SCL of master mode
Power-down output (Note1)
Serial audio output (Note1)
L/R clock output(Fs) (Note1)
BCLK output(64xFs) (Note1)
Serial audio data input
Master clock(256xFs)
Characteristics
Schmitt trigger TTL input buffer
1
2
3
PDO
SDATAO
LRCIN
BCLK
SDATAI
MCLK
GNDR
RB
4
5
6
7
Schmitt trigger TTL input buffer
8
O
P
9
Ground for right channel
Right channel output-
10
11
12
13
14
15
16
O
O
P
RA
Right channel output+
Supply for right channel
Supply for left channel
Left channel output+
VDDR
VDDL
LA
P
O
O
LB
Left channel output-
GNDL
P
Ground for left channel
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.3
2/14
ESMT
AD62550A
USB/I2S
SEL
17
I
I
Low is USB mode, high is I2S mode
Mode selection bit
No connection
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NC
NC
O
I
XO
Crystal output
XI
Crystal input
GND
P
O
P
I/O
I/O
I
Ground
REGO
VDD
3.3V regulator output
5V supply voltage
USB data D-
USBDM
USBDP
THEATER
USB data D+
Theater mode, high active
Volume down, low active
Volume up, low active
Power-down and mute of Class D
Error output
Schmitt trigger TTL input buffer
With internal pull-up resistor
With internal pull-up resistor
Schmitt trigger TTL input buffer
Open-Drain output
I
VOLDN
VOLUP
MUTE
I
I
O
I
ERROR
RESET
Reset signal
Schmitt trigger TTL input buffer
Note1: Must be strapped resistor 1MΩ to 3.3V(REGO) or GND. BCLK, LRCIN and PDO must be strapped
to GND. SDATAO is strapped to GND by 1MΩ when AD62550A’s volume/mute is controlled by
external button, otherwise strapped to 3.3V when AD62550A is I2C slave mode for SEL1 is logic
LOW.
Absolute Maximum Ratings
Symbol
VDD
VDDL(R)
Vi
Parameter
Supply for regulator input
Min
0
Max
5.5
5.5
3.6
150
70
Units
V
Supply for Left (Right) Channel
Input Voltage
0
V
-0.3
-65
0
V
Tstg
Storage Temperature
oC
oC
V
Ta
Ambient Operating Temperature
Voltage Difference between VDDL and VDDR
Voltage Difference between VDDL(VDDR) and DVDD/AVDD
VDDL(VDDR) Power-on Voltage Ramp
-1
1
-3
3
V
0.2
V/μs
Recommended Operating Conditions
Symbol
Parameter
Typ
Units
V
VDD
Supply for regulator input
Supply for Driver Stage
Ambient Operating Temperature
4.5~5.5
3.0~5.0
0~70
VDDL(R)
Ta
V
oC
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.3 3/14
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