EM6323LXSP5B1.8 [EMMICRO]
Reset Circuit with Manual Reset and Watchdog; 复位电路，带有手动复位和看门狗
| 型号： | EM6323LXSP5B1.8 |
| 厂家： | 
EM MICROELECTRONIC - MARIN SA |
| 描述： | Reset Circuit with Manual Reset and Watchdog |
| 文件： | 总10页 (文件大小：501K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EM MICROELECTRONIC - MARIN SA
EM6323/24
Reset Circuit with Manual Reset and Watchdog
Description
Features
The EM6323/24 are low power, high precision reset ICs
featuring a manual reset and a watchdog inputs. They have
different threshold voltages and several timeout reset periods
(tPOR) and watchdog timeout periods (tWD) for maximum
!
!
!
!
Ultra-low supply current of 3.8µA (VDD=3.3V)
Operating temperature range: -40°C to +125°C
±1.5% reset threshold accuracy
11 reset threshold voltages VTH: 4.63V, 4.4V, 3.08V,
2.93V, 2.63V, 2.2V, 1.8V, 1.66V, 1.57V, 1.38V, 1.31V
flexibility in the application. EM6323 has a manual reset (MR
with internal pull-up) and a watchdog input pins. EM6324 has
only a watchdog input pin (WDI). The watchdog function can
be disabled by driving WDI with a three-state driver or by
leaving WDI unconnected. This is useful when the MCU is in
sleep mode.
Small SOT23-5L package as well as ultra-low supply current
of 3.8µA make the EM6323 and the EM6324 an ideal choice
for portable and battery-operated devices.
!
!
!
200ms reset timeout period (1.6ms, 25ms, 1600ms on
request)
1.6s watchdog timeout period (6.2ms, 102ms, 25.6s on
request)
3 reset output options:
Active-low RESET push-pull
Active-low RESET open-drain
Typical Application
Active-high RESET push-pull
VDD
!
Detection of microcontroller in sleep mode
VDD
*
VDD
RESET
RESET
RESET
RESET
Applications
!
!
!
!
!
!
!
Workstations
EM632x
MPU, DSP
I/O
Point of sales (POS)
Personal computers
Routers, hubs and switches
Handheld GPS
MR
WDI
GND
GND
GND
*
REXT for open-drain version only
Vending machines and ATM
Automotive systems
Fig. 1
Block Diagram
VDD
Oscillator
Pin Configuration
(manual reset,
EM6323
EM6324 (watchdog)
+
watchdog)
RESET
RESET
Reset
Logic
+ Timer
Voltage
Reference
-
RESET
VDD
VDD
1
2
3
5
1
2
3
5
RESET
GND
push-pull/open-drain
MR
Filter
GND
WDI
GND
4
4
RESET
MR
WDI
push-pull
Transition
Detector
Watchdog Logic
+ Timer
SOT23-5 top view
SOT23-5 top view
WDI
Fig. 3
Fig. 2
Pin Description
SOT23-5L
Name
Function
EM6323 EM6324
1
2
1
2
Active-low
Ground
output (push-pull or open-drain)
RESET
GND
RESET
Manual Reset input with an internal pull-up 30kΩ resistor. Reset remains active as long as MR is low
3
-
-
MR
and for tPOR after returns high. MR can be driven with a CMOS output or shorted to ground with a switch
Active-high RESET output (push-pull)
3
4
5
RESET
Watchdog input. WDI must be driven with a CMOS output. If the microcontroller I/O is put in a high
impedance condition, the circuit will detect this condition as a microcontroller in sleep mode and prevent
its watchdog from timing out
4
5
WDI
VDD
Supply Voltage (5.5V max.)
1
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Copyright © 2006, EM Microelectronic-Marin SA
03/06 - rev.H
EM6323/24
Ordering Information
L X SP5B 2.9 +
EM6323
-
Part Number:
EM6323 = manual reset & watchdog
RoHS Compliance:
+ = lead-free/green mold compliant
[blank] = leaded
EM6324 = watchdog
Delays tPOR & tWD
EM6323/24:
:
Reset Threshold Voltage:
tPOR [ms]
1.6 25 200 1600
A
E
J
1.3 = 1.31V
1.8 = 1.80V
3.1 = 3.08V
1.4
1.6
1.7
= 1.38V
= 1.57V
= 1.66V
2.2
2.6
2.9
= 2.20V
= 2.63V
= 2.93V
4.4
4.6
= 4.40V
= 4.63V
6.2
102
1600
25600
B
F
K
P
C
G
L
D
H
M
R
N
Q
Package:
= 5-pin SOT23-5, tape&reel, 3000 pcs
("L" is the standard version")
SP5B
Reset Output Type:
(Active-high RESET push-pull also for EM6324)
(Active-high RESET push-pull also for EM6324)
(EM6323 only)
X = Active-low /RESET push-pull
Y = Active-low /RESET open-drain
Z = Active-high RESET push-pull
Note: subject to availability (see standard versions list below). Please give complete Part Number when ordering
Standard Versions (Top Marking)
Top
Top Marking
with 4
Delay (tPOR)/
Threshold
Voltage
Marking 1)
Output Type
Package
Part Number
characters 2)
Watchdog timer (tWD
)
SOT23-5L
SOT23-5L
EM6323LZSP5B-2.6
EM6323LXSP5B-2.6
2.6V
200ms/1600ms
200ms/1600ms
Active-high push-pull RESET
APL5
APLG
2.63V
Active-low push-pull
Active-low push-pull
Active-low push-pull
Active-low push-pull
Active-low push-pull
Active-low open-drain
Active-low open-drain
Active-low open-drain
Active-low push-pull
Active-low push-pull
Active-low push-pull
Active-low open-drain
Active-low push-pull
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
KF##
K0##
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
SOT23-5L
EM6323LXSP5B-2.6+
EM6323LXSP5B-2.9
EM6323LXSP5B-2.9+
EM6323LXSP5B-3.1
EM6323LYSP5B-2.9
EM6323LYSP5B-2.9+
EM6323LYSP5B-3.1
EM6323LXSP5B-3.1
EM6324LXSP5B-4.4
EM6324LXSP5B-4.4+
EM6324LYSP5B-2.9
EM6324QXSP5B-1.4
2.63V
2.93V
2.93V
3.08V
2.93V
2.93V
3.1V
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/1600ms
200ms/25600ms
BPLG
APLH
BPLH
APLJ
APLU
BPLU
APLV
APLJ
K6##
K9##
3.1V
4.40V
4.40V
2.9V
AQMK
BQMK
AQLU
AQQB
1.38V
1)
2)
Top marking is standard from 2006. No bottom marking exists. Where ## refers to the lot number (EM internal reference
only)
Top marking with 4 characters is standard from 2003. For lead-free/green mold (RoHS) parts, the first letter of top
marking with 4 characters begins with letter “B” instead of letter “A”. Bottom marking indicates the lot number.
Standard Versions (samples)
Part Number
Part Number
EM6323LXSP5B-2.6+
EM6323LXSP5B-2.9+
EM6323LYSP5B-2.9+
EM6324LXSP5B-4.4+
Sample stock is generally held on standard versions only. Non standard versions have a 30,000 pieces minimum order
quantity. Please contact factory for other versions not shown here and for availability of non standard versions.
2
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Copyright © 2006, EM Microelectronic-Marin SA
03/06 - rev.H
EM6323/24
Absolute Maximum Ratings
Parameter
Voltage at VDD to GND
Minimum voltage at any signal pin
Maximum voltage at any signal pin
Electrostatic discharge max. to
MIL-STD-883C method 3015.7
with ref. to VSS
Handling Procedures
Symbol
VDD
VMIN
Conditions
-0.3V to +6V
GND - 0.3V
VDD + 0.3V
This device has built-in protection against high static
voltages or electric fields; however, anti-static
precautions must be taken as for any other CMOS
component. Unless otherwise specified, proper
operation can only occur when all terminal voltages are
kept within the voltage range. Unused inputs must
always be tied to a defined logic voltage level.
VMAX
VESD
2000V
Max. soldering conditions
Storage Temperature Range
TMAX
TSTG
250°C x 10s
-65°C to +150°C
Operating Conditions
Parameter
Supply voltage
Operating Temperature
Input transition rise and fall rate
Symbol Min Max Unit
Stresses above these listed maximum ratings may
cause permanent damages to the device. Exposure
beyond specified operating conditions may affect device
reliability or cause malfunction.
VDD
0.9 5.5
V
TA
-40 +125 °C
tR/tF
-
100 ns/V
on
MR
and WDI
Electrical Characteristics
Unless otherwise specified: VDD= 0.9V to 5.5V, TA=-40°C to +125°C (note 1).
Parameter
Symbol
Conditions
Min
-
-
-
-
Typ
Max
4.4
6.8
6.1
9.9
Unit
+25°C
VDD=1.5V
VDD=3.3V
VDD=5.0V
2.4
-40°C to +125°C
+25°C
Supply current (note 2)
IDD
3.86
5.89
µA
-40°C to +125°C
+25°C
-
-
8.6
11.6
-40°C to +125°C
+25°C
1.290
1.245
1.221
1.359
1.311
1.286
1.546
1.492
1.463
1.635
1.577
1.547
1.773
1.710
1.678
2.167
2.090
2.050
2.591
2.499
2.451
2.886
2.784
2.731
3.034
2.926
2.871
4.334
4.180
4.101
4.561
4.399
4.315
1.330
1.382
1.387
1.401
1.456
1.461
1.594
1.656
1.663
1.685
1.751
1.758
1.827
1.899
1.906
2.233
2.321
2.330
2.669
2.775
2.785
2.974
3.091
3.103
3.126
3.249
3.262
4.466
4.642
4.660
4.699
4.885
4.903
EM6323/24 – 1.3
EM6323/24 – 1.4
EM6323/24 – 1.6
EM6323/24 – 1.7
EM6323/24 – 1.8
EM6323/24 – 2.2
EM6323/24 – 2.6
EM6323/24 – 2.9
EM6323/24 – 3.1
EM6323/24 – 4.4
EM6323/24 – 4.6
1.31
1.38
1.57
1.66
1.80
2.20
2.63
2.93
3.08
4.40
4.63
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
Threshold voltage
(note 3)
VTH
V
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
+25°C
-40°C to +85°C
-40°C to +125°C
Note 1: Production tested at +25°C only. Over temperature limits are guaranteed by design, not production tested.
Note 3: Threshold voltage is specified for VDD falling.
3
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Copyright © 2006, EM Microelectronic-Marin SA
03/06 - rev.H
EM6323/24
Electrical Characteristics (continued)
Unless otherwise specified: VDD= 0.9V to 5.5V, TA=-40°C to +125° C (note 1).
Parameter
Symbol
Conditions
Min
-
Typ
2.1%•VTH
200
Max
-
Unit
Threshold hysteresis
VHYS
TA=+25°C
V
EM6323/24 C-G-L-Q
160
0.7
20
240
3.8
30
V
DD from 0V to VTH (typ)+15%
EM6323/24 A-E-J-N
EM6323/24 B-F-K-P
1.56
Reset timeout period
tPOR
TA= +25°C
(note 2 and 4)
ms
25
EM6323/24 D-H-M-R 1280
1600
1920
Propagation delay time
VDD drops from VTH (typ)+0.2V to VTH (typ)-0.2V
(note 2). TA= +25°C
tP
2
70
255
µs
V
DD to RESET (RESET)
delay
VDD>1V
-
-
-
-
-
-
-
-
-
-
-
-
0.3
0.3
0.35
0.3
0.3
0.35
-
I
OL=100µA
Open-drain RESET output
Voltage
VOL
V
VDD>2.5V
VDD>5V
IOL=1.5mA
IOL=3mA
-
VDD>1V
-
I
OL=100µA
VOL
VDD>2.5V
VDD>5V
IOL=1.5mA
IOL=3mA
-
-
Push-pull RESET / RESET
Output voltage
V
VDD>1.1V
VDD>2.5V
VDD>5V
0.8
2
4
-
I
OH=-30µA
VOH
IOH=-1.5mA
IOH=-3mA
-
-
Output leakage current
WATCHDOG INPUT (WDI)
WDI Input low
ILEAK
Only for EM6323/24_Y (open-drain)
TA= +25°C
0.5
µ
A
VWDI low
VWDI high
tWP
-
-
-
0.3
•
VDD
V
V
WDI Input high
0.7
•
VDD
-
Pulse width at WDI
1
-
-
1920
7.5
120
30720
-
µ
s
EM6323/24 J-K-L-M
1280
5
1600
6.25
100
25600
18
EM6323/24 A-B-C-D
EM6323/24 E-F-G-H
Watchdog timeout period
tWD
(note 6)
ms
80
EM6323/24 N-P-Q-R 20480
High-level Input Current
Low-level Input Current
IIH
IIL
WDI connected to VDD, TA= +25°C
WDI connected to GND, TA= +25°C
-
-
µ
A
A
8.3
-
µ
MANUAL RESET ( MR ) – EM6323 only
VMRT low
VMRT high
tMD
-
-
-
0.3
•
VDD
-
V
MR Input low
0.7
•
VDD
V
MR Input high
TA= +25°C
-
0.3
-
-
-
µs
MR to Reset delay
Pulse width at MR (note 5)
tPMD
1
7
µs
MR Internal Pull-up
resistor
RMR
TA=-40°C to +125°C
30
74
k
Ω
Note 1: Production tested at +25°C only. Over temperature limits are guaranteed by design, not production tested.
Note 2: WDI, MR and RESET (RESET) open.
Note 3: Threshold voltage is specified for VDD falling.
Note 4: Standard version for tPOR is 200ms (typ). Other option (1.6ms, 25ms, 1600ms) are available by mask option and
upon minimum order quantity. Please contact EM sales.
Note 5: Pulse width must be greater than 1µs to ensure the RESET (RESET) to go active.
Note 6: Standard version for tWD is 1600ms (typ). Other option (6.2ms, 102ms, 25.6s) are available by mask option and
upon minimum order quantity. Please contact EM sales.
4
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Copyright © 2006, EM Microelectronic-Marin SA
03/06 - rev.H
EM6323/24
Timing Waveforms
tSEN
VDD
VHYS
VTH
Overdrive
0.9V
t
logic "1"
MR
tPMD
logic "0"
t
logic "1"
RESET
tPOR
tMD
tP
logic "0"
t
logic "1"
RESET
tPOR
logic "0"
t
Fig. 4
logic "1"
WDI
tWP
tWD
tWD
logic "0"
t
logic "1"
RESET
logic "0"
t
logic "1"
RESET
tPOR
logic "0"
t
Fig. 5
Note 7: tSEN = Maximum Transient Duration. Please refer to figure on the next page.
Note 8: Overdrive = VTH -VDD. Please refer to figure on the next page.
5
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Copyright
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© 2006, EM Microelectronic-Marin SA
EM6323/24
Typical Operating Characteristics
(Typical values are at TA=+25°C unless otherwise noted. WDI, MR
,
and RESET open.)
RESET
9
6%
4%
8
VDD 5 . 0 V
7
2%
6
5
0%
VDD 3 . 3 V
[ uA ]
4
-2%
-4%
-6%
3
VDD 1 . 5 V
2
1
0
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
[ °C ]
[ °C ]
Fig. 6
Fig. 7
IDD vs. Temperature
Threshold Voltage Variation vs. Temperature
(normalized)
160%
140%
120%
100%
80%
160%
tPOR (°C)
tPOR (25°C)
tWD (°C)
140%
120%
100%
80%
tWD (25°C)
60%
60%
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75
100 125
[ °C ]
[ °C ]
Fig. 9
Fig. 8
Watchdog Timeout Period tWD vs. Temperature
(normalized with respect to tWD 25°C
Reset Timeout Period tPOR vs. Temperature
(normalized with respect to tPOR 25°C
)
)
6
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Copyright
03/06 - rev.H
© 2006, EM Microelectronic-Marin SA
EM6323/24
Typical Operating Characteristics
(Typical values are at TA=+25°C unless otherwise noted. WDI, MR
,
and RESET open.)
RESET
120
100
80
120
100
Reset occurs above
this line
80
[ us ]
60
[ us ]
60
40
20
0
40
20
0
1
-50 -25
0
25
50
[ °C ]
75
100 125
10
100
1000
[ mV ]
Fig. 10
Fig. 11
Propagation Time tPHL vs. Temperature
Maximum Transient Duration tSEN vs.
Overdrive VTH-VD
350
300
250
250
225
200
[ ns ]
[ ns ]
175
150
125
100
200
150
100
-50 -25
0
25
50
75
100 125
-50 -25
0
25 50 75 100 125
[ °C ]
[ °C ]
Fig. 12
Fig. 13
Watchdog Input Pulse Width tWP vs. Temperature
Manual Reset Pulse Width tPMD vs. Temperature
7
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Copyright
03/06 - rev.H
© 2006, EM Microelectronic-Marin SA
EM6323/24
Functional Description
VDD
MR
WDI
High Impedance
RESET
t < tWD
t > tWD
tPOR
tPOR
tPOR
Fig. 14
Reset Outputs
Manual Reset Input (EM6323 only)
A microprocessor (µP) reset input starts the µP in a
known state. The EM6323/24 µP supervisory circuits
assert a reset to prevent code-execution errors during
A logic low on MR asserts a reset. Reset remains
asserted while MR is low, and for tPOR (200ms nominal for
EM6323 C-G-L-Q) after it returns high. MR has an
power-up, power-down, and brownout conditions.
RESET
internal 30k
Ω pull-up resistor, so it can be left open if
is guaranteed to be a logic low for VDD down to 0.9V.
Once VDD exceeds the reset threshold, an internal timer
unused. This input can be driven with CMOS logic levels
or with open-drain outputs. Connect a normally open
keeps
low for the specified reset timeout period
RESET
momentary switch from MR to VSS to create a manual-
(tPOR); after this interval,
returns high.
RESET
reset function; debounce circuitry is integrated. If MR is
driven from long cable or the device is used in a noisy
If a brownout condition occurs (VDD dips below the reset
threshold), goes low. Each time is
RESET
RESET
environment, connect a 0.1µF capacitor from MR to VSS
to provide additional noise immunity (stronger external
additional pull-up resistor can also be added).
asserted it stays low for the reset timeout period. Any
time VDD goes below the reset threshold the internal
timer restarts.
is the inverse of RESET.
RESET
8
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Copyright
03/06 - rev.H
© 2006, EM Microelectronic-Marin SA
EM6323/24
Watchdog Input
If the watchdog timer has not been cleared within tWD
(1.6s typ.), reset asserts. The internal 1.6s timer is
cleared by either a reset pulse or by toggling WDI. While
reset is asserted, the timer remains cleared and does not
count. As soon as reset is released, the timer starts
counting.
If the microcontroller I/O connected to WDI is put in a
high impedance condition, the circuit will detect this
condition as a microcontroller in sleep mode and prevent
its watchdog from timing out. To monitor a high
impedance or a three state condition on WDI, the
watchdog input is internally driven low during the first
15/16 of the watchdog timeout period and high for the
last 1/16 of the watchdog timeout period.
When WDI is left unconnected, this internal driver clears
the 1.6s timer every 1.5s. When WDI is three-stated or
unconnected, the maximum allowable leakage current is
0.5µA.
To minimized the overall system power consumption and
therefore for a minimum watchdog input current leave
WDI low for the majority of the watchdog timeout period,
pulsing it low-high-low once within the first 15/16 of the
watchdog timeout period to reset the watchdog timer. If
WDI is externally driven high for the majority of the
timeout period, up to 35µA can flow into WDI. Meanwhile
when the microcontroller is not in sleep mode, the output
of the microcontroller which drives WDI has to be strong
enough to fight the 35µA.
VDD
VDD
Pullup
RESET
1/16 tWD
WDI Pullup OFF
ON
OFF
ON
Transition
Detector
Watchdog Logic
+ Timer
WDI
15/16 tWD
WDI Pulldown ON
15/16 tWD
tWD
OFF
tPOR
1/16 tWD
Pulldown
GND
Fig. 16
Fig. 15
WDI Input Stage Block Schematic
WDI Input Timing Diagram
15.0
25.0
12.0
9.0
20.0
15.0
[ uA ]
[ uA ]
6.0
3.0
0.0
10.0
5.0
0.0
-50 -25
0
25
50
75 100 125
-50 -25
0
25 50 75 100 125
[ °C ]
[ °C ]
Fig. 17
Fig. 18
WDI Input Current Low-level IIL vs. Temperature
(VDD=5.5V)
WDI Input Current High-Level IIH vs. Temperature
(VDD=5.5V)
9
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Copyright
03/06 - rev.H
© 2006, EM Microelectronic-Marin SA
EM6323/24
Package Information
SOT23-5L
D
E1
E
C
A2 A
A1
L
b
e
SYMBOL MIN TYP MAX
A
0.90 1.30 1.45
0.05 0.08 0.15
0.90 1.15 1.30
A1
A2
b
0.35
0.08
0.50
0.20
C
D
E
2.80 2.90 3.00
2.60 2.80 3.00
E1
e
e1
L
1.50
1.75
0.95
1.90
0.45
e1
Dimensions are in mm
Fig. 19
Traceability for small packages
Due to the limited space on the package surface, the bottom marking contains a limited number of characters that provide only partial
information for lot traceability. Full information for complete traceability is however provided on the packing labels of the product at
delivery from EM. It is highly recommended that the customer insures full lot traceability of EM product in his final product.
EM Microelectronic-Marin SA (EM) makes no warranty for the use of its products, other than those expressly contained in the Company's
standard warranty which is detailed in EM's General Terms of Sale located on the Company's web site. EM assumes no responsibility for
any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without
notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual
property of EM are granted in connection with the sale of EM products, expressly or by implications. EM's products are not authorized for
use as components in life support devices or systems.
Product qualification is performed according to internal EM quality standards for industrial products. For any special requirement (eg. automotive grade) please
contact EM Microelectronic-Marin S.A.
10
www.emmicroelectronic.com
Copyright
03/06 - rev.H
© 2006, EM Microelectronic-Marin SA
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