EM4350A6WP27 [EMMICRO]
1 KBit READ / WRITE CONTACTLESS IDENTIFICATION DEVICE; 1千位读/写非接触式识别装置
| 型号： | EM4350A6WP27 |
| 厂家： | 
EM MICROELECTRONIC - MARIN SA |
| 描述： | 1 KBit READ / WRITE CONTACTLESS IDENTIFICATION DEVICE |
| 文件： | 总14页 (文件大小：551K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
R
EM4150
EM4350
EM MICROELECTRONIC - MARIN SA
1 KBit READ / WRITE
CONTACTLESS IDENTIFICATION DEVICE
Description
Features
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1 KBit of EEPROM organized in 32 words of 32 bits
The EM4150/EM4350 (previously named P4150/P4350)
is a CMOS integrated circuit intended for use in electronic
Read/Write RF Transponders. The chip contains 1 KBit of
EEPROM which can be configured by the user, allowing a
write inhibited area, a read protected area, and a read
area output continuously at power on. The memory can
be secured by using the 32 bit password for all write and
read protected operations. The password can be updated,
but never read. The fixed code serial number and device
identification are laser programmed making every chip
unique.
32 bit Device Serial Number (Read Only Laser ROM)
32 bit Device Identification (Read Only Laser ROM)
Power-On Reset sequence
Power Check for EEPROM write operation
User defined Read Memory Area at Power On
User defined Write Inhibited Memory Area
User defined Read Protected Memory Area
Data Transmission performed by Amplitude
Modulation
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Two Data Rate Options 2 KBd (Opt64) or 4 KBd
(Opt32)
The EM4150 will transmit data to the transceiver by
modulating the amplitude of the electromagnetic field, and
receive data and commands in a similar way. Simple
commands will enable write to EEPROM, to update the
password, to read a specific memory area, and to reset
the logic.
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Bit Period = 64 or 32 periods of field frequency
170 pF ± 2% on chip Resonant Capacitor
-40 to +85°C Temperature range
100 to 150 kHz Field Frequency range
On chip Rectifier and Voltage Limiter
No external supply buffer capacitance needed due to
low power consumption
The coil of the tuned circuit is the only external component
required, all remaining functions are integrated in the chip.
Applications
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Ticketing
The only difference between EM4150 and EM4350 is that
EM4150 comes with standard sized pads, whereas
EM4350 comes with oversized (mega) pads, ideal for use
with bumps on die (Fig. 27).
Automotive Immobilizer with rolling code
High Security Hands Free Access Control
Industrial automation with portable database
Manufacturing automation
Prepayment Devices
Typical Operating Configuration
Pin Assignment
Coil 2
COIL2
COIL2
EM4150
L
COIL1
COIL1
EM4150
Coil 1
COIL 1
COIL 2
Coil terminal / Clock input
Coil terminal
Typical value of inductance at 125 KHz is 9.5 mH
Fig. 1
Fig. 2
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EM4150
EM4350
Absolute Maximum Ratings
Parameter
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static
precautions should be taken as for any other CMOS
component.
Symbol
Conditions
Maximum AC peak current
induced on COIL1 and COIL2
ICOIL
± 30 mA
Power Supply
VDD
Vmax
Vmin
-0.3 to 6.0V
VDD + 0.3V
VSS – 0.3V
-55 to °125°C
1000V
Unless otherwise specified, proper operation can only
occur when all terminal voltages are kept within the
supply voltage range.
Maximum voltage other pads
Minimum voltage other pads
Storage temperature
Tstore
VESD
Operating Conditions
Parameter
Symbol
Min
Typ
Max
Units
Electrostatic discharge
maximum to MIL-STD-883C
method 3015
Operating
Top
-40
+85
°C
temperature
Maximum coil
current
ICOIL
Vcoil
fcoil
10
mA
Vpp
kHz
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond
specified operating conditions may affect device reliability
or cause malfunction.
AC Voltage on
coil
1)
Supply frequency
100
150
Note 1): Maximum voltage is defined by forcing 10mA on Coil1-
Coil2
Tranceiver
Transponder
Data to be sent
to transponder
Modulator
Coil1
Antenna
Oscillator
Driver
EM4150
Coil2
Filter
and
Demodulator
Gain
Data received
from transponder
Data decoder
READ MODE
RECEIVE MODE
Signal on
Transponder coil
Signal on
Transceiver coil
Signal on
Transceiver coil
Signal on
Transponder coil
RF Carrier
Data
RF Carrier
Data
Fig. 3
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EM4150
EM4350
Electrical Characteristics
VDD = 2.5V, VSS = 0V, fcoil = 125 kHz Sine wave, Vcoil = 1Vpp, Top = 25°C unless otherwise stated
Parameter
Symbol Test Conditions
Min
2.0
2.6
Typ
Max
Units
Supply voltage
VDD
5.5
V
V
Minimum EEPROM write
voltage
VDDee
Power Check EEPROM write
Supply current / read
IPWcheck
Ird
VDD = 3V
80
5.0
µA
µA
Read Mode
3.0
40
Suppy current / write
Iwr
Write mode (VDD = 3V)
70
µA
Modulator ON voltage drop
VON
0.50
2.50
173.5
2.6
V
V(COIL1–Vss) and V(COIL2-Vss) Icoil = 100µA
V(COIL1–Vss) and V(COIL2-Vss) Icoil = 5mA
V
Resonance Capacitor
Cr
Vprh
166.5
1.0
170
2.0
pF
Power On Reset level high
Clock extractor input min.
Clock extractor input max.
EEPROM data endurance
EEPROM retention
Rising Supply
V
Vclkmin
Vclkmax
Ncy
Minimum voltage for Clock Extraction
Maximum voltage to detect modulation stop
Erase all / Write all at VDD = 5V
Top = 55°C after 100'000 cycles (Note 1)
Vpp
mVpp
cycles
years
50
100'000
10
Tret
Note 1: Based on 1000 hours at 150°C
Timing Characteristics
VDD = 2.5V, VSS = 0V, fcoil = 125 kHz Sine wave, Vcoil = 1Vpp, Top = 25°C unless otherwise stated
All timings are derived from the field frequency and are specified as a number of RF periods.
Parameters
Symbol
Test conditions
Value
Units
Option : 64 clocks per bit
Opt64
Read Bit Period
trdb
tpatt
trdw
tpp
twa
tinit
64
320
3200
64
64
2112
3200
RF periods
RF periods
RF periods
RF periods
RF periods
RF periods
RF periods
LIW/ACK/NACK pattern Duration
Read 1 Word Duration
Processing Pause Time
Write Access Time
Initialization Time
EEPROM write time
including LIW
VDD = 3 V
twee
Option : 32 clocks per bit
Opt32
Read Bit Period
trdb
tpatt
trdw
tpp
twa
tinit
32
160
1600
32
32
1056
2624
RF periods
RF periods
RF periods
RF periods
RF periods
RF periods
RF periods
LIW/ACK/NACK pattern Duration
Read 1 Word Duration
Processing Pause Time
Write Access Time
Initialization Time
EEPROM write time
including LIW
VDD = 3 V
twee
RF periods represent periods of the carrier frequency emitted by the transciever unit. For example, if 125 kHz is used :
The Read bit period (Opt64) would be : 1/125'000*64 = 512 µs, and the time to read 1 word : 1/125'000*3200 = 25.6 ms.
The Read bit period (Opt32) would be : 1/125'000*32 = 256 µs, and the time to read 1 word : 1/125'000*1600 = 12.8 ms.
ATTENTION
Due to amplitude modulation of the coil-signal, the clock-extractor may miss clocks or add spurious clocks close
to the edges of the RF-envelope. This desynchronisation will not be larger than ±3 clocks per bit and must be
taken into account when developing reader software.
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EM4150
EM4350
Block Diagram
ROM
Serial Data
Encoder
Modulator
EEPROM
+V
Voltage
Regulation
VDD
Coil 2
Cr
AC/DC
converte
r
Power
Control
Cs
Coil 1
Reset
GND
Write Enable
Clock
Extractor
Sequencer
Control
Logic
Command
Decoder
Data
Extractor
Fig. 4
Functional Description
General
Memory Organisation
The 1024 bit EEPROM is organised in 32 words of 32
bits. The first three words are assigned to the Password,
the Protection word, and the Control word. In order to
write one of these three words, it is necessary to send
the valid password. At fabrication, the EM4150 comes
with all bits of the password programmed to a logic "0".
The Password cannot be read out. The memory contains
two extra words of Laser ROM. These words are laser
programmed during fabrication for every chip, are unique
and cannot be altered.
The EM4150 is supplied by means of an electromagnetic
field induced on the attached coil. The AC voltage is
rectified in order to provide a DC internal supply voltage.
When the DC voltage crosses the Power-On level, the
chip enters the Standard Read Mode and sends data
continuously. The data to be sent in this mode is user
defined by storing the first and last addresses to be
output. When the last address is sent, the chip will
continue with the first address until the transceiver sends
a request. In the read mode, a Listen Window (LIW) is
generated before each word. During this time, the
EM4150 will turn to the Receive Mode (RM) if it receives
a valid RM pattern. The chip then expects a valid
command.
Memory Map
Bit 0
Bit 31
EE
EE
PASSWORD
PROTECTION WORD
CONTROL WORD
Word 0
1
2
Mode of Operation
EE
EE
928 Bits of USER
EEPROM
Power-On
31
32
33
DEVICE SERIAL NUMBER
DEVICE IDENTIFICATION
Laser
Laser
Init
Get Command
Standard
Read Mode
Control Word
Protection Word
0 - 7 First Word Read
8 - 15 Last Word Read
16 Password Check On/Off
17 Read After Write On/Off
18 - 31 User available
0 -
7
First Word Read Protected
8 - 15 Last Word Read Protected
16 - 23 First Word Write Inhibited
24 - 31 Last Word Write Inhibited
Execute Command
Receive
Mode
request ?
Login
Yes
No
Write Word
Write Password
Selective Read
Reset
Password
Write Only - NO Read Access
Device Identification Word &
Serial Number Word
Laser Programmed - Read Only
Send word
On means bit set to logic '1'
Off means bit set to logic '0'
Fig. 6
Fig. 5
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EM4150
EM4350
Standard Read Mode
Receive Mode
After a Power-On Reset and upon completion of a
command, the chip will execute the Standard Read
Mode, in which it will send data continuously, word by
word from the memory section defined between the First
Word Read (FWR) and Last Word Read (LWR). When
the last word is output, the chip will continue with the first
word until the transceiver sends a request. If FWR and
LWR are the same, the same word will be sent
repetitively. The Listen Window (LIW) is generated
before each word to check if the transceiver is sending
data. The LIW has a duration of 320 (160 opt 32) periods
of the RF field. FWR and LWR have to be programmed
as valid addresses (FWR ≤ LWR and ≤ 33).
To activate the Receive Mode, the Transceiver sends to
the chip the RM pattern (while in the modulated phase of
a Listen Window LIW). The EM4150 will stop sending
data upon reception of a valid RM. The chip then expects
a command. The RM pattern consists of 2 bits "0" sent
by the transceiver. The first bit "0" transmitted is to be
detected during the 64 (32 opt 32) periods where the
modulation is "ON" in LIW.
OUTPUT
WORD n
LIW
INPUT
RM COMMAND
The words sent by the EM4150 comprise 32 data bits
and parity bits. The parity bits are not stored in the
EEPROM, but generated while the message is sent as
described below. The parity is even for rows and
columns, meaning that the total number of "1's" is even
(including the parity bit).
RM : Two Consecutive bits set to logic "0"
Fig. 9
Commands
The commands are composed of nine bits : eight data
bits and one even parity bit (total amount of "ones" is
even including the parity bit).
Word Organisation (Words 0 to 32)
First bit output
Data
Row Even Parity
COMMAND BITS
FUNCTION
D0
D8
D1
D2
D3
D4
D5
D6
D7
P0
LOGIN
0 0 0 0 0 0 0 1
0 0 0 1 0 0 0 1
0 0 0 1 0 0 1 0
0 0 0 0 1 0 1 0
1 0 0 0 0 0 0 0
1
0
0
0
1
D9 D10 D11 D12 D13 D14 D15 P1
D16 D17 D18 D19 D20 D21 D22 D23 P2
D24 D25 D26 D27 D28 D29 D30 D31 P3
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7
WRITE PASSWORD
WRITE WORD
0
Column Even Parity
Last bit output
logic "0"
SELECTIVE READ MODE
RESET
Fig. 7a
When a word is read protected, the output will consist of
45 bits set to logic "0". The password has to be used to
output correctly a read protected memory area.
Word Organisation (Word 33)
First bit
Received
C0
ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID9 P1
R0 R1 R2 R3 R4 R5 R6 R7 P2
CK0 CK1 CK2 CK3 CK4 CK5 CK6 CK7 P3
C1
C2
C3
C4
C5 ID0 ID1 P0
Parity bit
PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7
0
Fig. 10
Selective Read Mode
C0 - C5
ID0 - ID9
: P4150 Code set to Hexadecimal 32
: Version Code
The Selective Read Mode is used to read other data than
that defined between FWR and LWR. To enter Selective
Read Mode, the Transceiver has to send during LIW a
Receive mode pattern (RM) to turn the EM4150 in
Receive Mode. Then the Selective Read Mode
Command is sent by the transceiver followed by the First
and Last addresses to be read. The FWR and LWR are
then replaced by the new addresses and the chip is
operating in the same way as the Standard Read Mode.
The control word is not modified by this command, and
the next standard read mode operation will work with
original FWR and LWR (Selected area is read once and
then the chip returns to Standard Read Mode).
R0 - R7 / CK0 - CK7 : EM reserved, and Check bits
Fig. 7b
Read Sequence
POR
INIT
OUTPUT
LIW LIW
FWR
LIW FWR+1 LWR LIW LIW
FWR
LIW
LIW D0-D7 P0 D8-D15 P1 D16-D23 P2 D24-D31 P3 PC0-PC7 "0"
To read words which are Read Protected, a Login
command has to be sent by the transceiver prior to the
Selective Read command. The Login command is to be
used only once for all subsequent commands requiring a
password.
1 bit - 64 T0 periods (Opt64)
32 T0 periods (Opt32)
T0 periods :
32 32
128
64
32
64 (Opt64)
32 (Opt32)
Data
16 16
64
Coded Data
T0 = Period of RF carrier frequency
Fig. 8
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EM4150
EM4350
Selective Read Mode cont.
The Selective Read mode command is followed by a single 32-bit word containing the new first and last addresses. Bits 0
to 7 correspond to the First Word Read and bits 8 to 15 correspond to the Last Word Read. Bits 16 to 31 have to be sent
but are not used in the chip. The parities must be sent according to the word organisation as described in fig.7. Note that
bit 31 is transmitted first.
To read the device Identification or the Serial Number, the Selective Read Command allows direct access to the Laser
programmed words. These words can also be addressed in the standard read mode by selecting the addresses
accordingly.
OUTPUT
INPUT
WORD n
LIW
ACK/NAK LIW
LIW
FWR
LIW
RM Selective RD ADDRESSES
tpp
Fig. 11
First bit received
Addresses Bit Stream Format
XX
XX
XX
XX
XX
XX
XX
XX
P3 XX XX XX XX XX XX XX XX P2
LW7 LW6 LW5 LW4 LW3 LW2 LW1 LW0 P1 FW7 FW6 FW5 FW4 FW3 FW2 FW1 FW0 P0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 "0"
Fig. 12
Reset Command
The Reset Command will return from any mode to the Standard Read Mode. The next word out is the FWR.
OUTPUT
INPUT
WORD n
LIW
LIW
FWR
LIW
ACK/NAK
LIW
RM
RESET
t
pp
t
init
Fig. 13
Login
The Login command is used to access protected memory areas. This command has to be used only once to perform
several password protected commands. The Power-On sequence and the Reset command will reset the password entry,
and a new Login command has to be received to perform further password protected operations.
Upon reception of a correct password, the EM4150 will respond with an acknowledge pattern (ACK) and then continue in
Standard Read Mode. If the Login is correct then password protected operations are allowed. If the password is incorrect, a
NAK pattern is issued and password protected operations will not be possible (refer to Write Word for password data
structure).
OUTPUT
INPUT
LIW
WORD n
LIW
ACK/NAK
LIW
FWR
LIW
RM
LOGIN
PASSWORD
tpp
Fig. 14
If bit 16 of the control word is disabled (Password Check ON/OFF), the Login is still mandatory to modify the Protection
Word, the Control Word, and the Password, but not to write in the EEPROM which is not write inhibited. In order to modify a
write inhibited word, the Protection word has to be modified first. The Read protected area always requires the Login to be
read. If the Write Protection Word is write protected, the write protection configuration is locked.
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EM4150
EM4350
Write Password
When a Write Password command is received, the chip next expects information on the actual valid password. The chip
sends back an ACK pattern if the password is correct. Then the chip expects the new password consisting of 32 bits +
parity bit to be stored in the EEPROM. The chip will respond with an ACK pattern for a correct reception of data upon
reception of the new password, and then will send another acknowledge pattern (ACK) to announce that the data is stored
in the EEPROM.
The Read after Write function has no effect on this command. If the password is wrong or the
transmission is faulty, the chip will : send a NAK pattern; return to the Standard Read Mode; and, the password will remain
the same. (Refer to Write Word for password data structure).
tpp
twa
twee
OUTPUT
INPUT
ACK
LIW
LIW
FWR
LIW
ACK
ACK
WORD n
LIW
RM WRITE PW
ACTUAL PW
RM
NEW PW
TRANSCEIVER RF FIELD "ON"
Fig. 15
Write Word
The Write mode allows modification of the EEPROM contents word by word. To modify address 1 (Protection word) and
address 2 (Control word), it is mandatory to first send a Login command in order to Log in (like in a computer). The new
written values will take effect only after performing a Reset command. It is strongly recommended to check the result of
modifying the contents of these addresses effecting the function of the chip. Address 0 (Password) cannot be modified with
this command but can be changed with the Write Password command.
Addresses 3 to 31 are programmable according to the defined protections. If the Password Check bit is off (bit 16 of control
word) and the word is not write inhibited, the selected word can be freely modified without password. If the Password Check
bit is on and the word is not write inhibited, the selected word can be modified with a previous Login. In any case, if the
word is write inhibited, the protection word has to be changed before programming can occur.
Write to Address
Check Password bit
Write Inhibit
Write Operation
(16 bit / Control word)
(Protection word)
0
X
X
X
OFF
ON
X
X
OFF
ON
OFF
OFF
ON
Only with Write Password command
Login always required
Write configuration LOCKED
Freely programmable
Login required
Change protection word first
1 – 2
1 – 2
3 – 31
3 – 31
3 – 31
Address
0
0
A5 A4 A3 A2 A1 A0
Note :
Padd
A5 in write mode always "0"
(addresses Laser ROM)
First bit received
Data
D31 D30 D29 D28 D27 D26 D25 D24 P3 D23 D22 D21 D20 D19 D18 D17 D16 P2 D15 D14
D13 D12 .......................... D02 D01 D00 P0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 "0"
Fig. 16
The Write Word command is followed by the address and data. The address consists of a 9 bit block containing 8 data bits
and 1 even parity bit. Only 6 bits from the data section are used for the word addressing, and the first three bits sent must
be "0". The data consists of 4 times 9 bit blocks, each block consisting of 8 data bits and 1 associated even parity bit and
one additional block consisting of 8 column parity bits and "0" as stop bit (Refer to fig. 7)
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EM4150
EM4350
Write Word (cont.)
After reception of the command, the address, and the data, the EM4150 will check the parity, the write protection status, the
Login status, and also if the available power from the RF field is sufficient. If all the conditions are satisfied, an acknowledge
pattern (ACK) will be issued afterward and the EEPROM writing process will start. At the end of programming, the chip will
send an Acknowledge pattern (ACK). If at least one of the checks fails, the chip will issue a no acknowledge pattern (NAK)
instead of ACK and return to the Standard Read Mode. The Transceiver will keep the RF field permanently "ON" during the
whole writing process time.
The Read After Write function (bit 17 of Control word) controls the mode of operation following a write operation. When
"ON" the latest written word will be read out and output next to the ACK pattern and two Listen Windows (LIW-LIW) even if
the word is read protected. When "OFF", the ACK is followed immediately by a LIW-LIW and FWR. The last written word is
not output.
If a request from the transceiver to return in receive mode (RM) is generated during the LIW, another word can be written in.
Otherwise, the EM4150 will return in the Standard Read Mode.
twa
twee
Write 1 word
OUTPUT
INPUT
WORD n
LIW
ACK
ACK
LIW
LIW
FWR
RM WRITE WORD ADDRESS
DATA
DATA
DATA
TRANSCEIVER RF FIELD "ON"
twa
twee
Write several words
OUTPUT
WORD n
LIW
LIW
ACK
ACK
INPUT
RM WRITE WORD ADDRESS
RM WRITE WORD ADDRESS DATA
TRANSCEIVER RF FIELD "ON"
twa
twee
Note: The Last Written is outpout
even if Read Protected.
Read After Write function
OUTPUT
INPUT
WORD n
LIW
ACK
ACK LIW LIW Last Written LIW
LIW
FWR
RM WRITE WORD ADDRESS
TRANSCEIVER RF FIELD "ON"
twa
OUTPUT
INPUT
WORD n
LIW
NAK
LIW
LIW
FWR
RM WRITE WORD ADDRESS
DATA
TRANSCEIVER RF FIELD "ON"
Fig. 17
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EM4150
EM4350
AC/DC Converter and Voltage Limiter
Power On Reset (POR)
The AC/DC converter is fully integrated on chip and will
extract the power from the incident RF field. The internal
DC voltage will be clamped to avoid high internal DC
voltage in strong RF fields.
When the EM4150 with its attached coil enters an
electromagnetic field, the built in AC/DC converter will
supply the chip. The DC voltage is monitored and a
Reset signal is generated to initialise the logic. The
contents of the Control word and Protection word will be
downloaded to enable the functions (INIT). The Power
On Reset is also provided in order to make sure that the
chip will start issuing correct data. Hysteresis is provided
to avoid improper operation at the limit level.
Resonance Capacitor
The Resonance Capacitor is integrated, and its tolerance
is adjusted to ± 2% over the whole production.
Typical Capacitor Variation
versus Temperature
VDD
Vprh
Cr Tolerance [%]
100.3
Vprhys
100.2
100.1
100.0
99.9
t
Reset
tinit
EM4150 Active
99.8
t
99.7
-50
-30
-10
10
30
50
70
90
Fig. 18
Temperature [°C]
Fig. 19
Lock All / Lock Memory Area
The EM4150 can be converted to a Read Only chip or be
configured to Read/Write and Read Only Areas by
programming the protection word. This configuration can
be locked by write inhibiting the Write Protection Word.
Great care should be taken in doing this operation as
there is no further possibility to change the Write
Protection Word. The Control Word can also be
protected in the same way thus freezing the operation
mode.
Special Timings
The Processing Pause Time (tpp), Write Access Time
(twa) and EEPROM Write Time (Twee) are timings
where the EM4150 is executing internal operations.
During these pauses, the RF field will be influenced.
32 32
64
32
(Opt64)
(Opt32)
3200
2624
(Opt64)
(Opt32)
(Opt64)
RF periods :
16 16 (Opt32)
Clock Extractor
tpp
twa
twee
The Clock extractor will generate a system clock with a
frequency corresponding to the frequency of the RF field.
The system clock is used by a sequencer to generate all
internal timings.
During Twa and Twee, the signal on the coil is
damped due to a higher current consumption.
Same modulation
as for a normal bit
Fig. 20
Data Extractor
The transceiver generated field will be amplitude
modulated to transmit data to the EM4150. The Data
extractor demodulates the incoming signal to generate
logic levels, and decodes the incoming data.
Modulator
The Data Modulator is driven by the serial data output
from the memory which is Manchester encoded. The
modulator will draw a large current from both coil
terminals, thus amplitude modulating the RF field
according to the memory data.
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EM4150
EM4350
Communication from Transponder to the Transceiver ( READ MODE)
The EM4150 modulates the amplitude of the RF field to transmit data to the transceiver. Data are output serially from the
EEPROM and Manchester encoded.
1 bit 64 periods of RF field (Opt64)
32 periods of RF field (Opt32)
1 bit
1 bit
1 bit
32 periods (Opt64)
16 periods (Opt32)
Data from EEPROM
Coded Data Measured on the COIL
Opt64 is the chip option with a bit period corresponding to 64 periods of the RF field
Opt32 is the chip option with a bit period corresponding to 32 periods of the RF field
Fig. 21
The EM4150 uses different patterns to send status information to the transceiver. Their structure can not be confused with a
bit pattern sequence. These patterns are the Listen Window (LIW) to inform the transceiver that data can be accepted, the
Acknowledge (ACK) indicating proper communication and end of EEPROM write, and the No Acknowledge (NAK) when
something is wrong.
The LIW, due to its special structure, can be used to synchronize the transceiver during a read operation. The LIW is sent
before each word, and is sent twice before FWR.
LIW
ACK
NAK
32 32
16 16
128
64
64
32
64
32
(Opt64)
(Opt32)
32 32
16 16
96
48
32
16
96
48
32 (Opt64)
16
32 32
16 16
96
48
32
16
64
32
32 32 (Opt64)
16 16
(Opt32)
(Opt32)
Opt64 is the chip option with a bit period corresponding to 64 periods of the RF field
Opt32 is the chip option with a bit period corresponding to 32 periods of the RF field
All numbers represent number of periods of RF field
Fig. 22
Communication from the Transceiver to the Transponder (RECEIVE MODE)
The EM4150 can be switched to the Receive Mode ONLY DURING A LISTEN WINDOW. The Transceiver is synchronized
with the incoming data from the transponder and expects a LIW before each word. During the phase where the chip has its
modulator "ON" (64/32 periods of RF [Opt64/Opt32] ), the transceiver has to send a bit "0". A certain phase shift in the read
path of the transceiver can be accepted due to the fact that when entering Receive Mode, the Transceiver becomes the
Master.
At reception of the first "0", the chip immediately stops the LIW sequence and then expects another bit "0" to activate the
receive mode. Once the EM4150 has received the first bit "0", the transceiver is imposing the timing for synchronisation.
The EM4150 turns "ON" its modulator at the beginning of each frame of a bit period. To send a logic "1" bit, the transceiver
continues to send clocks without modulation. After half a bit period, the modulation device of the EM4150 is turned "OFF"
allowing recharge of the internal supply capacitor. To send a logic "0" bit, the transceiver stops sending clocks (100%
modulation) during the first half of a bit period. The transceiver must not turn "OFF" the field after 7/4 clocks of the bit period
(Opt64/Opt32). The field is stopped for the remaining first half of the bit period, and then turned "ON" again for the second
half of the bit period. The 32rd/16th clock (Opt64/Opt32) defines the end of the bit
To ensure synchronisation between the transceiver and the transponder, a logic bit set to "0" has to be transmitted at
regular intervals. The RM pattern consists of two bits set to "0" thus allowing initial synchronisation. In addition, the chosen
data structure contains even parity bits which will not allow more than eight consecutive bits set to logic "1" where no
modulation occurs.
10
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EM4150
EM4350
Communication from the Transceiver to the Transponder (RECEIVE MODE) (cont.)
While the transceiver is sending data to the transponder, two different modulations will be observed on both coils. During
the first half of the bit period, the EM4150 is switching "ON" its modulation device causing a modulation of the RF field. This
modulation can also be observed on the transceiver's coil. The transceiver sending a bit "0" will switch "OFF" the field,
causing a 100% modulation being observed on the transponder coil.
Bit
Period
DATA
:
"1"
"0"
"0"
"1"
"0"
"1"
Transceiver
Coil
Transponder
Coil
Periods of RF field (Opt 64):
Periods of RF field (Opt 32):
32
16
32
16
32
16
32
16
*
Modulation induced by the Transceiver
Recommended : 7/4 periods (Opt64/Opt32)
*
Minimum
: 1 period
Modulation induced by the Transponder
Fig. 23
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EM4150
EM4350
Pad Description
Pad Name
Function
8
7
6
5
1
2
3
4
5
6
7
8
9
COIL1
VPOS
TEST_IN
VDD
TEST_OUT
TEST
TEST_CLK
VSS
COIL2
Coil Terminal 1
Internal supply
9
1
Test input with pull-down
Positive Internal Supply Voltage
Test Output
Test Mode Input with pull-down
Test Clock input with pull-down
Negative Internal Supply Voltage
Coil terminal 2
4
3
2
Packages
CID Package
PCB Package
FRONT VIEW
Y
Z
K
J
SYMBOL
MIN
8.2
3.8
TYP
8.5
4.0
6.0
0.5
1.3
0.4
0.44
0.127
0.5
MAX
8.8
4.2
TOP VIEW
B
A
B
D
e
F
g
J
K
R
X
5.8
6.2
0.38
1.25
0.3
0.42
0.115
0.4
0.62
1.35
0.5
0.46
0.139
0.6
MARKING
AREA
D
A
C2
C1
Dimensions are in mm
R
SYMBOL MIN
TYP
MAX
e
X
Y
Z
8.0
4.0
C2
C1
1.0
F
F
Dimensions are in mm
g
Fig. 24
Fig. 25
Chip Dimensions
Fig. 26
Fig. 27
12
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EM4150
EM4350
Ordering Information
Die Form
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
EM4150 A6 WS 11 %%%
-
Circuit Nb:
Customer Version:
EM4150: standard pads
EM4350: mega pads
%%% = only for custom specific version
Version:
Bumping:
A6 = Manchester, 64 clocks per bit
A5 = Manchester, 32 clocks per bit
" " (blank) = no bumps
E = with Gold Bumps (Note 2)
Die form:
Thickness:
WW = Wafer
6 = 6 mils (152um)
7 = 7 mils (178um)
11 = 11 mils (280um)
21 = 21 mils (533um)
27 = 27 mils (686um)
WS = Sawn Wafer/Frame
WT = Sticky Tape
WP = Waffle Pack (note 1)
Packaged Devices
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
EM4150 A6 CI2LC %%%
-
Circuit Nb:
Customer Version:
EM4150: standard pads
%%% = only for custom specific version
Version:
A6 = Manchester, 64 clocks per bit
A5 = Manchester, 32 clocks per bit
Package/Card & Delivery Form:
CI2LB = CID Pack, 2 long pins (2.5mm), in tape
CI2LC = CID Pack, 2 long pins (2.5mm), in bulk
CI2SB = CID Pack, 2 short pins (1.25mm), in tape
CI2SC = CID Pack, 2 short pins (1.25mm), in bulk
CB2RC = PCB Package, 2 pins, in bulk
SO8A = SO-8 Package, in stick (note 1)
Remarks:
•
•
For ordering please use table of “Standard Version” table below.
For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or
packages, please contact EM Microelectronic-Marin S.A.
•
•
Note 1: This is a non-standard package. Please contact EM Microelectronic-Marin S.A for availability.
Note 2: EM4350 is preferably used with gold bumps. Use of EM4150 with gold bump together with direct technology is
subject to license, please contact EM Sales Office.
13
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EM4150
EM4350
Standard Versions & Samples:
For samples please order exclusively:
Cycle/
bit
Delivery
Form
Part Number
Bit coding
Pads
Package
EM4150A6CI2LC
EM4150A6CB2RC
Manchester
Manchester
64
64
Standard CID package, 2 pins (length 2.5mm) bulk
Standard PCB Package, 2 pins bulk
The versions below are considered standards and should be readily available. For other versions or other delivery form,
please contact EM Microelectronic-Marin S.A. Please make sure to give complete part number when ordering, without
spaces between characters.
Cycle/
bit
Part Number
Bit coding
Pads
Package/Die Form
Delivery Form
/ Bumping
EM4150A5CB2RC
EM4150A5CI2LC
EM4150A5CI2SC
EM4150A6CB2RC
EM4150A6CI2LB
EM4150A6CI2LC
EM4150A6CI2SB
EM4150A6CI2SC
EM4150A6SO8A
EM4150A6WS6
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
32
32
32
64
64
64
64
64
64
64
64
64
64
Standard PCB Package, 2 pins
bulk
bulk
Standard CID package, 2 pins (length 2.5mm)
Standard CID package, 2 pins (length 1.25mm) bulk
Standard PCB Package, 2 pins
bulk
tape
bulk
Standard CID package, 2 pins (length 2.5mm)
Standard CID package, 2 pins (length 2.5mm)
Standard CID package, 2 pins (length 1.25mm) tape
Standard CID package, 2 pins (length 1.25mm) bulk
Standard SO-8 package
stick
Standard Sawn wafer, 6 mils
Standard Sawn wafer, 7 mils
Standard Unsawn wafer, 27 mils
Standard Unsawn wafer, 7 mils
no bumps
no bumps
no bumps
no bumps
custom
EM4150A6WS7
EM4150A6WW27
EM4150A6WW7
EM4150XXYYY-%%%
EM4350A6WP11E
EM4350A6WS11E
EM4350A6WT11E
EM4350XXYYY-%%%
Manchester 32/64 Standard custom
Manchester
Manchester
Manchester
64
64
64
Mega
Mega
Mega
Mega
Die in waffle pack, 11 mils
Sawn wafer, 11 mils
Die on sticky tape, 11 mils
custom
with gold bumps
with gold bumps
with gold bumps
custom
Manchester 32/64
Product Support
Check our Web Site under Products/RF Identification section.
Questions can be sent to info@emmicroelectronic.com
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an
EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without
notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version.
© EM Microelectronic-Marin SA, 08/04, Rev. F
14
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