EM4056_技术文档

EM MICROELECTRONIC - MARIN SA

EM4056

2KBIT Read/Write with ANTICOLLISION

Contactless Identification Device

•

Programmable PIN coverage of the memory (0, 25,

50, 75 or 100 %)

Description

The EM4056 is a CMOS integrated circuit intended for

use in contactless Read/Write transponders.

•

Power check for EEPROM Write operation

Reader Talk First communication protocol

Data transmission performed by Amplitude

Modulation (ASK) and Biphase (CDP) coding

Data rate 2 KBauds (Bit Period = 64 periods of carrier

frequency)

The user’s configurable

2 kbits EEPROM memory

contained in the chip is organised in 125 words of 16 bits,

each word can be irreversibly protected against reading

or/and writing attempts.

The user can define a password and protect part or all of

the memory.

Serial and identification numbers are laser programmed

during IC manufacturing.

numbering may be made available and customer specific

on request.

The EM4056 transmits its data towards the reader by

amplitude modulation of the magnetic field and receives

the commands from the reader in a similar way.

Simple set of commands allow the dialogue between the

EM4056 and the reader. Read and write commands

access directly to an address of memory.

The EM4056 has a built-in anticollision protocol which

allows an unlimited number of transponders in the reader

field to dialogue simultaneously.

•

100 to 150kHz carrier frequency

Long range Read/Write operations

Block check of data transmission (CRC)

Anticollision protocol based on unique ID

number(unlimited number of tags)

PIN Code identification linked with counter of false

attempts

On chip arithmetic operation (addition, comparison of

secret and non secret data, etc.)

340pF ± 3% on chip Resonant Capacitor

No external supply buffer capacitance

On chip Rectifier and Voltage Limiter

A

reserved application

•

The transmission antenna is the only external element

required, all the other elements are integrated on chip.

Applications

•

Ticketing

Hands free Access control

Prothesis identification

Prepayment devices

Manufacturing automation with portable database

Features

•

2 kBits EEPROM organized in 125 words of 16 bits

3 words of 16 Bits Laser ROM for application number

and serial number

•

Industrial logistics

•

Programmable (OTP) Read and/or Write Protection

on every word

Typical Operating Configuration

C2

EM4056

L

C1

Typical value for inductance L is 4.78mH at f_O= 125 KHz

Fig. 1

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EM4056

Block Diagram

EEPROM

CLK

Analog

Circuit

Logic Circuit

Power Supply

Addressing

Antenna

(Coil)

Serial Output

Memory

Safety

(incl. PIN Code)

Laser ROM

3x16 bit

Modulator

Adder

Write/Read

Protection (OTP)

Anticollision

125 x 16 bit

EEPROM

Demodulator

Serial Input

Fig. 2

System Principle

125kHz EM coupling

EM4056

Reader

Command Mode

Reader

Oscillator

Reader Coil

Reader

Coil

Transponder Coil

Answer Mode

Modulator

Decoder

RS232

Serial

Interface

Transponder Coil

Reader Coil

Demodulator

Fig. 3

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EM4056

Absolute Maximum Ratings

Handling Procedures

This device has built-in protection against high static

voltages or electric fields; however, anti-static precautions

must be taken as for any other CMOS component. Unless

otherwise specified, proper operation can only occur when

all terminal voltages are kept within the voltage range.

Unused inputs must always be tied to a defined logic

voltage level.

Parameter

Symbol

Min.

Max.

Units

Voltage

Supply pads

on

Power

V

-0.3

6.0

V

DD

Voltage on other pads

V

- 0.3

V + 0.3

DD

V

PAD

SS

Max. AC peak current

induced on COIL1 and

COIL2

I

- 30

+ 30

mA

p

COIL

Operating Conditions

Storage temperature

T

-55

-40

+125

+85

o

STORE

C

Operating temperature

T

o

OP

C

Parameter

Symbol Min

Max Units

Electrostatic discharge

max. to MIL-STS-883C

method 3015

V

1000

V

(Note 1)

pp

V

ESD

Max. AC Voltage on COIL

COIL

I

mA

Max. AC coil current

-10

+10

COIL

p

f

Carrier frequency

100

-40

150

+85

kHz

°C

COIL

Stresses above these listed maximum ratings may cause

permanent damages to the device. Exposure beyond

specified operating conditions may affect device reliability

or cause malfunction.

T

Operating temperature

OP

Note 1: Defined by forcing 10mA on Coil1-Coil2

Electrical Characteristics

Unless otherwise specified : V

= 4.0 V, V

SS

= 0 V, T

= 25°C, V

COIL

= 4.5 V = 125 KHz Sine wave

f

DD

OP

pp, COIL

Parameter

Supply voltage (not regulated)

Symbol

Conditions

Min Typ

Max

(Note1)

Unit

V

POS-REG

Supply voltage (regulated)

Min. EEPROM Read voltage

Min. EEPROM Write voltage

EEPROM Read current

V

= max (note 1)

3.4

2.5

4.3

V

DD

POS-REG

V

Read mode (note 2)

Write mode

RD

V

WR

I

Read mode

19

60

70

25

80

95

µA

RD

EEPROM Write current

I

Write mode

WR

Power check EEPROM write

current

I

V

= 4.0 V

PWCHK

DD

EEPROM pwr check threshold

voltage

V

2.52 2.75

3.10

V

PWCHK

EEPROM data endurance

N

Erase all / Write all

o

5

cycle

year

CY

10

EEPROM retention (note 3)

T

5

10

RET

T

I

= 55 C after 10 cycles

OP

Voltage drop

modulator

V

-

V

on

V

0.50

2.50

V

= 100 µA

COIL

SS

ON

COIL

I

= 5 mA

rising

Resonance capacitor

POR voltage (high)

MONOFLOP delay

C

330 340

2.0

350

2.6

85

pF

V

COIL

V

DD

PRH

T

25

50

µs

MONO

Min. voltage of clock extractor 1

(note 4)

V

4.5

V

CLK1min

coil1-coil2 (min for extraction)

pp

Min. voltage of clock extractor 2

(note 5)

V

1.0

V

CLK2min

coil1-coil2 (min for extraction)

pp

Note 1: Max. supply voltage (not regulated) is defined by forcing a DC current 10 mA in pins COIL1-COIL2

p

Note 2: The circuit is not functional under low level POR voltage

Note 4: Uplink

Note 5: downlink

o

Note 3: Based on 1000 hours measurement at 150 C

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EM4056

Timing Characteristics

Parameter

Symbol

Conditions

Typ

Units

RF periods

Modulation duration

ON OFF ON

Emission Bit Period

T

Bit 0

Bit 1

26

36

16

8

b0

T

b1

T

Start bit

8

ab

T

RF periods

ms

Reception Bit Period

64

32

bit

T

Reception Bit Period Arbitration

Select processing time

Read processing time

Write processing time

Arb1 processing time

Arb2 processing time

Arbitration format duration

Read Rom format duration

Select format duration

Prot format duration

bitarb

T

190

126

3134

62

sp

T

rp

T

wp

T

a1p

T

10

a2p

Tarb

T

115

24.5

19.1

32.2

20.3

36.6

16.6

ro

T

s

T

p

T

Read format duration

Write format duration

Comp format duration

r

T

w

T

c

T

l

T_ee

Login format duration

35.1

20.0

EEPROM Write duration

V_DD= 3V

Functional Description

General

The EM4056 has a read enable bit (RdEn) realised with a flip-flop cell. If the RdEn bit is set to « 0 », the transponder is

always allowed to answer otherwise it answers only on special commands.

At power on, the default value of the RdEn bit is 0. Therefore, after switching the field on, the RdEn bit of all known tags may

be set by the reader in order to separate them in two groups.

The block check sequence uses a 8 bits CRC which is the same polynom for all CRC blocks.

In addition, the CRC block from the EM4056 to the reader is sent in the format of the BitVal frame (see arbitration mode) to

increase the error detection rate in the reader.

Memory organisation

Address Bit

17

0000000

Bit 0 is defined as the first bit output

LASER ROM (3 * 18)

Bit

0

1

0000010

EEPROM (123 * 18)

1111110

1111111

Configuration Word

PIN Word

Config Word definition + Laser Rom area definition

Fig.4

The Read Protected and the Write Protected bit are OTP bit. Once written to one,

it is definitively locked. No possibility to erase them to zero.

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EM4056

ROM organisation

Address

Datas

Wp

bit1

1

Rp

bit0

0

bit17

B15

bit2

B0

0000000

0000001

0000010

B31

L7

B16

C0

1

0

L0 C7

1

0

B31-B0 unique code number.

L7-L0

C7 – C0

8-bit customer ID, standard version = 65hex, 101dec.

CRC calculated on bits B31 to B0 and L7 to L0.

(CRC block diagram see figure 4).

Note : EM4056 with different customer ID will also have a different unique code number.

Commands structure

Command

ReadRom

SelToggle

SelTag

Code

MSB 0010

0100

LSB

0101

DeselTag

Prot

0110

1000

Read

1010

Write

1100

Add

1101

Comp

1110

Start Arbitration

Continue if “0”

Continue if “1”

Abort Arbitration

0001

00

11

01 or 10

CRC Block Diagram

Data Input

7

6 5

4

3 2 1

0

MSB

LSB

X7

X5

X4

X1

X0=1

Exclusive OR

Shift Register

CRC Generating polynomial = X7+X5+X4+X+1

X

Fig. 5

In uplink the CRC is calculated on all bits of the command (startbit excluded), MSB first.

In dowlink the CRC is calculated on all bits of the answer, first bit sent by the chip first.

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EM4056

ReadRom

A ReadRomEn command enables only transponders in the field with RdEn bit set to « 0 » to answer.

With this command, the address of a single new tag entered in the field can be detected because all known transponders

are not allowed to answer if they are deactivated by the RdEn bit (RdEn=1). If more than one transponder answer a CRC

error will be detected and it becomes necessary to perform an arbitration to find all new transponder addresses.

The command is faster than a full arbitration cycle for new tags.

The ReadRomEn command frame consists of three blocks and has a constant length of 13 bits.

The Start bit allows the transponder to synchronise to the new command frame. After the Start bit, the frame contains four

bits for the Command. A CRC block of 8 bits is calculated over the Command and appended to the end.

The transponder frame has a length of 40 bits and starts with the 32 bits ROM block. A CRC block of 8 bits is calculated

over the transponder address (ROM) and appended to the end.

1 bit

Start

4 bits

MSB

ReadRom

8 bits

CRC

X8

Reader

32 bits

MSB

ROM

8 bits

X8

CRC

Transponder

tsp

Fig. 6

SelToggle

A SelToggle command addresses a transponder and toggles the RdEn bit (0→1 or 1→0). The transponder returns a frame

with the changed value of RdEn bit followed by a CRC.

The SelToggle command frame consists of four blocks and has a constant length of 45 bits.

The Start bit allows the transponder to synchronise to the new command frame. After the Start bit the frame contains four

bits for the Command. Next to the Command, a sequence of 32 bits follows with the transponder address. A CRC block of 8

bits is calculated over the Command and the transponder address and appended to the end.

The transponder frame has a length of 10 bits and starts with the RdEn bit and the "not RdEn" bit. A CRC block of 8 bits is

calculated over the RdEn and the "not RdEn" and appended to the end.

1 bit

Start

4 bits

MSB

SelToggle

32 bits

MSB

ROM

8 bits

X8

CRC

Reader

2 bits

8 bits

X8

CRC

Transponder

tsp

RdEn nRdEn

Fig. 7

SelTag

The SelTag command address a transponder with its 32 bit address (ROM) and set the flag Select to 1. After this command,

the selected transponder can answer to commands : Read, Write, Prot, Add, Comp and Login.

1 bit

Start

4 bits

MSB

SelTag

32 bits

MSB

ROM

8 bits

X8

CRC

Reader

2 bits

8 bits

CRC

X8

Transponder

tsp

Sel nSel

Fig. 8

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EM4056

DeselTag

The DeselTag command address a transponder with its 32 bit address (ROM) and reset the flag Select to 0.

1 bit

Start

4 bits

MSB

DeselTag

32 bits

MSB

ROM

8 bits

X8

CRC

Reader

2 bits

8 bits

CRC

X8

Transponder

tsp

Sel nSel

Fig. 9

Prot

Prot command for writing the 2 (OTP) protection bit (read and write) at the specified address.

1 bit

Start

4 bits

MSB

Prot

8 bits

MSB

Address

2 bits

MSB

Wp/Rp

8 bits

X8

CRC

Reader

2 bits

8 bits

X8

WOk nWOk CRC

Transponder

twp

Fig. 10

Wp=1, the specified address is protected against writing.

Rp=1, the specified address is protected against reading.

WOk=1, the protection bit has been successfully written to one.

Read

Read command to get a 16-bit word located at the specified address. If the address is read protected, the circuit transmits a

65535 value.

1 bit

Start

4 bits

MSB

Read

8 bits

MSB

8 bits

X8

CRC

Reader

Address

16 bits

MSB

trp Datas

3 bits

Prot

8 bits

X8

CRC

Transponder

Prot = (Wp / Rp / Suc)

Fig. 11

Datas

Rp

0

Suc

0

Definition

12345 dec

65535 dec

Data = 12345

Data = 65535

Read protected

0

1

x

0

1

Read protected by PIN

Wp=1, the specified address is protected against writing.

Rp=1, the specified address is protected against reading.

Suc=1, the specified address is protected by the PIN against reading.

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EM4056

Write

Write command for 16 bits of data at the specified address.

1 bit

Start

4 bits

MSB

Write

8 bits

MSB

Address

16 bits

MSB

Datas

8 bits

CRC

X8

Reader

2 bits

twp WOk nWOk

8 bits

X8

Transponder

CRC

Fig. 12

WOk=1, the write operation has been successfully executed.

When a word is written at the address (Adr 126), where the configuration is located this command is restricted to write the

uppermost data (Dat_15 à Dat_4), the lower address (Dat_3 to Dat_0) being reserved for safeguarding the PIN counter.

The data at the address of the configuration are:

15

Z_Suc[2:0]

0

M_Suc No_Ant Sec Conf[2:0] NU NU NU Alm Pin[2:0]

Fig. 13

where :

•

M_suc : selects a internal mode for which no reading nor writing can extract or engrave valid data into the area of the

memory presently protected by the PIN code.

M_suc=1, area of memory is protected by PIN.

•

Z_suc[2 :0] : determines the address area which is protected by the PIN code. (0% [000], 25%[100], 50%[101], 75

%[110] or 100%[111]).

Z_suc[2:0]

000

Area protected

00 %

Addresses protected

None, incl. PIN

100

25 %

Word 127 – Word 96

Word 95 – Word 64

Word 63 – Word 32

101

50 %

110

75 %

111

100 %

Word 31 – Word

0

•

No_Ant : selects the bit "Egal_ROM" and disables the anticollision mode.

No_Ant=1, no anticollision, the tag is always selected (Sel=1).

Sec=1, enables the counter of false attempts for the password (PIN).

Sec=0, counter is disabled.

Conf[2 :0] : represents the maximum number of attempts for finding a valid PIN before definitive lock of the card for

writing.

•

Pin[2 :0] : represents the number of remaining attempts for finding the correct PIN.

Alm : alarm bit indicates a permanent lock of the card against write attempts. This bit is activated as soon as the number

of PIN erroneous introduction is surpassed.

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EM4056

Add

Add command to add one 16-bit data word to another 16-bit data word pointed by the specified address, this command

writes the sum at the specified address. It is possible to add a value to an already protected memory location that has been

protected against reading, but not to a memory location that has been protected against writing attempts.

1 bit

Start

4 bits

MSB

Add

8 bits

MSB

Address

16 bits

MSB

Datas

8 bits

X8

CRC

Reader

2 bits

8 bits

X8

CRC

Transponder

twp WOk nWOk

Fig. 14

Comp

Compares a 16 bits data word with another word pointed by the specified address.

It is possible to perform a comparison with a value pointed by a read protected address.

But it is impossible to compare a value with another one in the opaque area without entering the PIN. In the case of PIN

violation, the result of the comparison is always false.

Ega=1, comparison successful.

1 bit

Start

4 bits

MSB

Comp

8 bits

MSB

Address

16 bits

MSB

Datas

8 bits

X8

CRC

Reader

2 bits

8 bits

X8

CRC

Transponder

trp Ega nEga

Fig. 15

Login

Compares a 16 bit data word with the PIN word at the address 127.

When a PIN comparison is made (Adr 127) and the identity is established, a write operation occurs in the EEPROM, PIN =

CONF , the success bit is released (SUC = 0), the PIN counter is decremented (PIN = PIN - 1) and the corresponding new

value is written in the EEPROM.

After n erroneous attempts (PIN=0), the ALM bit is set (ALM = 1), and written in the EEPROM. Since that moment the entire

memory is irreversibly locked. The unprotected data words (Rp=0) remain accessible for reading the information they are

containing.

1 bit

Start

4 bits

MSB LSB MSB LSB X8

Login Datas CRC

16 bits

8 bits

1

Reader

4 bits

8 bits

X8

CRC

1

Transponder

twp Ega nEga WOk nWOk

Fig. 16

Ega=1, password ok. Wok=1, writing operation successful.

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EM4056

Arbitration commands

The arbitration mode is a sophisticated command avoiding collisions among transponders. The arbitration method is based

on the method of multiprocessor bus arbitration.

This feature allows the identification of a transponder out of a group, even if they entered the electromagnetic field at the

same time. At each arbitration, the reader detects one address of a new transponder.

The arbitration session starts with a special StartArbitration command. If the RdEn bit of the transponder is « 0 », then the

transponder belongs to the active group. The arbitration commands will only act on the transponders of the active group.

StartArbitration

After the Start bit, the reader sends a command field which indicates the beginning of an arbitration cycle. An 8 bits CRC

block calculated over the StartArbitration command completes this information.

The transponder returns the first BitVal frame corresponding to the LSB of its 32 bits addresses.

Start of arbitration

1 bit

Reader Start

Transponder

4 bits

MSB

Start_Arbit

8 bits

MSB

CRC

1 bit

2 bits

MSB

Start Continue

6 bits

Bit0 Bit0 X X Bit1 Bit1

ta1p

LSB ROM

ta2p

Fig. 17

BitVal Frame

The BitVal frame consists of 6 bits. If the Nth bit of its address is logic « 0 », the transponder sends two « 0 » at the position

Bit0. If the Nth bit of its address is logic « 1 », the transponder sends two « 0 » at the positions Bit1. The bit repetition

increases the transmission reliability.

The response value of the different transponders is coded with the time position of the answer. Therefore no answer

conflicts are generated.

Note: Reception Bit Period is 32 RFclocks for all the arbitration (BitVal frame and CRC).

BitVal frame

BitVal = 0

BitVal = 1

Bit0

X

Bit1

X

Bit1

X

Å 32 Rf period

Æ

0

X

0

Fig. 18

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EM4056

Continue command

After receiving the BitVal frame from the different transponders in the field the reader decides whether the tags with « 0 » or

« 1 » should continue the arbitration process and communicates this with the Continue frame. The transponders whose last

BitVal was not identical with the confirmation in the Continue frame stop the arbitration process and wait for a new

command.

Arbitration in progress

1 bit

2 bits

MSB

Continue

1 bit

2 bits

MSB

Start Continue

Reader

Start

6 bits

Bit0 Bit0 X X Bit1 Bit1

n^thBitVal

6 bits

Bit0 Bit0 X X Bit1 Bit1

n+1^thBitVal

Transponder

ta1p

ta2p

ta1p

Fig. 19

When the Continue frame of the 32^ndbit is processed, only one transponder is left. This new identified tag sets the RdEn bit

to 1 and belongs no longer to the active group. The arbitration cycle is completed by a transponder frame for selective

commands (RdEn,CRC). The CRC is calculated like a transponder frame for general commands. This means the CRC is

calculated over ROM and RdEn of the transponder in order to increase the reliability of the arbitration.

End of arbitration

1 bit

2 bits

MSB

Continue

1 bit

2 bits

MSB

Start Continue

Reader

Start

6 bits

Bit0 Bit0 X X Bit1 Bit1

32^thBitVal

8 bits

MSB

CRC

Transponder

ta1p

ta2p

ta1p

Fig. 20

To identify the address of a transponder, it takes 115 ms (including overhead as mentioned before). That makes it possible

to detect about 8.7 new transponders per second, independent of the number of transponders in the electromagnetic field.

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EM4056

Example of Arbitration protocol *

Read ROM

No

Yes

CRC error ?

Reset flag


型号：	EM4056
厂家：	EM MICROELECTRONIC - MARIN SA
描述：	2KBIT Read/Write with ANTICOLLISION Contactless Identification Device 2KBIT读/写与ANTICOLLISION非接触式识别装置装置
文件：	总14页 (文件大小：145K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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